ac100 team mailing list archive

[Gordan Bobic <gordan@xxxxxxxxxx>]

Hi guys,

Here is a very basic overclocking patch for the AC100. It boosts the CPU 
clock from 1GHz to 1.2GHz.

My testing so far indicates that a voltage bump is not required.
CPU temperatures as returned by lm_sensors/lm90 are only slightly higher 
at full load.

The way the patch works is by replacing the 1000MHz speed witha 1200MHz 
speed in the clock tables, so the lower speeds still work the same as 
before, which means that unless you are running something very CPU 
intensive the battery life isn't going to suffer. It might even improve 
since the task will finish more quickly so the CPU can go back to sleep 
sooner.

Unfortunately higher clock speeds don't seem to work - the readings 
indicate a higher clock speed, but the performance measurement indicates 
a very slow speed. From what I can tell, 1200MHz could be a limitation 
of the clock generator, and if you tell it to go faster, the clock speed 
wraps around. It is, of course, possible I am overlooking a limiting 
setting somewhere in the kernel. Perhaps somebody else can confirm?

Please test this for stability. My tests so far (rebuilding GCC, takes 
most of a day) indicate that it is stable at 975mV, but if you manage to 
shake it loose (and can verify that it is completely stable at 912MHz), 
please let me know and I'll update the patch to include a CPU voltage 
bump. You can limit the top speed by echoing one of the values in:
/sys/devices/system/cpu/cpu0/cpufreq/scaling_available_frequencies
into:
/sys/devices/system/cpu/cpu0/cpufreq/scaling_max_freq
/sys/devices/system/cpu/cpu1/cpufreq/scaling_max_freq

Since there seems to be enough of a margin for error in the CPU voltages 
to run stably at 20% higher clock speed, the chances are that there is 
substantial undervolting potential for power saving, too.

Gordan

diff --git a/arch/arm/mach-tegra/cpu-tegra.c b/arch/arm/mach-tegra/cpu-tegra.c
index 6cd2288..2a0934d 100644
--- a/arch/arm/mach-tegra/cpu-tegra.c
+++ b/arch/arm/mach-tegra/cpu-tegra.c
@@ -68,7 +68,7 @@ static struct cpufreq_frequency_table freq_table_1000GHz[] = {
 	{ 4, 760000 },
 	{ 5, 816000 },
 	{ 6, 912000 },
-	{ 7, 1000000 },
+	{ 7, 1200000 },
 	{ 8, CPUFREQ_TABLE_END },
 };
 
diff --git a/arch/arm/mach-tegra/tegra2_clocks.c b/arch/arm/mach-tegra/tegra2_clocks.c
index cba0b84..876b00a 100644
--- a/arch/arm/mach-tegra/tegra2_clocks.c
+++ b/arch/arm/mach-tegra/tegra2_clocks.c
@@ -1816,10 +1816,10 @@ static struct clk_pll_freq_table tegra_pll_x_freq_table[] = {
 	{ 26000000, 1200000000,  600, 13, 1, 12},
 
 	/* 1 GHz */
-	{ 12000000, 1000000000, 1000, 12, 1, 12},
-	{ 13000000, 1000000000, 1000, 13, 1, 12},
-	{ 19200000, 1000000000, 625,  12, 1, 8},
-	{ 26000000, 1000000000, 1000, 26, 1, 12},
+	{ 12000000, 1200000000, 1200, 12, 1, 12},
+	{ 13000000, 1200000000, 1200, 13, 1, 12},
+	{ 19200000, 1200000000, 625,  12, 1,  8},
+	{ 26000000, 1200000000, 1200, 26, 1, 12},
 
 	/* 912 MHz */
 	{ 12000000, 912000000,  912,  12, 1, 12},
@@ -1872,7 +1872,7 @@ static struct clk tegra_pll_x = {
 	.ops       = &tegra_pll_ops,
 	.reg       = 0xe0,
 	.parent    = &tegra_clk_m,
-	.max_rate  = 1000000000,
+	.max_rate  = 1200000000,
 	.u.pll = {
 		.input_min = 2000000,
 		.input_max = 31000000,
@@ -2412,9 +2414,9 @@ static struct tegra_sku_rate_limit sku_limits[] = {
 	RATE_LIMIT("cclk",	750000000, 0x07, 0x10),
 	RATE_LIMIT("pll_x",	750000000, 0x07, 0x10),
 
-	RATE_LIMIT("cpu",	1000000000, 0x04, 0x08, 0x0F),
-	RATE_LIMIT("cclk",	1000000000, 0x04, 0x08, 0x0F),
-	RATE_LIMIT("pll_x",	1000000000, 0x04, 0x08, 0x0F),
+	RATE_LIMIT("cpu",	1200000000, 0x04, 0x08, 0x0F),
+	RATE_LIMIT("cclk",	1200000000, 0x04, 0x08, 0x0F),
+	RATE_LIMIT("pll_x",	1200000000, 0x04, 0x08, 0x0F),
 
 	RATE_LIMIT("cpu",	1200000000, 0x14, 0x17, 0x18, 0x1B, 0x1C),
 	RATE_LIMIT("cclk",	1200000000, 0x14, 0x17, 0x18, 0x1B, 0x1C),
diff --git a/arch/arm/mach-tegra/tegra2_dvfs.c b/arch/arm/mach-tegra/tegra2_dvfs.c
index a8f968d..ca4120e 100644
--- a/arch/arm/mach-tegra/tegra2_dvfs.c
+++ b/arch/arm/mach-tegra/tegra2_dvfs.c
@@ -153,7 +153,7 @@ static struct dvfs dvfs_cpu[NUM_SPEED_LEVELS][NUM_PROCESS_CORNERS] = {
 	{
 		CPU_DVFS("cpu", MHZ, 314, 314, 314, 456, 456, 456,  608,  608,  608,  760,  817,  817,  912,  1000),
 		CPU_DVFS("cpu", MHZ, 314, 314, 314, 456, 456, 456,  618,  618,  618,  770,  827,  827,  922,  1000),
-		CPU_DVFS("cpu", MHZ, 494, 494, 494, 675, 675, 817,  817,  922,  922,  1000),
+		CPU_DVFS("cpu", MHZ, 494, 494, 494, 675, 675, 817,  817,  922,  922,  1200),
 		CPU_DVFS("cpu", MHZ, 730, 760, 845, 845, 940, 1000),
 	},
 	{