dolfin team mailing list archive

[Florian Rathgeber <florian.rathgeber@xxxxxxxxxxxxxx>]

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Johan,

Glad you're interested! That FFC branch is actually already published:
lp:~florian-rathgeber/ffc/gpu-wrappers

It is a dirty hack rather though, but I'd be happy about suggestions on
how to improve its design.

Florian

On 22/01/11 08:49, Johan Hake wrote:
> Florian!
> 
> Thanks for sharing your Master thesis. It was informative reading! You mention 
> that you modified FFC too. Will this branch also be published?
> 
> Johan
> 
> On Friday January 21 2011 02:34:43 Florian Rathgeber wrote:
>> There is no master plan I know of. For my MSc project with Johan Jansson
>> at KTH last year I implemented GPU assembly and solve using DOLFIN.
>> There are 2 backends: a native CUDA one and one using the cusp library
>> from NVIDIA. I'm currently trying to get my code in shape and working
>> with the current dolfin-dev to publish in a branch on launchpad
>> (lp:~florian-rathgeber/dolfin/gpu-backend). The code currently in there
>> is broken, I had pushed it to show the CMake problems I was seeing.
>> Hopefully I can push something working soon.
>>
>> If you want to read up on the background my MSc thesis is probably a
>> good start:
>> http://www.nada.kth.se/utbildning/grukth/exjobb/rapportlistor/2010/rapporte
>> r10/rathgeber_florian_10106.pdf
>>
>> I don't know how much time I will have to maintain this, but I thought
>> it would be useful to have something out for people to play with and
>> show there is work in this direction in the FEniCS community.
>>
>> Florian
>>
>> On 20/01/11 22:47, Anders Logg wrote:
>>> On Thu, Jan 20, 2011 at 11:03:51PM +0100, Marie E. Rognes wrote:
>>>> On 01/20/2011 10:10 PM, Johan Hake wrote:
>>>>     Florian!
>>>>     
>>>>     Out of curiosity, are you planing to implement GPU assembly too? To
>>>>     me it looked like your code "only" exploited solve on the GPU.
>>>>     
>>>>     I guess GPU assemble is even more parallelizable than the solving
>>>>     process. At least if you settle with gathering the elemement
>>>>     matrices in parallel and then fanning them out in some sort of
>>>>     serial operation. In this way you miss the possibility to solve on
>>>>     the GPU, which I guess you are exploiting.
>>>>
>>>> I'm real interested too in hearing more about your plans!
>>>>
>>>> There has been quite a bit of mentions with regard to "doing stuff on
>>>> GPUs" from different parts of the FEniCS community over the last year
>>>> or so. Is there a master plan out there somewhere?
>>>
>>> I don't think there's a master plan (yet), but many are interested and
>>> the group at Imperial have been working on it for some time. It would
>>> be interesting to hear more about the progress.
>>>
>>>
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