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Re: RadeonHD+IntelGMA switchable

 

On Mon, 19 Jul 2010, Ruslan N. Marchenko wrote:
It hints me another solution - to patch read_mem in drivers/char/mem.c to return different content for offset 0xC0000 %)


Indeed, doing strace on Xorg with fglrx shows following

open("/dev/mem", O_RDWR)                = 16
mmap(NULL, 262144, PROT_READ|PROT_WRITE, MAP_SHARED, 16, 0xc0000) = 0x7f51e3c6c000
close(16)

so i've patched char/mem.c to return stored bios using firmware_request - but behaviour is exactly the same:

write(2, "(II) fglrx(0): Bad V_BIOS checks"..., 35(II) fglrx(0): Bad V_BIOS checksum) = 35
write(0, "(II) fglrx(0): Bad V_BIOS checks"..., 35) = 35
write(2, "(II) fglrx(0): Primary V_BIOS se"..., 49(II) fglrx(0): Primary V_BIOS segment is: 0xc000) = 49
write(0, "(II) fglrx(0): Primary V_BIOS se"..., 49) = 49

as if it tries to fallback to low vga rom region 0xC000 instead of UMA 0xC0000.

So, either it uses some direct memory access instead of /dev/mem, or it correctly fetches bios but the bios indeed is modified and violates some checks. We need some more ideas %)

---
 Looking forward to reading yours.
   Ruslan N. Marchenko



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