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[Bug 1559350] [NEW] Show ARM PMU events in perf stat

 

Public bug reported:

The upstream kernel now has support for self-describing PMU events. This
exposes these events to userspace so that they can be displayed by perf
stat. This greatly improves the discovery of these counters, which would
otherwise would require consulting an architecture manual. For example:

ubuntu@cvm2s2:~$ diff -u old/perf.list new/perf.list 
--- old/perf.list	2016-03-18 16:43:01.661396908 -0400
+++ new/perf.list	2016-03-18 16:53:28.948746988 -0400
@@ -34,6 +34,55 @@
   dTLB-store-misses                                  [Hardware cache event]
   dTLB-stores                                        [Hardware cache event]
   iTLB-load-misses                                   [Hardware cache event]
+  armv8_cavium_thunder/br_immed_retired/             [Kernel PMU event]
+  armv8_cavium_thunder/br_mis_pred/                  [Kernel PMU event]
+  armv8_cavium_thunder/br_mis_pred_retired/          [Kernel PMU event]
+  armv8_cavium_thunder/br_pred/                      [Kernel PMU event]
+  armv8_cavium_thunder/br_retired/                   [Kernel PMU event]
+  armv8_cavium_thunder/br_return_retired/            [Kernel PMU event]
+  armv8_cavium_thunder/bus_access/                   [Kernel PMU event]
+  armv8_cavium_thunder/bus_cycles/                   [Kernel PMU event]
+  armv8_cavium_thunder/chain/                        [Kernel PMU event]
+  armv8_cavium_thunder/cid_write_retired/            [Kernel PMU event]
+  armv8_cavium_thunder/cpu_cycles/                   [Kernel PMU event]
+  armv8_cavium_thunder/exc_return/                   [Kernel PMU event]
+  armv8_cavium_thunder/exc_taken/                    [Kernel PMU event]
+  armv8_cavium_thunder/inst_retired/                 [Kernel PMU event]
+  armv8_cavium_thunder/inst_spec/                    [Kernel PMU event]
+  armv8_cavium_thunder/l1d_cache/                    [Kernel PMU event]
+  armv8_cavium_thunder/l1d_cache_allocate/           [Kernel PMU event]
+  armv8_cavium_thunder/l1d_cache_refill/             [Kernel PMU event]
+  armv8_cavium_thunder/l1d_cache_wb/                 [Kernel PMU event]
+  armv8_cavium_thunder/l1d_tlb/                      [Kernel PMU event]
+  armv8_cavium_thunder/l1d_tlb_refill/               [Kernel PMU event]
+  armv8_cavium_thunder/l1i_cache/                    [Kernel PMU event]
+  armv8_cavium_thunder/l1i_cache_refill/             [Kernel PMU event]
+  armv8_cavium_thunder/l1i_tlb/                      [Kernel PMU event]
+  armv8_cavium_thunder/l1i_tlb_refill/               [Kernel PMU event]
+  armv8_cavium_thunder/l21_tlb/                      [Kernel PMU event]
+  armv8_cavium_thunder/l21_tlb_refill/               [Kernel PMU event]
+  armv8_cavium_thunder/l2d_cache/                    [Kernel PMU event]
+  armv8_cavium_thunder/l2d_cache_allocate/           [Kernel PMU event]
+  armv8_cavium_thunder/l2d_cache_refill/             [Kernel PMU event]
+  armv8_cavium_thunder/l2d_cache_wb/                 [Kernel PMU event]
+  armv8_cavium_thunder/l2d_tlb/                      [Kernel PMU event]
+  armv8_cavium_thunder/l2d_tlb_refill/               [Kernel PMU event]
+  armv8_cavium_thunder/l2i_cache/                    [Kernel PMU event]
+  armv8_cavium_thunder/l2i_cache_refill/             [Kernel PMU event]
+  armv8_cavium_thunder/l3d_cache/                    [Kernel PMU event]
+  armv8_cavium_thunder/l3d_cache_allocate/           [Kernel PMU event]
+  armv8_cavium_thunder/l3d_cache_refill/             [Kernel PMU event]
+  armv8_cavium_thunder/l3d_cache_wb/                 [Kernel PMU event]
+  armv8_cavium_thunder/ld_retired/                   [Kernel PMU event]
+  armv8_cavium_thunder/mem_access/                   [Kernel PMU event]
+  armv8_cavium_thunder/memory_error/                 [Kernel PMU event]
+  armv8_cavium_thunder/pc_write_retired/             [Kernel PMU event]
+  armv8_cavium_thunder/st_retired/                   [Kernel PMU event]
+  armv8_cavium_thunder/stall_backend/                [Kernel PMU event]
+  armv8_cavium_thunder/stall_frontend/               [Kernel PMU event]
+  armv8_cavium_thunder/sw_incr/                      [Kernel PMU event]
+  armv8_cavium_thunder/ttbr_write_retired/           [Kernel PMU event]
+  armv8_cavium_thunder/unaligned_ldst_retired/       [Kernel PMU event]
   rNNN                                               [Raw hardware event descriptor]
   cpu/t1=v1[,t2=v2,t3 ...]/modifier                  [Raw hardware event descriptor]
   mem:<addr>[/len][:access]                          [Hardware breakpoint]

** Affects: linux (Ubuntu)
     Importance: Undecided
     Assignee: dann frazier (dannf)
         Status: In Progress


** Tags: arm64 armhf

** Tags added: arm64 armhf

** Changed in: linux (Ubuntu)
       Status: Confirmed => In Progress

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https://bugs.launchpad.net/bugs/1559350

Title:
  Show ARM PMU events in perf stat

Status in linux package in Ubuntu:
  In Progress

Bug description:
  The upstream kernel now has support for self-describing PMU events.
  This exposes these events to userspace so that they can be displayed
  by perf stat. This greatly improves the discovery of these counters,
  which would otherwise would require consulting an architecture manual.
  For example:

  ubuntu@cvm2s2:~$ diff -u old/perf.list new/perf.list 
  --- old/perf.list	2016-03-18 16:43:01.661396908 -0400
  +++ new/perf.list	2016-03-18 16:53:28.948746988 -0400
  @@ -34,6 +34,55 @@
     dTLB-store-misses                                  [Hardware cache event]
     dTLB-stores                                        [Hardware cache event]
     iTLB-load-misses                                   [Hardware cache event]
  +  armv8_cavium_thunder/br_immed_retired/             [Kernel PMU event]
  +  armv8_cavium_thunder/br_mis_pred/                  [Kernel PMU event]
  +  armv8_cavium_thunder/br_mis_pred_retired/          [Kernel PMU event]
  +  armv8_cavium_thunder/br_pred/                      [Kernel PMU event]
  +  armv8_cavium_thunder/br_retired/                   [Kernel PMU event]
  +  armv8_cavium_thunder/br_return_retired/            [Kernel PMU event]
  +  armv8_cavium_thunder/bus_access/                   [Kernel PMU event]
  +  armv8_cavium_thunder/bus_cycles/                   [Kernel PMU event]
  +  armv8_cavium_thunder/chain/                        [Kernel PMU event]
  +  armv8_cavium_thunder/cid_write_retired/            [Kernel PMU event]
  +  armv8_cavium_thunder/cpu_cycles/                   [Kernel PMU event]
  +  armv8_cavium_thunder/exc_return/                   [Kernel PMU event]
  +  armv8_cavium_thunder/exc_taken/                    [Kernel PMU event]
  +  armv8_cavium_thunder/inst_retired/                 [Kernel PMU event]
  +  armv8_cavium_thunder/inst_spec/                    [Kernel PMU event]
  +  armv8_cavium_thunder/l1d_cache/                    [Kernel PMU event]
  +  armv8_cavium_thunder/l1d_cache_allocate/           [Kernel PMU event]
  +  armv8_cavium_thunder/l1d_cache_refill/             [Kernel PMU event]
  +  armv8_cavium_thunder/l1d_cache_wb/                 [Kernel PMU event]
  +  armv8_cavium_thunder/l1d_tlb/                      [Kernel PMU event]
  +  armv8_cavium_thunder/l1d_tlb_refill/               [Kernel PMU event]
  +  armv8_cavium_thunder/l1i_cache/                    [Kernel PMU event]
  +  armv8_cavium_thunder/l1i_cache_refill/             [Kernel PMU event]
  +  armv8_cavium_thunder/l1i_tlb/                      [Kernel PMU event]
  +  armv8_cavium_thunder/l1i_tlb_refill/               [Kernel PMU event]
  +  armv8_cavium_thunder/l21_tlb/                      [Kernel PMU event]
  +  armv8_cavium_thunder/l21_tlb_refill/               [Kernel PMU event]
  +  armv8_cavium_thunder/l2d_cache/                    [Kernel PMU event]
  +  armv8_cavium_thunder/l2d_cache_allocate/           [Kernel PMU event]
  +  armv8_cavium_thunder/l2d_cache_refill/             [Kernel PMU event]
  +  armv8_cavium_thunder/l2d_cache_wb/                 [Kernel PMU event]
  +  armv8_cavium_thunder/l2d_tlb/                      [Kernel PMU event]
  +  armv8_cavium_thunder/l2d_tlb_refill/               [Kernel PMU event]
  +  armv8_cavium_thunder/l2i_cache/                    [Kernel PMU event]
  +  armv8_cavium_thunder/l2i_cache_refill/             [Kernel PMU event]
  +  armv8_cavium_thunder/l3d_cache/                    [Kernel PMU event]
  +  armv8_cavium_thunder/l3d_cache_allocate/           [Kernel PMU event]
  +  armv8_cavium_thunder/l3d_cache_refill/             [Kernel PMU event]
  +  armv8_cavium_thunder/l3d_cache_wb/                 [Kernel PMU event]
  +  armv8_cavium_thunder/ld_retired/                   [Kernel PMU event]
  +  armv8_cavium_thunder/mem_access/                   [Kernel PMU event]
  +  armv8_cavium_thunder/memory_error/                 [Kernel PMU event]
  +  armv8_cavium_thunder/pc_write_retired/             [Kernel PMU event]
  +  armv8_cavium_thunder/st_retired/                   [Kernel PMU event]
  +  armv8_cavium_thunder/stall_backend/                [Kernel PMU event]
  +  armv8_cavium_thunder/stall_frontend/               [Kernel PMU event]
  +  armv8_cavium_thunder/sw_incr/                      [Kernel PMU event]
  +  armv8_cavium_thunder/ttbr_write_retired/           [Kernel PMU event]
  +  armv8_cavium_thunder/unaligned_ldst_retired/       [Kernel PMU event]
     rNNN                                               [Raw hardware event descriptor]
     cpu/t1=v1[,t2=v2,t3 ...]/modifier                  [Raw hardware event descriptor]
     mem:<addr>[/len][:access]                          [Hardware breakpoint]

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