kicad-developers team mailing list archive

[AndreyAF <andrf@xxxxxxx>]

Hi all

I am currently working with FPGA Xilinx.
For each chip set length from PADs to DIE in um (partgen -v <chip>).
For example, in XC5VLX110-2FF676 lengths (flight-time data) ranging from ~2 
to ~17 mm.
Must take this into account when aligning the lengths of the traces.

Added new attribute to pad in input/output format
$PAD
...
Le <length pad to die on chip in mils>
$EndPAD
and new public variable
int m_LengthDie
in class D_PAD.

DisplayInfo for highlight net output:
Net length (lengthnet + lengthdie)
on pcb (lengthnet)
on die (lengthdie)

In the pads dialog has not yet added,
adding a lines "Le <length pad to die on chip in mils>" with perl-script or 
manually.

--
Andrey Fedorushkov