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Re: cvpcb netlist behavior

 

In response to a message written on 26.06.2015, 16:14, from Chris Pavlina:
Lately I've noticed a whole bunch of people coming into the IRC channel
confused by the new behavior of cvpcb. Since it now pushes changes back to
eeschema instead of writing a file, there is an extra step: you have to go
back into eeschema and export the netlist again. A lot of people are seeing
the "Cannot add new component due to missing footprint" messages and thinking
there's a bug.

Any chance of adjusting this behavior before the release to stop the
confusion? Perhaps cvpcb could trigger a netlist write on save, or maybe
pcbnew could use kiway to see the update footprints and pull them in / warn
about them.
New Message box (on cvpcb closing) with message „Do not forget to export the
netlist.” and checkbox „I understand, do not show this message again.” should
solve the problem.


--
Best Regards,
LordBlick


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