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Re: cvpcb netlist behavior

 

On 6/26/2015 10:32 AM, Henner Zeller wrote:
> On 26 June 2015 at 07:29, jp charras <jp.charras@xxxxxxxxxx> wrote:
>> Le 26/06/2015 16:14, Chris Pavlina a écrit :
>>> Hi,
>>>
>>> Lately I've noticed a whole bunch of people coming into the IRC channel
>>> confused by the new behavior of cvpcb. Since it now pushes changes back
>>> to eeschema instead of writing a file, there is an extra step: you have
>>> to go back into eeschema and export the netlist again. A lot of people
>>> are seeing the "Cannot add new component due to missing footprint"
>>> messages and thinking there's a bug.
>>>
>>> Any chance of adjusting this behavior before the release to stop the
>>> confusion? Perhaps cvpcb could trigger a netlist write on save, or maybe
>>> pcbnew could use kiway to see the update footprints and pull them in /
>>> warn about them.
>>>
>>> --
>>> Chris
>>
>> What do you mean by
>> "you have to go back into eeschema and export the netlist again"
>>
>> You have to export the netlist only once.
>> Cvpcb do not use the current netlist, and when closing it, you are in
>> Eeschema.
> 
> Well, previously, people just wrote the *.cmp file, went to pcbnew,
> imported that and were happy.
> 
> Now, the footprint associations are in the net file, so they have to
> export a fresh netfile and import that in pcbnew. That is the
> additional step.
> 
> So I think making it simpler (or automatically trigger) to export a
> netlist would be good in that case.
> 
> -h

The simplest solution I can think of is to write the netlist from
Eeschema when the kiway express message is receive from CvPcb.  This
should not call the current save netlist code which asks which type of
netlist and then a file name.  It should directly save the default
netlist using the standard project_name.net naming convention.

> 
>>
>>
>> --
>> Jean-Pierre CHARRAS
>>
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