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Message #19537
Re: Stitching vias
Please keep in mind that we are currently in feature freeze so no
stitching via code (or any other new feature for that matter) is going
make it into the upcoming stable release. We are already behind where I
had hoped to be so I do not want to jeopardize pushing the stable
release back any further.
That being said, any via stitching solution must overcome the issues
already discussed. What really should happen is a specification should
be written to define the objectives of this feature. I would prefer
that DRC be fixed to handle free vias as well. I'm not terribly
comfortable with the idea of adding copper to a board without the DRC
checking for clearance violations at a minimum. It is also my
preference that all new features be implemented in the GAL canvas. The
goal is to eventually do away with the legacy canvas. The current
canvas switching should only be seen as a stop gap measure until we can
complete porting all of the features to the GAL canvas.
All that being said, I encourage you to continue developing via
stitching in your own development branches and collaborating so we have
a complete and well defined solution to merge into the product branch
after the stable release.
Cheers,
Wayne
On 7/30/2015 8:09 AM, Ben Kempke wrote:
> Since this has gotten a lot of attention, I figured I'd share my
> workarounds.
>
> KiCad is missing a few features for good RF layout. There are a few
> things which I use frequently in other EDA tools which haven't been
> implemented quite yet by KiCad. Via stitching is one of them. The
> methods mentioned previously are certainly adequate, but it would be
> nice to see it more integrated into KiCad's core functionality in the
> future. This would allow for better manipulation of stitching areas,
> rejection of vias which don't pass DRC, etc.
>
> In order to get around having the nets disappear, I added another status
> flag (NET_LOCKED) which disables the code which manipulates the nets
> upon refresh and effectively locks a via (or other track object) to a
> particular net. In addition to via stitching, I have workarounds for
> round trace support, via shielding, and solder mask expansion around
> selected nets. Of course, since the NET_LOCKED flag isn't integrated in
> with KiCad, any stitching vias which are loaded with a version of KiCad
> without NET_LOCKED support will lose their nets, so via stitching and
> shielding would be 'use-at-your-own-risk'.
>
> The advantage of doing via stitching this way is that vias which don't
> pass DRC are automatically rejected, which was a big win for me.
>
> The code:
>
> Via
> stitching: https://github.com/bpkempke/kicad-source-mirror/tree/zone_via_stitching
> Via
> shielding: https://github.com/bpkempke/kicad-source-mirror/tree/zone_via_shielding
> Round
> traces: https://github.com/bpkempke/kicad-source-mirror/tree/round_trace
> Mask
> expansion: https://github.com/bpkempke/kicad-source-mirror/tree/net_solder_clearance
>
> Although I was planning on waiting until after the stable release to
> polish these off and get additional input, I figured I'd share them here
> since there still appears to be a lot of attention regarding this
> topic. Hopefully they will be useful or at least provide some hints as
> to how KiCad could implement more RF-centric functionality in the future.
>
> I've attached a picture of a recent (simple) board which integrates all
> of these patches.
>
> -Ben
>
> On Thu, Jul 30, 2015 at 4:53 AM, Nick Østergaard <oe.nick@xxxxxxxxx
> <mailto:oe.nick@xxxxxxxxx>> wrote:
>
> ... note the use of the array tools.
>
> 2015-07-30 10:51 GMT+02:00 Nick Østergaard <oe.nick@xxxxxxxxx
> <mailto:oe.nick@xxxxxxxxx>>:
> > FWIW see, https://forum.kicad.info/t/protip-nicer-via-stitching/1103
> >
> > 2015-07-30 10:45 GMT+02:00 Mikk Leini <mikk.leini@xxxxxxxxx
> <mailto:mikk.leini@xxxxxxxxx>>:
> >> Hi,
> >>
> >> Thanks to Wayne for a tip. I guess i found right post also about this
> >> script:
> >> https://lists.launchpad.net/kicad-developers/msg17819.html
> >>
> >> Yes, i agree script is good thing also but most of the times you
> need to do
> >> stitching manually. From manufacturing and electrical point of
> view it's not
> >> cheap and overkill to automatically add 300 vias when all you
> need is to
> >> stitch the edges of the board or sides of the HF traces. Massive
> stitching
> >> is needed usually when good heat conduction is required and then
> it's only
> >> around heat producing components.
> >>
> >> So the idea of implementing manual vias does not interfere with
> script. I
> >> uploaded a demo of what i have right now:
> >> https://youtu.be/c4uwaKJOkO4
> >>
> >> It doesn't need to go into main tree right now but it's so
> obvious feature
> >> missing from KiCad that it should be done one day soon. There are
> tools to
> >> draw circles, text and lines, so why shouldn't it be possible to add
> >> arbitrary holes or vias. Doing vias by footprints is a workaround
> and very
> >> inconvenient if you have many different sizes, plus footprint doesn't
> >> automatically get the netname. Stitching with traces and then
> removing
> >> traces is also like buying a whole dinner set when all you need
> is a knife.
> >>
> >> BR,
> >> Mikk
> >>
> >>
> >> 2015-07-30 10:11 GMT+03:00 easyw <easyw@xxxxxxxxxxxx
> <mailto:easyw@xxxxxxxxxxxx>>:
> >>>
> >>> Hi Torsten,
> >>>
> >>> I vote for that too :)
> >>> thanks
> >>> Maurice
> >>>
> >>> On 30/07/2015 00.12, "Torsten Hüter" wrote:
> >>>>
> >>>> Hi Mikk,
> >>>>
> >>>> I hope that I find this or next weekend some time to upload a
> recent
> >>>> version. I need to merge the actual KiCad code and have to do
> more testing.
> >>>> It's a tool to automate the stitching using the scripting
> window and also
> >>>> with a simple dialog, roughly inspired by Altium.
> >>>>
> >>>> Thanks,
> >>>> Torsten
> >>>>
> >>>>
> >>>>> Hi Torsten,
> >>>>> Yes, i have obviously missed that. I tried to search "via"
> in mailing
> >>>>> list but couldn't find a search button :/
> >>>>> Is it like some add-on tool to editor or some script with
> command line
> >>>>> arguments?
> >>>>> Can you share some link or demo?
> >>>>
> >>>>
> >>>>> BR,
> >>>>> Mikk
> >>>>
> >>>>
> >>>>
> >>>>
> >>>> _______________________________________________
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> >>>
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> >>
> >>
> >>
> >> _______________________________________________
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