kicad-developers team mailing list archive

[Strontium <strntydog@xxxxxxxxx>]

I am working on a couple of RF designs, proper layout requires the use 
of "Via Curtains/Via Filling", Further they are HDI boards and I am 
using both through-hole and micro vias.

I am aware of the "Pro Tip" which suggests simulating a via with a 
component with a single pad.  The "Pro-Tip" doesn't work for me, because 
a pad simulates  a through hole via only, and I also need to fill with 
micro-vias.

I am attempting to write python scripts to automate the Via 
Curtain/Filling, which is otherwise tedious and difficult to edit.

However, there is existing behaviour of Kicad which will cause it to 
delete the net associated with a Track/Via unless that Track/Via is 
connected to a pad, after a DRC.

This behaviour stems from the function :

void PCB_BASE_FRAME::RecalculateAllTracksNetcode()

in pcbnew/connect.cpp

Basically it traces all tracks/vias from the pads and reassigns their 
nets based on the pads they are connected to.  To do that, it first 
removes the already associated nets, and uses the "unassigned net" as a 
flag to tell the function what needs to be traced.

This is fine, and works well.  But in the circumstance where the 
Via/Track is not actually connected to a pad it has the side-effect, 
once complete, of leaving those vias/tracks in the "unconnected" state.

The reality is, these vias/tracks are not "unconnected" the designer has 
actually connected them to the fill planes, or otherwise assigned them a 
net for a reason, which this function does not account for, and doing so 
would be non-trivial and prone to error.

(For example, a Board with a GND/VCC/GND/VCC four layer fill could use a 
through via to connect the GND planes, OR the VCC planes and there is no 
way to automatically determine which.)

Instead, I propose the following patch, or something like it, which 
simply "backs up" the nets of the tracks/vias and after the Nets are 
recalculated, for those which were not changed, restores their net to 
the one it was on entry.

This means if the designer places a GND Via not connected to a pad, it 
will always be a GND Via and will never "lose" its net on DRC. It will 
then properly connect the Fill Planes or whatever other purpose the 
designer had in mind, and wont change.

This change should not break or modify any current behaviour, EXCEPT to 
retain the nets of tracks/vias which Kicad is otherwise incapable of 
determining automatically.

Strontium (Steven J)

=== modified file 'pcbnew/connect.cpp'
--- pcbnew/connect.cpp	2015-06-26 13:41:56 +0000
+++ pcbnew/connect.cpp	2015-12-11 06:36:01 +0000
@@ -855,14 +855,32 @@
  * segments.
  * Pads netcodes are assumed to be up to date.
  */
+
+// Simple structure to hold backup data of Tracks/Vias beign processed.
+struct NETBACKUP {
+  TRACK* t;
+  int m_NetCode;
+
+  NETBACKUP (TRACK* init_t, int init_m_NetCode)
+    {
+        t = init_t;
+        m_NetCode = init_m_NetCode;
+    }
+};
+
 void PCB_BASE_FRAME::RecalculateAllTracksNetcode()
 {
+    std::vector< NETBACKUP > tbak;  // NetCode Backup
+
     // Build the net info list
     GetBoard()->BuildListOfNets();
 
     // Reset variables and flags used in computation
     for( TRACK* t = m_Pcb->m_Track;  t;  t = t->Next() )
     {
+        // BACKUP NetCode of Track/Via
+        tbak.push_back(NETBACKUP(t, t->GetNetCode()));
+
         t->m_TracksConnected.clear();
         t->m_PadsConnected.clear();
         t->start = NULL;
@@ -942,6 +960,16 @@
         }
     }
 
+    // Scan the backup netcodes, and reset any unconnected nets back to their original value.
+    for( unsigned i = 0; i != tbak.size(); i++) {
+        // Check if the Track/Via remains Unconnected
+        if (tbak[i].t->GetNetCode() == NETINFO_LIST::UNCONNECTED)
+        {
+            // It is, so restore it to the last known NetCode.
+            tbak[i].t->SetNetCode(tbak[i].m_NetCode);
+        }
+    }
+
     // Sort the track list by net codes:
     RebuildTrackChain( m_Pcb );
 }