kicad-developers team mailing list archive

[Chris Pavlina <pavlina.chris@xxxxxxxxx>]

Hey, just wondering about something. PNS has had slightly different rounding
behavior than DRC since the beginning - when I use PNS heavily on a board, I
usually have to decrease my clearance very slightly (say from 0.2mm to 0.199mm)
to make DRC pass. Is this a known issue among the devs working on GAL/PNS, and
is there any plan to do something about it? I suppose it's probably quite
difficult to make PNS perfectly emulate the behavior DRC uses - maybe we could
do something like applying a very small error margin to the clearance in PNS so
it doesn't route things *exactly* to the clearance?

-- 
Chris