kicad-developers team mailing list archive

[Simon Richter <Simon.Richter@xxxxxxxxxx>]

Hi,

On 03.05.2016 14:40, Tomasz Wlostowski wrote:

> - net_tie: DRC treats the primitive as non-conducting and doesn't throw
> a short circuit error (see drawing A)

That requires the net tie to have a size that is at least larger than
the minimum clearance of any of the netclasses involved.

My current use case is a pad that is part of a large zone, and a single
trace that is connected to the pad, but should not be merged with the
zone (so I can connect both sides of a current detection shunt to an
op-amp), can this be sanely mapped here?

The other difficult use case I can see is splitting a clock line with
length control, by defining the common part and the split ends as
distinct nets, tying them together in a single spot and then using the
length matching tools.

So far, my approach was to treat net ties as circular copper pads with
the diameter set to the width of the smallest netclass connected (so in
essence it is always covered, the area is mainly useful for grabbing and
moving it).

DRC is not the main problem with net ties, but rather interaction
between traces, zones and pads. I've attached what I'd think would be
appropriate behaviour for a few cases:

 - two traces simply meet, without error.
 - trace-zone clearance is respected until the trace's endpoint, and the
connection made beyond the endpoint
 - trace-zone clearance is ignored inside pads that are connected to the
zone.

The more complex cases still need definitions, but these are the cases I
think are immediately useful.

The classic net tie between two zones can be realized by placing the
control point between the zones, and drawing a trace in each direction.

Last but not least, I'm still not convinced that representing these as
components and footprints with special tags has real advantages over
creating special types within the schematic, netlist and PCB file --
while the file format may be syntactically backwards compatible, older
versions still would not understand the magic tags and possibly generate
incorrect gerber output as the special handling requirements are ignored.

In addition, it is bad UI: components gain more and more special tags,
leading to clutter in the component editor, while program features are
hidden in the library -- to actually use a net tie you'd have to know
that something like that is available as a component, then select a
variant with the appropriate number of pins, place it and connect
everything, so I'd really prefer a separate tool here (FWIW, I'd also
like to see power symbols generated from a small set of drawings rather
than stored in a library, because the library approach already gave us a
hundred symbols to select from, but there is still no "+2V5A" symbol).

   Simon

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