kicad-developers team mailing list archive

[Prabhu Sammandam <prabhusammandam@xxxxxxxxx>]

Hi Jean-Pierre,

I am using the negative photo resist method for making the PCB. I tried the
following method but I am not satisfied with that.

1. Selected the PDF as the Plot format.
2. Selected Negative plot option and then plotted.
3. Even-though the Edge cut is drawn, the plotted PDF included a big black
rectangle around the Edge cut as shown below.
[image: Inline images 1]

So I used the gerber plot to make negative film.

Regards,
Prabhu

On 12 June 2016 at 22:44, Clemens Koller <cko@xxxxxxxxx> wrote:

> Hi, there!
>
> On 2016-06-12 17:25, Cheng Sheng wrote:
> > [...]
> > What it does is: If a via appears on F.Cu layer, print it also on F.Mask
> layer; same for B.Cu layer via on B.Mask layer.
>
> This "feature" - to open up (selected) vias in the solder mask - seems
> especially useful when
> vias are used as testpoints (for flying-probe- or in-circuit-testing,
> etc.).
>
> In some other designtool there are rules envolved that these vias can be
> placed automatically
> to make nets available on some side and they only become a testpoint when
> the clearance to a
> component outline or courtyard is above some probe diameter.
> Then, there are rules if the vias should be opened on top, bottom or both
> sides,
> depending how the board gets probed.
>
> Wishlist: It should be possible to automatically selectively open up vias
> on top/bottom
> from the solder masks following some of these given rules.
>
> Regards,
>
> Clemens
>
>
>
>
>
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