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Re: Power components vs labels

 

On Tue, Aug 02, 2016 at 02:01:23PM -0400, Wayne Stambaugh wrote:
> [snip]
> 
> You are correct.  A symbol (power or otherwise) is not a component.  It
> is a symbolic representation of a component or anything else that needs
> to represented that is useful when designing PCBs.

...except that it is a SCH_COMPONENT. If we're going to emphasize that
symbols and components are not the same thing, we should probably
clarify that the codebase calls them incorrectly  ;)


> ... Power symbols are
> useful for ERC.  What about net ties?  There is no component involved
> with a net-tie yet it has a footprint that represents the user's desired
> connection pattern in a PCB.  I've seen other EDA products allow for
> virtual (in BOM but not in netlist) symbols for creating BOMs that
> include hardware that are not directly part of the PCB.  Sure, we could
> represent each of those objects differently both internally and what we
> present to the user but they are all so similar in scope that the symbol
> concept makes sense.  If we want to present these "special" symbols to
> the user as something else, I'm fine with that but I'm not sure how
> useful that is but internally they can still be represented as symbols.
> 
> > 
> > It really is (or at least should be) nothing more than a specialized global net label.
> > 
> > -a
> 
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