kicad-developers team mailing list archive

[Wayne Stambaugh <stambaughw@xxxxxxxxx>]

On 8/2/2016 4:10 PM, Chris Pavlina wrote:
> On Tue, Aug 02, 2016 at 10:07:25PM +0200, Clemens Koller wrote:
>> Hi, Chris!
>>
>> [snip]
>>
>> I am not sure how to support version management easily regarding that.
>> Timestamps can be quite annoying, when that's the only change.
> 
> I just want to quote this for emphasis. The timestamps are quite
> annoying, as are other things that get updated when nothing has actually
> changed - for instance annotation going through and reannotating every
> single power port.

This isn't really a file format issue but rather an annotation issue in
Eeschema.

> 
>>
>>
>>
>> Another idea:
>> Visually connected components could be detected as a "subcircuit" or simply
>> a "group" of components and might become one blob in the schematic file.
>> The current file format seems rather "flat" regarding that - Components
>> and wires are separated from each other or mixed/interleaved without
>> further associations.
>>
>> Hmm... no more cents, here...
>>
>> Regards,
>>
>> Clemens
>>
>> _______________________________________________
>> Mailing list: https://launchpad.net/~kicad-developers
>> Post to     : kicad-developers@xxxxxxxxxxxxxxxxxxx
>> Unsubscribe : https://launchpad.net/~kicad-developers
>> More help   : https://help.launchpad.net/ListHelp
> 
> _______________________________________________
> Mailing list: https://launchpad.net/~kicad-developers
> Post to     : kicad-developers@xxxxxxxxxxxxxxxxxxx
> Unsubscribe : https://launchpad.net/~kicad-developers
> More help   : https://help.launchpad.net/ListHelp
>