kicad-developers team mailing list archive

[Chris Pavlina <pavlina.chris@xxxxxxxxx>]

One more thing that is unusably slow in GAL with this board - yes, yes,
on a release build - is setting layer visibility. Takes a good 15
seconds each. If I want to switch a batch of layers, I've been switching
to legacy to do it, then back to GAL.

On Fri, Aug 12, 2016 at 09:22:48AM -0400, Chris Pavlina wrote:
> Sure. You can use it as a benchmark for all the other things that are
> slow in KiCad too :D
> 
> https://github.com/c4puter/motherboard/raw/master/motherboard.kicad_pcb
> 
> Things I have found to be irritatingly slow with this board, that might
> be worth looking at:
> 
> - Ending routing operations on a highly populateld net, like GND.
>   Seriously, just try drawing a trace on ground, and see how long it
>   freezes after each segment is placed!
> 
> - Netlist generation. I had a go at rewriting the algorithm for this
>   (it's O(n^3) and doesn't need to be...) but didn't get very far with
>   limited time.
> 
> - Netlist import. I optimized this a bit with the bounding box
>   memoization, could use more.
> 
> - Track clearance check. The other parts of DRC are reasonable, but the
>   track clearance check takes over two full minutes on everything I've
>   tried it on (except my nice workstation at $work, where it takes
>   1:45...)
> 
> 
> On Fri, Aug 12, 2016 at 02:49:02PM +0200, Tomasz Wlostowski wrote:
> > On 12.08.2016 02:32, Chris Pavlina wrote:
> > > I'm running into an extremely irritating UI bug with DRC on this big
> > > board - halfway through DRC, the progress dialog is torn down and
> > > reopened. DRC is taking two full minutes with this board, which means I
> > > invariably do something else while it runs
> > 
> > 
> > Hi Chris,
> > 
> > Could you send me your PCB? I'd be very glad to use it as a benchmark
> > for faster DRC algorithm in the future.
> > 
> > Cheers,
> > Tom
> >