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Message #26433
Re: Via Stitching
Hi,
I made some improvements to my patch of via stitching. Now you can just
point copper pour place and press V, it make trough via. If you press
SHIFT+CTRL+V it make buried or blind via.It does not change working layer.
Only when you place buried or blind via from different layer than it's
layer pair is. I think that it is quite easy to shoot board full of copper
pours connecting vias. It is possible to remove connecting tracks from old
designs. Just delete connection from pad and use clenup. Only have to
remember that if there are not at least two copper pours in same netcode in
different layers via is deleted too. Any support?
Heikki
On Sat, Sep 24, 2016 at 3:06 PM, Heikki Pulkkinen <hei6mail@xxxxxxxxx>
wrote:
> Hi everybody,
>
> This is my suggestion to via stitching without any tracks. It connects
> unconnected vias in different copper pours witch has same netcode. Adding
> vias is normal routing process without routing tracks. Start - Change Layer
> - End. Tool that do those things automatically would be good, so you can
> add all vias in same layer. After adding vias, run "Fill or Refill All
> Zones" that "Clenup tracks and vias" do not remove partly connected vias.
>
>
> Heikki
>
diff --git a/CMakeModules/FindwxWidgets.cmake b/CMakeModules/FindwxWidgets.cmake
index 9a6e56f..f2882c0 100644
--- a/CMakeModules/FindwxWidgets.cmake
+++ b/CMakeModules/FindwxWidgets.cmake
@@ -733,7 +733,8 @@ else()
#-----------------------------------------------------------------
# Support cross-compiling, only search in the target platform.
find_program(wxWidgets_CONFIG_EXECUTABLE
- NAMES wx-config wx-config-3.1 wx-config-3.0 wx-config-2.9 wx-config-2.8
+ #Fedora must build against compat-wx libs.
+ NAMES wx-config-3.0-gtk2 wx-config wx-config-3.1 wx-config-3.0 wx-config-2.9 wx-config-2.8
DOC "Location of wxWidgets library configuration provider binary (wx-config)."
ONLY_CMAKE_FIND_ROOT_PATH
)
diff --git a/pcbnew/clean.cpp b/pcbnew/clean.cpp
index 7ee4083..3c81a67 100644
--- a/pcbnew/clean.cpp
+++ b/pcbnew/clean.cpp
@@ -153,6 +153,9 @@ bool TRACKS_CLEANER::CleanupBoard( PCB_EDIT_FRAME *aFrame,
{
bool modified = false;
+ //Compile ratsnest to remove unconnected single vias from zone.
+ aFrame->Compile_Ratsnest( NULL, true );
+
// delete redundant vias
modified |= (aCleanVias && clean_vias());
diff --git a/pcbnew/connect.cpp b/pcbnew/connect.cpp
index 50c3805..f907f78 100644
--- a/pcbnew/connect.cpp
+++ b/pcbnew/connect.cpp
@@ -34,6 +34,7 @@
#include <wxBasePcbFrame.h>
#include <pcbnew.h>
+#include <class_zone.h>
// Helper classes to handle connection points
#include <connect.h>
@@ -946,6 +947,77 @@ void PCB_BASE_FRAME::RecalculateAllTracksNetcode()
for( TRACK* track = m_Pcb->m_Track; track; track = track->Next() )
track->ViewUpdate();
+ //Connect unconnected single vias in copper pours.
+ int num_areas = m_Pcb->GetAreaCount();
+ if(num_areas > 1)
+ {
+ for( TRACK* track = m_Pcb->m_Track; track; track = track->Next() )
+ {
+ int netcode = track->GetNetCode();
+ const VIA* via = dynamic_cast<const VIA*>( track );
+ if( !netcode && via )
+ {
+ LAYER_ID via_top_layer, via_bottom_layer;
+ via->LayerPair( &via_top_layer, &via_bottom_layer );
+ wxPoint via_point = via->GetEnd();
+
+ //Collect all areas that hits with via.
+ std::vector<ZONE_CONTAINER*> area_v;
+ int front_layer_netcode = 0, bottom_layer_netcode = 0;
+ for( int area_index = 0; area_index < num_areas; area_index++ )
+ {
+ ZONE_CONTAINER* area = m_Pcb->GetArea( area_index );
+ if(area)
+ {
+ LAYER_NUM area_layer = area->GetLayer();
+ if( (area_layer >= via_top_layer) && (area_layer <= via_bottom_layer) )
+ {
+ if( area->HitTestFilledArea( via_point ) )
+ {
+ area_v.push_back( area );
+ //Check front and bottom hits. For main rule.
+ if( area_layer == F_Cu)
+ front_layer_netcode = area->GetNetCode();
+ if( area_layer == B_Cu)
+ bottom_layer_netcode = area->GetNetCode();
+ }
+ }
+ }
+ }
+
+ //Main rule. If front and bottom layer hits with same net code.
+ if( ( ( front_layer_netcode && bottom_layer_netcode ) )
+ && ( front_layer_netcode == bottom_layer_netcode ) )
+ {
+ track->SetNetCode( front_layer_netcode );
+ }
+ else //Other rule(s).
+ {
+ //Connect first two different zones have a same net code.
+ bool hit = false;
+ for( ZONE_CONTAINER* area1 : area_v )
+ {
+ for( ZONE_CONTAINER* area2 : area_v )
+ {
+ if( area1 != area2 )
+ {
+ int net_code1 = area1->GetNetCode();
+ if( net_code1 == area2->GetNetCode() )
+ {
+ track->SetNetCode( net_code1 );
+ hit = true;
+ break;
+ }
+ }
+ }
+ if(hit)
+ break;
+ }
+ }
+ }
+ }
+ }
+
// Sort the track list by net codes:
RebuildTrackChain( m_Pcb );
}
diff --git a/pcbnew/hotkeys_board_editor.cpp b/pcbnew/hotkeys_board_editor.cpp
index 516388d..71c3944 100644
--- a/pcbnew/hotkeys_board_editor.cpp
+++ b/pcbnew/hotkeys_board_editor.cpp
@@ -372,6 +372,14 @@ bool PCB_EDIT_FRAME::OnHotKey( wxDC* aDC, int aHotkeyCode, const wxPoint& aPosit
if( !itemCurrentlyEdited ) // no track in progress: switch layer only
{
+ //Add via with stitching
+ if( GetToolId() == ID_TRACK_BUTT )
+ {
+ TRACK* track = Begin_Route( NULL, aDC );
+ Other_Layer_Route( track, aDC );
+ End_Route( track, aDC );
+ }
+
Other_Layer_Route( NULL, aDC );
if( displ_opts->m_ContrastModeDisplay )
m_canvas->Refresh();
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