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Re: Via Stitching

 

Hi Wayne,

If you try this, I send the last full patch of that Via Stitching. Do not
care other patches in mailing list, they are more or less incomplete.

Regards

Heikki

On Tue, Oct 18, 2016 at 3:22 PM, Wayne Stambaugh <stambaughw@xxxxxxxxx>
wrote:

> I will look at when I get a chance.  When that will be I cannot say for
> sure.  I've just been really busy.  I will try to get around to it this
> weekend.
>
> Cheers,
>
> Wayne
>
> On 10/17/2016 3:40 PM, Jakub Kozdon wrote:
> > Hi, it looks usable.
> >
> > Don't know if it is visible for all, but Wayne, what do you think about
> it?
> >
> > Jakub
> >
> > Dne 16.10.2016 v 19:23 Heikki Pulkkinen napsal(a):
> >> Hi,
> >>
> >> I add array feature to my Via Stitching. And an another slowly video
> >> to watch.
> >> https://youtu.be/28nfoZPg2bg
> >>
> >> Full fixed patch and array test patch. More work have to be done, but
> >> this was easy start.
> >>
> >> Regards
> >>
> >> Heikki
> >>
> >> On Thu, Oct 13, 2016 at 7:23 PM, Heikki Pulkkinen <hei6mail@xxxxxxxxx
> >> <mailto:hei6mail@xxxxxxxxx>> wrote:
> >>
> >>     Hi,
> >>
> >>     Here is demovideo about via stitching. It is slowly, because of
> >>     slowly machine. I do some development too, so full patch is
> >>     attached too.
> >>
> >>     On Tue, Oct 11, 2016 at 5:49 PM, Marcos Chaparro
> >>     <nitrousnrg@xxxxxxxxx <mailto:nitrousnrg@xxxxxxxxx>> wrote:
> >>
> >>         Hi Heikki,
> >>         is there any chance to make some screenshots or video about
> >>         this? Some of us do compile kicad to get the latest and
> >>         greatest but never applied a patch for a particular feature.
> >>
> >>         Regards
> >>
> >>
> >>         Marcos
> >>
> >>         On Sat, Oct 8, 2016 at 7:04 AM, Heikki Pulkkinen
> >>         <hei6mail@xxxxxxxxx <mailto:hei6mail@xxxxxxxxx>> wrote:
> >>
> >>             Hi,
> >>
> >>             Putting back that my via stitching tool to routing tool.
> >>             It is better that way, I think. All via tools are in same
> >>             place, and it adds vias to pours only from hotkeys.
> >>
> >>
> >>
> >>             On Sun, Oct 2, 2016 at 12:28 PM, Heikki Pulkkinen
> >>             <hei6mail@xxxxxxxxx <mailto:hei6mail@xxxxxxxxx>> wrote:
> >>
> >>                 Hi,
> >>
> >>                 Finally Via Stitching without tracks is at zone tool.
> >>                 I tested it little bit, but more tests are needed.
> >>                 This patch replace all other patches. Do not use them,
> >>                 use only this patch. I think this is worth of try. I
> >>                 am going to use it anyway, even if it do not get any
> >>                 acceptance. First patch is for Fedora users. It makes
> >>                 possible to build Kicad in Fedora release wxWidgets
> >>                 libs whitout building wxWidget from source. I do not
> >>                 know has anybody else that problem, but I had.
> >>
> >>
> >>                 Heikki
> >>
> >>                 On Tue, Sep 27, 2016 at 6:46 PM, Heikki Pulkkinen
> >>                 <hei6mail@xxxxxxxxx <mailto:hei6mail@xxxxxxxxx>> wrote:
> >>
> >>                     Hi
> >>
> >>                     And I really practice. I made improvement and
> >>                     forgot to copy all. So improvement is in these two
> >>                     patches. I hope this suggestion is accepted as a
> >>                     new feature.
> >>
> >>                     Heikki
> >>
> >>                     On Tue, Sep 27, 2016 at 2:31 PM, Heikki Pulkkinen
> >>                     <hei6mail@xxxxxxxxx <mailto:hei6mail@xxxxxxxxx>>
> >>                     wrote:
> >>
> >>                         Hi,
> >>
> >>                         As in  practice, I made a patch file of my
> >>                         changes Not only diifs. It is SHIFT-ALT-V
> >>                         hotkey whitch make buried and blind vias, as
> >>                         it is in routing too.
> >>
> >>
> >>                         Heikki
> >>
> >>                         On Sun, Sep 25, 2016 at 2:25 PM, Heikki
> >>                         Pulkkinen <hei6mail@xxxxxxxxx
> >>                         <mailto:hei6mail@xxxxxxxxx>> wrote:
> >>
> >>                             Hi,
> >>
> >>                             I made some improvements to my patch of
> >>                             via stitching. Now you can just point
> >>                             copper pour place and press V, it make
> >>                             trough via. If you press SHIFT+CTRL+V it
> >>                             make buried or blind via.It does not
> >>                             change working layer. Only when you place
> >>                             buried or blind via from different layer
> >>                             than it's layer pair is. I think that it
> >>                             is quite easy to shoot board full of
> >>                             copper pours connecting vias. It is
> >>                             possible to remove connecting tracks from
> >>                             old designs. Just delete connection from
> >>                             pad and use clenup. Only have to remember
> >>                             that if there are not at least two copper
> >>                             pours in same netcode in different layers
> >>                             via is deleted too. Any support?
> >>
> >>
> >>                             Heikki
> >>
> >>                             On Sat, Sep 24, 2016 at 3:06 PM, Heikki
> >>                             Pulkkinen <hei6mail@xxxxxxxxx
> >>                             <mailto:hei6mail@xxxxxxxxx>> wrote:
> >>
> >>                                 Hi everybody,
> >>
> >>                                 This is my suggestion to via stitching
> >>                                 without any tracks. It connects
> >>                                 unconnected vias in different copper
> >>                                 pours witch has same netcode. Adding
> >>                                 vias is normal routing process without
> >>                                 routing tracks. Start - Change Layer -
> >>                                 End. Tool that do those things
> >>                                 automatically would be good, so you
> >>                                 can add all vias in same layer. After
> >>                                 adding vias, run "Fill or Refill All
> >>                                 Zones" that "Clenup tracks and vias"
> >>                                 do not remove partly connected vias.
> >>
> >>
> >>                                 Heikki
> >>
> >>
> >>
> >>
> >>
> >>
> >>
> >>             _______________________________________________
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> >>             <mailto:kicad-developers@xxxxxxxxxxxxxxxxxxx>
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> >>
> >>
> >>
> >>
> >>
> >>
> >> _______________________________________________
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> >
> >
>
From cf322295de53e36ce31a58a1152cfc59c9ca2914 Mon Sep 17 00:00:00 2001
From: heikki <hei6mail@xxxxxxxxx>
Date: Fri, 21 Oct 2016 12:47:07 +0300
Subject: [PATCH 5/6] Via Stitching
MIME-Version: 1.0
Content-Type: multipart/mixed; boundary="------------2.7.4"

This is a multi-part message in MIME format.
--------------2.7.4
Content-Type: text/plain; charset=UTF-8; format=fixed
Content-Transfer-Encoding: 8bit

---
 pcbnew/connect.cpp              | 72 +++++++++++++++++++++++++++++++++++++++++
 pcbnew/edit.cpp                 | 46 ++++++++++++++++++++++++++
 pcbnew/hotkeys_board_editor.cpp | 15 +++++++--
 pcbnew/onrightclick.cpp         | 18 +++++++++++
 pcbnew/pcbnew_id.h              |  2 ++
 5 files changed, 150 insertions(+), 3 deletions(-)


--------------2.7.4
Content-Type: text/x-patch; name="0005-Via-Stitching.patch"
Content-Transfer-Encoding: 8bit
Content-Disposition: attachment; filename="0005-Via-Stitching.patch"

diff --git a/pcbnew/connect.cpp b/pcbnew/connect.cpp
index 50c3805..f907f78 100644
--- a/pcbnew/connect.cpp
+++ b/pcbnew/connect.cpp
@@ -34,6 +34,7 @@
 #include <wxBasePcbFrame.h>
 
 #include <pcbnew.h>
+#include <class_zone.h>
 
 // Helper classes to handle connection points
 #include <connect.h>
@@ -946,6 +947,77 @@ void PCB_BASE_FRAME::RecalculateAllTracksNetcode()
     for( TRACK* track = m_Pcb->m_Track; track; track = track->Next() )
         track->ViewUpdate();
 
+    //Connect unconnected single vias in copper pours. 
+    int num_areas = m_Pcb->GetAreaCount();
+    if(num_areas > 1)
+    {
+        for( TRACK* track = m_Pcb->m_Track;  track;  track = track->Next() )
+        {
+            int netcode = track->GetNetCode();
+            const VIA*  via = dynamic_cast<const VIA*>( track );
+            if( !netcode && via )
+            {
+                LAYER_ID    via_top_layer, via_bottom_layer;
+                via->LayerPair( &via_top_layer, &via_bottom_layer );
+                wxPoint via_point = via->GetEnd();
+                
+                //Collect all areas that hits with via.
+                std::vector<ZONE_CONTAINER*> area_v;
+                int front_layer_netcode = 0, bottom_layer_netcode = 0;
+                for( int area_index = 0; area_index < num_areas; area_index++ )
+                {
+                    ZONE_CONTAINER* area  = m_Pcb->GetArea( area_index );
+                    if(area)
+                    {
+                        LAYER_NUM area_layer = area->GetLayer();
+                        if( (area_layer >= via_top_layer) && (area_layer <= via_bottom_layer) )
+                        {
+                            if( area->HitTestFilledArea( via_point ) )
+                            {
+                                area_v.push_back( area );
+                                //Check front and bottom hits. For main rule.
+                                if( area_layer == F_Cu)
+                                    front_layer_netcode = area->GetNetCode();
+                                if( area_layer == B_Cu)
+                                    bottom_layer_netcode = area->GetNetCode();
+                            }
+                        }
+                    }
+                }
+                
+                //Main rule. If front and bottom layer hits with same net code.
+                if( (    ( front_layer_netcode && bottom_layer_netcode ) ) 
+                      && ( front_layer_netcode == bottom_layer_netcode ) )
+                {
+                    track->SetNetCode( front_layer_netcode );
+                }
+                else //Other rule(s).
+                {
+                    //Connect first two different zones have a same net code.
+                    bool hit = false;
+                    for( ZONE_CONTAINER* area1 : area_v )
+                    {
+                        for( ZONE_CONTAINER* area2 : area_v )
+                        {
+                            if( area1 != area2 )
+                            {
+                                int net_code1 = area1->GetNetCode();
+                                if( net_code1 == area2->GetNetCode() )
+                                {
+                                    track->SetNetCode( net_code1 );
+                                    hit = true;
+                                    break;
+                                }
+                            }                                
+                        }
+                        if(hit)
+                            break;
+                    }
+                }
+            }
+        }
+    }
+
     // Sort the track list by net codes:
     RebuildTrackChain( m_Pcb );
 }
diff --git a/pcbnew/edit.cpp b/pcbnew/edit.cpp
index 12ebcb3..3f33502 100644
--- a/pcbnew/edit.cpp
+++ b/pcbnew/edit.cpp
@@ -117,6 +117,8 @@ void PCB_EDIT_FRAME::Process_Special_Functions( wxCommandEvent& event )
     case ID_POPUP_PCB_PLACE_DRAGGED_ZONE_OUTLINE_SEGMENT:
     case ID_POPUP_PCB_MOVE_ZONE_OUTLINES:
     case ID_POPUP_PCB_ADD_ZONE_CORNER:
+    case ID_POPUP_PCB_PLACE_ZONE_THROUGH_VIA:
+    case ID_POPUP_PCB_PLACE_ZONE_BLIND_BURIED_VIA:
     case ID_POPUP_PCB_DELETE_TRACKSEG:
     case ID_POPUP_PCB_DELETE_TRACK:
     case ID_POPUP_PCB_DELETE_TRACKNET:
@@ -678,6 +680,50 @@ void PCB_EDIT_FRAME::Process_Special_Functions( wxCommandEvent& event )
         m_canvas->Refresh();
         break;
 
+    case ID_POPUP_PCB_PLACE_ZONE_THROUGH_VIA:
+        GetBoard()->GetDesignSettings().m_CurrentViaType = VIA_THROUGH;
+    case ID_POPUP_PCB_PLACE_ZONE_BLIND_BURIED_VIA:
+        {
+            if( id == ID_POPUP_PCB_PLACE_ZONE_BLIND_BURIED_VIA  )
+            {
+                if( GetBoard()->GetDesignSettings().m_BlindBuriedViaAllowed )
+                    GetBoard()->GetDesignSettings().m_CurrentViaType = VIA_BLIND_BURIED;
+                else
+                    break;
+            }
+            
+            //Set right layerpair.
+            Other_Layer_Route( NULL, &dc );
+            Other_Layer_Route( NULL, &dc );
+            
+            LAYER_ID layer = GetActiveLayer();
+            wxPoint pos = GetCrossHairPosition();
+            ZONE_CONTAINER* zone = GetBoard()->HitTestForAnyFilledArea( pos, layer, layer, -1 );
+
+            if( zone )
+            {
+                TRACK* track = Begin_Route( NULL, &dc );
+                if( track )
+                {
+                    if( track->GetNetCode() )
+                    {
+                        Other_Layer_Route( track, &dc );
+                        if( layer == GetActiveLayer() )
+                        {
+                            g_CurrentTrackList.DeleteAll();
+                            SetCurItem( NULL );
+                        }
+                        else
+                            End_Route( track, &dc );
+                    }
+                    else
+                        End_Route( track, &dc );
+                }
+                SetActiveLayer( layer );
+            }
+        }    
+        break;
+        
     case ID_POPUP_PCB_MOVE_TEXTEPCB_REQUEST:
         StartMoveTextePcb( (TEXTE_PCB*) GetCurItem(), &dc );
         m_canvas->SetAutoPanRequest( true );
diff --git a/pcbnew/hotkeys_board_editor.cpp b/pcbnew/hotkeys_board_editor.cpp
index 516388d..350e87c 100644
--- a/pcbnew/hotkeys_board_editor.cpp
+++ b/pcbnew/hotkeys_board_editor.cpp
@@ -372,9 +372,17 @@ bool PCB_EDIT_FRAME::OnHotKey( wxDC* aDC, int aHotkeyCode, const wxPoint& aPosit
 
         if( !itemCurrentlyEdited ) // no track in progress: switch layer only
         {
-            Other_Layer_Route( NULL, aDC );
-            if( displ_opts->m_ContrastModeDisplay )
-                m_canvas->Refresh();
+            //Add stitch via.
+            if( GetToolId() == ID_TRACK_BUTT )
+            {
+                evt_type = hk_id == HK_ADD_BLIND_BURIED_VIA ?
+                ID_POPUP_PCB_PLACE_ZONE_BLIND_BURIED_VIA : ID_POPUP_PCB_PLACE_ZONE_THROUGH_VIA;
+                break;
+            }
+            //Why to change layers.
+            //Other_Layer_Route( NULL, aDC );
+            //if( displ_opts->m_ContrastModeDisplay )
+            //    m_canvas->Refresh();
             break;
         }
 
@@ -1071,6 +1079,7 @@ bool PCB_EDIT_FRAME::OnHotkeyDuplicateOrArrayItem( int aIdCommand )
     case PCB_LINE_T:
     case PCB_TEXT_T:
     case PCB_TRACE_T:
+    case PCB_VIA_T:
     case PCB_ZONE_AREA_T:
     case PCB_TARGET_T:
     case PCB_DIMENSION_T:
diff --git a/pcbnew/onrightclick.cpp b/pcbnew/onrightclick.cpp
index f5ed5d0..692f37d 100644
--- a/pcbnew/onrightclick.cpp
+++ b/pcbnew/onrightclick.cpp
@@ -398,6 +398,18 @@ bool PCB_EDIT_FRAME::OnRightClick( const wxPoint& aMousePos, wxMenu* aPopMenu )
                          _( "Select Working Layer" ), KiBitmap( select_w_layer_xpm ) );
             AddMenuItem( aPopMenu, ID_POPUP_PCB_SELECT_LAYER_PAIR,
                          _( "Select Layer Pair for Vias" ), KiBitmap( select_layer_pair_xpm ) );
+
+            msg = AddHotkeyName( _( "Place Through Stitch Via" ), g_Board_Editor_Hokeys_Descr,
+                                 HK_ADD_THROUGH_VIA );
+            AddMenuItem( aPopMenu, ID_POPUP_PCB_PLACE_ZONE_THROUGH_VIA, msg, KiBitmap( via_xpm ) );
+            if( GetDesignSettings().m_BlindBuriedViaAllowed )
+            {
+                msg = AddHotkeyName( _( "Place Blind/Buried Stitch Via" ),
+                                    g_Board_Editor_Hokeys_Descr, HK_ADD_BLIND_BURIED_VIA );
+                AddMenuItem( aPopMenu, ID_POPUP_PCB_PLACE_ZONE_BLIND_BURIED_VIA, 
+                             msg, KiBitmap( via_buried_xpm ) );
+            }
+
             aPopMenu->AppendSeparator();
         }
         break;
@@ -635,6 +647,12 @@ void PCB_EDIT_FRAME::createPopupMenuForTracks( TRACK* Track, wxMenu* PopMenu )
     AddMenuItem( PopMenu, Append_Track_Width_List( GetBoard() ), ID_POPUP_PCB_SELECT_WIDTH,
                  _( "Select Track Width" ), KiBitmap( width_track_xpm ) );
 
+    if( !flags && (Track->Type() == PCB_VIA_T) )
+    {
+        msg = AddHotkeyName( _("Create Via Array" ), g_Board_Editor_Hokeys_Descr, HK_CREATE_ARRAY );
+        AddMenuItem( PopMenu, ID_POPUP_PCB_CREATE_ARRAY, msg, KiBitmap( via_xpm ) );
+    }
+    
     // Delete control:
     PopMenu->AppendSeparator();
     wxMenu* trackdel_mnu = new wxMenu;
diff --git a/pcbnew/pcbnew_id.h b/pcbnew/pcbnew_id.h
index e5a6e90..f77031c 100644
--- a/pcbnew/pcbnew_id.h
+++ b/pcbnew/pcbnew_id.h
@@ -124,6 +124,8 @@ enum pcbnew_ids
     ID_POPUP_PCB_PLACE_DRAGGED_ZONE_OUTLINE_SEGMENT,
     ID_POPUP_PCB_REMOVE_FILLED_AREAS_IN_ALL_ZONES,
     ID_POPUP_PCB_REMOVE_FILLED_AREAS_IN_CURRENT_ZONE,
+    ID_POPUP_PCB_PLACE_ZONE_THROUGH_VIA,
+    ID_POPUP_PCB_PLACE_ZONE_BLIND_BURIED_VIA,
 
     ID_POPUP_PCB_DELETE_MARKER,
 

--------------2.7.4--



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