kicad-developers team mailing list archive

[Heikki Pulkkinen <hei6mail@xxxxxxxxx>]

Hi Wayne and all,

About that my suggestion of Via Stitching. I do some tests and found that
if DRC first fill zones and then do tests it does not break anything. if
you forgot to Fill or Refill zoenes before running DRC.

Regards

Heikki


On Fri, Oct 21, 2016 at 6:41 PM, Heikki Pulkkinen <hei6mail@xxxxxxxxx>
wrote:

> Hi Wayne,
>
> If you try this, I send the last full patch of that Via Stitching. Do not
> care other patches in mailing list, they are more or less incomplete.
>
> Regards
>
> Heikki
>
> On Tue, Oct 18, 2016 at 3:22 PM, Wayne Stambaugh <stambaughw@xxxxxxxxx>
> wrote:
>
>> I will look at when I get a chance.  When that will be I cannot say for
>> sure.  I've just been really busy.  I will try to get around to it this
>> weekend.
>>
>> Cheers,
>>
>> Wayne
>>
>> On 10/17/2016 3:40 PM, Jakub Kozdon wrote:
>> > Hi, it looks usable.
>> >
>> > Don't know if it is visible for all, but Wayne, what do you think about
>> it?
>> >
>> > Jakub
>> >
>> > Dne 16.10.2016 v 19:23 Heikki Pulkkinen napsal(a):
>> >> Hi,
>> >>
>> >> I add array feature to my Via Stitching. And an another slowly video
>> >> to watch.
>> >> https://youtu.be/28nfoZPg2bg
>> >>
>> >> Full fixed patch and array test patch. More work have to be done, but
>> >> this was easy start.
>> >>
>> >> Regards
>> >>
>> >> Heikki
>> >>
>> >> On Thu, Oct 13, 2016 at 7:23 PM, Heikki Pulkkinen <hei6mail@xxxxxxxxx
>> >> <mailto:hei6mail@xxxxxxxxx>> wrote:
>> >>
>> >>     Hi,
>> >>
>> >>     Here is demovideo about via stitching. It is slowly, because of
>> >>     slowly machine. I do some development too, so full patch is
>> >>     attached too.
>> >>
>> >>     On Tue, Oct 11, 2016 at 5:49 PM, Marcos Chaparro
>> >>     <nitrousnrg@xxxxxxxxx <mailto:nitrousnrg@xxxxxxxxx>> wrote:
>> >>
>> >>         Hi Heikki,
>> >>         is there any chance to make some screenshots or video about
>> >>         this? Some of us do compile kicad to get the latest and
>> >>         greatest but never applied a patch for a particular feature.
>> >>
>> >>         Regards
>> >>
>> >>
>> >>         Marcos
>> >>
>> >>         On Sat, Oct 8, 2016 at 7:04 AM, Heikki Pulkkinen
>> >>         <hei6mail@xxxxxxxxx <mailto:hei6mail@xxxxxxxxx>> wrote:
>> >>
>> >>             Hi,
>> >>
>> >>             Putting back that my via stitching tool to routing tool.
>> >>             It is better that way, I think. All via tools are in same
>> >>             place, and it adds vias to pours only from hotkeys.
>> >>
>> >>
>> >>
>> >>             On Sun, Oct 2, 2016 at 12:28 PM, Heikki Pulkkinen
>> >>             <hei6mail@xxxxxxxxx <mailto:hei6mail@xxxxxxxxx>> wrote:
>> >>
>> >>                 Hi,
>> >>
>> >>                 Finally Via Stitching without tracks is at zone tool.
>> >>                 I tested it little bit, but more tests are needed.
>> >>                 This patch replace all other patches. Do not use them,
>> >>                 use only this patch. I think this is worth of try. I
>> >>                 am going to use it anyway, even if it do not get any
>> >>                 acceptance. First patch is for Fedora users. It makes
>> >>                 possible to build Kicad in Fedora release wxWidgets
>> >>                 libs whitout building wxWidget from source. I do not
>> >>                 know has anybody else that problem, but I had.
>> >>
>> >>
>> >>                 Heikki
>> >>
>> >>                 On Tue, Sep 27, 2016 at 6:46 PM, Heikki Pulkkinen
>> >>                 <hei6mail@xxxxxxxxx <mailto:hei6mail@xxxxxxxxx>>
>> wrote:
>> >>
>> >>                     Hi
>> >>
>> >>                     And I really practice. I made improvement and
>> >>                     forgot to copy all. So improvement is in these two
>> >>                     patches. I hope this suggestion is accepted as a
>> >>                     new feature.
>> >>
>> >>                     Heikki
>> >>
>> >>                     On Tue, Sep 27, 2016 at 2:31 PM, Heikki Pulkkinen
>> >>                     <hei6mail@xxxxxxxxx <mailto:hei6mail@xxxxxxxxx>>
>> >>                     wrote:
>> >>
>> >>                         Hi,
>> >>
>> >>                         As in  practice, I made a patch file of my
>> >>                         changes Not only diifs. It is SHIFT-ALT-V
>> >>                         hotkey whitch make buried and blind vias, as
>> >>                         it is in routing too.
>> >>
>> >>
>> >>                         Heikki
>> >>
>> >>                         On Sun, Sep 25, 2016 at 2:25 PM, Heikki
>> >>                         Pulkkinen <hei6mail@xxxxxxxxx
>> >>                         <mailto:hei6mail@xxxxxxxxx>> wrote:
>> >>
>> >>                             Hi,
>> >>
>> >>                             I made some improvements to my patch of
>> >>                             via stitching. Now you can just point
>> >>                             copper pour place and press V, it make
>> >>                             trough via. If you press SHIFT+CTRL+V it
>> >>                             make buried or blind via.It does not
>> >>                             change working layer. Only when you place
>> >>                             buried or blind via from different layer
>> >>                             than it's layer pair is. I think that it
>> >>                             is quite easy to shoot board full of
>> >>                             copper pours connecting vias. It is
>> >>                             possible to remove connecting tracks from
>> >>                             old designs. Just delete connection from
>> >>                             pad and use clenup. Only have to remember
>> >>                             that if there are not at least two copper
>> >>                             pours in same netcode in different layers
>> >>                             via is deleted too. Any support?
>> >>
>> >>
>> >>                             Heikki
>> >>
>> >>                             On Sat, Sep 24, 2016 at 3:06 PM, Heikki
>> >>                             Pulkkinen <hei6mail@xxxxxxxxx
>> >>                             <mailto:hei6mail@xxxxxxxxx>> wrote:
>> >>
>> >>                                 Hi everybody,
>> >>
>> >>                                 This is my suggestion to via stitching
>> >>                                 without any tracks. It connects
>> >>                                 unconnected vias in different copper
>> >>                                 pours witch has same netcode. Adding
>> >>                                 vias is normal routing process without
>> >>                                 routing tracks. Start - Change Layer -
>> >>                                 End. Tool that do those things
>> >>                                 automatically would be good, so you
>> >>                                 can add all vias in same layer. After
>> >>                                 adding vias, run "Fill or Refill All
>> >>                                 Zones" that "Clenup tracks and vias"
>> >>                                 do not remove partly connected vias.
>> >>
>> >>
>> >>                                 Heikki
>> >>
>> >>
>> >>
>> >>
>> >>
>> >>
>> >>
>> >>             _______________________________________________
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>> >>             <https://launchpad.net/%7Ekicad-developers>
>> >>             Post to     : kicad-developers@xxxxxxxxxxxxxxxxxxx
>> >>             <mailto:kicad-developers@xxxxxxxxxxxxxxxxxxx>
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>> >>             More help   : https://help.launchpad.net/ListHelp
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>> >>
>> >>
>> >>
>> >>
>> >>
>> >>
>> >> _______________________________________________
>> >> Mailing list: https://launchpad.net/~kicad-developers
>> >> Post to     : kicad-developers@xxxxxxxxxxxxxxxxxxx
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>> >
>> >
>>
>
>

From 1a37bc5e4a02ca7d5495927c6016b8e35f10b794 Mon Sep 17 00:00:00 2001
From: heikki <hei6mail@xxxxxxxxx>
Date: Sun, 23 Oct 2016 16:31:54 +0300
Subject: [PATCH 9/9] Via Stitching DRC Fill Zones First
MIME-Version: 1.0
Content-Type: multipart/mixed; boundary="------------2.7.4"

This is a multi-part message in MIME format.
--------------2.7.4
Content-Type: text/plain; charset=UTF-8; format=fixed
Content-Transfer-Encoding: 8bit

---
 pcbnew/drc.cpp | 22 +++++++++++-----------
 1 file changed, 11 insertions(+), 11 deletions(-)


--------------2.7.4
Content-Type: text/x-patch; name="0009-Via-Stitching-DRC-Fill-Zones-First.patch"
Content-Transfer-Encoding: 8bit
Content-Disposition: attachment; filename="0009-Via-Stitching-DRC-Fill-Zones-First.patch"

diff --git a/pcbnew/drc.cpp b/pcbnew/drc.cpp
index 6b47778..13e486c 100644
--- a/pcbnew/drc.cpp
+++ b/pcbnew/drc.cpp
@@ -192,6 +192,17 @@ void DRC::RunTests( wxTextCtrl* aMessages )
     // ( the board can be reloaded )
     m_pcb = m_pcbEditorFrame->GetBoard();
 
+    // Before testing segments and unconnected, refill all zones:
+    // this is a good caution, because filled areas can be outdated.
+    if( aMessages )
+    {
+        aMessages->AppendText( _( "Fill zones...\n" ) );
+        wxSafeYield();
+    }
+
+    m_pcbEditorFrame->Fill_All_Zones( aMessages ? aMessages->GetParent() : m_pcbEditorFrame,
+                                  false );
+
     // Ensure ratsnest is up to date:
     if( (m_pcb->m_Status_Pcb & LISTE_RATSNEST_ITEM_OK) == 0 )
     {
@@ -243,17 +254,6 @@ void DRC::RunTests( wxTextCtrl* aMessages )
 
     testTracks( aMessages ? aMessages->GetParent() : m_pcbEditorFrame, true );
 
-    // Before testing segments and unconnected, refill all zones:
-    // this is a good caution, because filled areas can be outdated.
-    if( aMessages )
-    {
-        aMessages->AppendText( _( "Fill zones...\n" ) );
-        wxSafeYield();
-    }
-
-    m_pcbEditorFrame->Fill_All_Zones( aMessages ? aMessages->GetParent() : m_pcbEditorFrame,
-                                  false );
-
     // test zone clearances to other zones
     if( aMessages )
     {

--------------2.7.4--