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Mailing list archive
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Message #26978
Re: template revision
Le 12/12/2016 à 17:34, Marco Ciampa a écrit :
> Just a heads up... apparently some templates need some form of revision.
>
> Some template prompt for an inexistent "special" lib.
> Some template prompt for old symbols.
>
> This in 4.0.4 stable.
>
> Regards,
>
> --
>
>
> Marco Ciampa
Attached a patch.
--
Jean-Pierre CHARRAS
cfadcdccf323e5790fe97e2f5c4bc3f59f567faa
.../Arduino_As_Uno_R3/Arduino_As_Uno-cache.lib | 14 +-
template/Arduino_As_Uno_R3/Arduino_As_Uno.cmp | 59 ---
template/Arduino_As_Uno_R3/Arduino_As_Uno.sch | 42 +-
template/Arduino_As_Uno_R3/fp-lib-table | 3 +
template/Arduino_Fio/Arduino_Fio-cache.lib | 8 +-
template/Arduino_Fio/Arduino_Fio.cmp | 17 -
template/Arduino_Fio/Arduino_Fio.sch | 10 +-
template/Arduino_Fio/fp-lib-table | 3 +
template/Arduino_Mega_R3/Arduino_Mega-cache.lib | 14 +-
template/Arduino_Mega_R3/Arduino_Mega.cmp | 94 -----
template/Arduino_Mega_R3/Arduino_Mega.sch | 28 +-
template/Arduino_Mega_R3/fp-lib-table | 3 +
template/Arduino_Micro/Arduino_Micro-cache.lib | 14 +-
template/Arduino_Micro/Arduino_Micro.cmp | 45 ---
template/Arduino_Micro/Arduino_Micro.pro | 31 +-
template/Arduino_Micro/Arduino_Micro.sch | 30 +-
template/Arduino_Micro/fp-lib-table | 3 +
.../raspberrypi-gpio/raspberrypi-gpio-cache.lib | 50 ++-
template/raspberrypi-gpio/raspberrypi-gpio.cmp | 10 -
.../raspberrypi-gpio/raspberrypi-gpio.kicad_pcb | 269 +++++++------
template/raspberrypi-gpio/raspberrypi-gpio.net | 146 +++++--
template/raspberrypi-gpio/raspberrypi-gpio.pro | 65 +---
template/raspberrypi-gpio/raspberrypi-gpio.sch | 35 +-
template/stm32f100-discovery-shield/fp-lib-table | 3 +
.../stm32f100-discovery-shield-cache.lib | 52 ++-
.../stm32f100-discovery-shield.cmp | 24 --
.../stm32f100-discovery-shield.kicad_pcb | 426 ++++++++-------------
.../stm32f100-discovery-shield.mod | 276 -------------
.../stm32f100-discovery-shield.net | 287 ++++++++++----
.../stm32f100-discovery-shield.pro | 64 +---
.../stm32f100-discovery-shield.sch | 359 +++++++++--------
.../boosterpack40-cache.lib | 51 ++-
.../ti-stellaris-boosterpack40/boosterpack40.cmp | 38 --
.../ti-stellaris-boosterpack40/boosterpack40.net | 272 +++++++++----
.../ti-stellaris-boosterpack40/boosterpack40.pro | 46 +--
.../ti-stellaris-boosterpack40/boosterpack40.sch | 55 ++-
.../boosterpack40_min.kicad_pcb | 344 -----------------
.../boosterpack40_min-cache.lib | 49 ++-
.../boosterpack40_min.cmp | 38 --
.../boosterpack40_min.kicad_pcb | 271 +++++--------
.../boosterpack40_min.net | 243 +++++++++---
.../boosterpack40_min.pro | 76 ++--
.../boosterpack40_min.sch | 97 +++--
.../ti-stellaris-boosterpack40_min/fp-lib-table | 2 +
44 files changed, 1720 insertions(+), 2346 deletions(-)
diff --git a/template/Arduino_As_Uno_R3/Arduino_As_Uno-cache.lib b/template/Arduino_As_Uno_R3/Arduino_As_Uno-cache.lib
index bf74a35..110d953 100644
--- a/template/Arduino_As_Uno_R3/Arduino_As_Uno-cache.lib
+++ b/template/Arduino_As_Uno_R3/Arduino_As_Uno-cache.lib
@@ -10,9 +10,9 @@ F2 "" 0 0 50 H V C CNN
F3 "" 0 0 50 H V C CNN
ALIAS +3.3V
DRAW
-P 2 0 1 0 -30 50 0 100 N
-P 2 0 1 0 0 0 0 100 N
-P 2 0 1 0 0 100 30 50 N
+P 2 0 1 0 -30 50 0 100 N
+P 2 0 1 0 0 0 0 100 N
+P 2 0 1 0 0 100 30 50 N
X +3V3 1 0 0 0 U 50 50 1 1 W N
ENDDRAW
ENDDEF
@@ -25,9 +25,9 @@ F1 "+5V" 0 140 50 H V C CNN
F2 "" 0 0 50 H V C CNN
F3 "" 0 0 50 H V C CNN
DRAW
-P 2 0 1 0 -30 50 0 100 N
-P 2 0 1 0 0 0 0 100 N
-P 2 0 1 0 0 100 30 50 N
+P 2 0 1 0 -30 50 0 100 N
+P 2 0 1 0 0 0 0 100 N
+P 2 0 1 0 0 100 30 50 N
X +5V 1 0 0 0 U 50 50 1 1 W N
ENDDRAW
ENDDEF
@@ -162,7 +162,7 @@ F1 "GND" 0 -150 50 H V C CNN
F2 "" 0 0 50 H V C CNN
F3 "" 0 0 50 H V C CNN
DRAW
-P 6 0 1 0 0 0 0 -50 50 -50 0 -100 -50 -50 0 -50 N
+P 6 0 1 0 0 0 0 -50 50 -50 0 -100 -50 -50 0 -50 N
X GND 1 0 0 0 D 50 50 1 1 W N
ENDDRAW
ENDDEF
diff --git a/template/Arduino_As_Uno_R3/Arduino_As_Uno.cmp b/template/Arduino_As_Uno_R3/Arduino_As_Uno.cmp
deleted file mode 100644
index dbd4c40..0000000
--- a/template/Arduino_As_Uno_R3/Arduino_As_Uno.cmp
+++ /dev/null
@@ -1,59 +0,0 @@
-Cmp-Mod V01 Created by Cvpcb (2015-03-25 BZR 5536)-product date = mer. 08 avril 2015 09:59:14 UTC
-
-BeginCmp
-TimeStamp = /5517C2C1;
-Reference = P1;
-ValeurCmp = Power;
-IdModule = Socket_Arduino_Uno:Socket_Strip_Arduino_1x08;
-EndCmp
-
-BeginCmp
-TimeStamp = /5517C323;
-Reference = P2;
-ValeurCmp = Analog;
-IdModule = Socket_Arduino_Uno:Socket_Strip_Arduino_1x06;
-EndCmp
-
-BeginCmp
-TimeStamp = /5517C46C;
-Reference = P3;
-ValeurCmp = Digital;
-IdModule = Socket_Arduino_Uno:Socket_Strip_Arduino_1x10;
-EndCmp
-
-BeginCmp
-TimeStamp = /5517C366;
-Reference = P4;
-ValeurCmp = Digital;
-IdModule = Socket_Arduino_Uno:Socket_Strip_Arduino_1x08;
-EndCmp
-
-BeginCmp
-TimeStamp = /551BBC06;
-Reference = P5;
-ValeurCmp = CONN_1;
-IdModule = Socket_Arduino_Uno:Arduino_1pin;
-EndCmp
-
-BeginCmp
-TimeStamp = /551BBD10;
-Reference = P6;
-ValeurCmp = CONN_1;
-IdModule = Socket_Arduino_Uno:Arduino_1pin;
-EndCmp
-
-BeginCmp
-TimeStamp = /551BBD30;
-Reference = P7;
-ValeurCmp = CONN_1;
-IdModule = Socket_Arduino_Uno:Arduino_1pin;
-EndCmp
-
-BeginCmp
-TimeStamp = /551BBD52;
-Reference = P8;
-ValeurCmp = CONN_1;
-IdModule = Socket_Arduino_Uno:Arduino_1pin;
-EndCmp
-
-EndListe
diff --git a/template/Arduino_As_Uno_R3/Arduino_As_Uno.sch b/template/Arduino_As_Uno_R3/Arduino_As_Uno.sch
index 9aae88c..14deefa 100644
--- a/template/Arduino_As_Uno_R3/Arduino_As_Uno.sch
+++ b/template/Arduino_As_Uno_R3/Arduino_As_Uno.sch
@@ -45,7 +45,7 @@ Comment4 ""
$EndDescr
Text Label 8950 1450 1 60 ~ 0
Vin
-Text Label 9300 1450 1 60 ~ 0
+Text Label 9350 1450 1 60 ~ 0
IOREF
Text Label 8900 2500 0 60 ~ 0
A0
@@ -104,7 +104,7 @@ U 1 1 56D70129
P 9600 1950
F 0 "P1" H 9600 2400 50 0000 C CNN
F 1 "Power" V 9700 1950 50 0000 C CNN
-F 2 "Socket_Arduino_Uno:Socket_Strip_Arduino_1x08" H 9600 1950 50 0001 C CNN
+F 2 "Socket_Arduino_Uno:Socket_Strip_Arduino_1x08" V 9750 1950 20 0000 C CNN
F 3 "" H 9600 1950 50 0000 C CNN
1 9600 1950
1 0 0 -1
@@ -116,7 +116,7 @@ L +3.3V #PWR01
U 1 1 56D70538
P 9150 1450
F 0 "#PWR01" H 9150 1300 50 0001 C CNN
-F 1 "+3.3V" H 9150 1590 30 0000 C CNN
+F 1 "+3.3V" H 9150 1590 50 0000 C CNN
F 2 "" H 9150 1450 50 0000 C CNN
F 3 "" H 9150 1450 50 0000 C CNN
1 9150 1450
@@ -125,12 +125,12 @@ $EndComp
$Comp
L +5V #PWR02
U 1 1 56D707BB
-P 9050 1450
-F 0 "#PWR02" H 9050 1300 50 0001 C CNN
-F 1 "+5V" H 9050 1590 30 0000 C CNN
-F 2 "" H 9050 1450 50 0000 C CNN
-F 3 "" H 9050 1450 50 0000 C CNN
- 1 9050 1450
+P 9050 1350
+F 0 "#PWR02" H 9050 1200 50 0001 C CNN
+F 1 "+5V" H 9050 1490 50 0000 C CNN
+F 2 "" H 9050 1350 50 0000 C CNN
+F 3 "" H 9050 1350 50 0000 C CNN
+ 1 9050 1350
1 0 0 -1
$EndComp
$Comp
@@ -161,7 +161,7 @@ U 1 1 56D70DD8
P 9600 2750
F 0 "P2" H 9600 3100 50 0000 C CNN
F 1 "Analog" V 9700 2750 50 0000 C CNN
-F 2 "Socket_Arduino_Uno:Socket_Strip_Arduino_1x06" H 9600 2750 50 0001 C CNN
+F 2 "Socket_Arduino_Uno:Socket_Strip_Arduino_1x06" V 9750 2800 20 0000 C CNN
F 3 "" H 9600 2750 50 0000 C CNN
1 9600 2750
1 0 0 -1
@@ -172,7 +172,7 @@ U 1 1 56D71177
P 10800 650
F 0 "P5" V 10900 650 50 0000 C CNN
F 1 "CONN_01X01" V 10900 650 50 0001 C CNN
-F 2 "Socket_Arduino_Uno:Arduino_1pin" H 10800 650 50 0001 C CNN
+F 2 "Socket_Arduino_Uno:Arduino_1pin" H 10721 724 20 0000 C CNN
F 3 "" H 10800 650 50 0000 C CNN
1 10800 650
0 -1 -1 0
@@ -183,7 +183,7 @@ U 1 1 56D71274
P 10900 650
F 0 "P6" V 11000 650 50 0000 C CNN
F 1 "CONN_01X01" V 11000 650 50 0001 C CNN
-F 2 "Socket_Arduino_Uno:Arduino_1pin" H 10900 650 50 0001 C CNN
+F 2 "Socket_Arduino_Uno:Arduino_1pin" H 10900 650 20 0001 C CNN
F 3 "" H 10900 650 50 0000 C CNN
1 10900 650
0 -1 -1 0
@@ -194,7 +194,7 @@ U 1 1 56D712A8
P 11000 650
F 0 "P7" V 11100 650 50 0000 C CNN
F 1 "CONN_01X01" V 11100 650 50 0001 C CNN
-F 2 "Socket_Arduino_Uno:Arduino_1pin" H 11000 650 50 0001 C CNN
+F 2 "Socket_Arduino_Uno:Arduino_1pin" V 11000 650 20 0001 C CNN
F 3 "" H 11000 650 50 0000 C CNN
1 11000 650
0 -1 -1 0
@@ -205,7 +205,7 @@ U 1 1 56D712DB
P 11100 650
F 0 "P8" V 11200 650 50 0000 C CNN
F 1 "CONN_01X01" V 11200 650 50 0001 C CNN
-F 2 "Socket_Arduino_Uno:Arduino_1pin" H 11100 650 50 0001 C CNN
+F 2 "Socket_Arduino_Uno:Arduino_1pin" H 11024 572 20 0000 C CNN
F 3 "" H 11100 650 50 0000 C CNN
1 11100 650
0 -1 -1 0
@@ -220,7 +220,7 @@ U 1 1 56D7164F
P 10000 2650
F 0 "P4" H 10000 3100 50 0000 C CNN
F 1 "Digital" V 10100 2650 50 0000 C CNN
-F 2 "Socket_Arduino_Uno:Socket_Strip_Arduino_1x08" H 10000 2650 50 0001 C CNN
+F 2 "Socket_Arduino_Uno:Socket_Strip_Arduino_1x08" V 10150 2600 20 0000 C CNN
F 3 "" H 10000 2650 50 0000 C CNN
1 10000 2650
-1 0 0 -1
@@ -230,9 +230,9 @@ Wire Notes Line
Wire Notes Line
9925 825 9925 475
Wire Wire Line
- 9300 1450 9300 1700
+ 9350 1450 9350 1700
Wire Wire Line
- 9300 1700 9400 1700
+ 9350 1700 9400 1700
Wire Wire Line
9400 1900 9150 1900
Wire Wire Line
@@ -247,7 +247,7 @@ Connection ~ 9300 2200
Wire Wire Line
8950 2300 8950 1450
Wire Wire Line
- 9050 2000 9050 1450
+ 9050 2000 9050 1350
Wire Wire Line
9150 1900 9150 1450
Wire Wire Line
@@ -268,7 +268,7 @@ U 1 1 56D721E0
P 10000 1650
F 0 "P3" H 10000 2200 50 0000 C CNN
F 1 "Digital" V 10100 1650 50 0000 C CNN
-F 2 "Socket_Arduino_Uno:Socket_Strip_Arduino_1x10" H 10000 1650 50 0001 C CNN
+F 2 "Socket_Arduino_Uno:Socket_Strip_Arduino_1x10" V 10150 1650 20 0000 C CNN
F 3 "" H 10000 1650 50 0000 C CNN
1 10000 1650
-1 0 0 -1
@@ -312,7 +312,9 @@ Wire Wire Line
Wire Wire Line
10300 1500 10300 3150
Wire Wire Line
- 9300 2100 9300 3150
+ 9300 2100 9300 2200
+Wire Wire Line
+ 9300 2200 9300 3150
Wire Notes Line
8500 500 8500 3450
Wire Notes Line
diff --git a/template/Arduino_As_Uno_R3/fp-lib-table b/template/Arduino_As_Uno_R3/fp-lib-table
new file mode 100644
index 0000000..67350e4
--- /dev/null
+++ b/template/Arduino_As_Uno_R3/fp-lib-table
@@ -0,0 +1,3 @@
+(fp_lib_table
+ (lib (name Socket_Arduino_Uno)(type KiCad)(uri "$(KIPRJMOD)\\Socket_Arduino_Uno.pretty")(options "")(descr ""))
+)
diff --git a/template/Arduino_Fio/Arduino_Fio-cache.lib b/template/Arduino_Fio/Arduino_Fio-cache.lib
index a0eaae2..63860d9 100644
--- a/template/Arduino_Fio/Arduino_Fio-cache.lib
+++ b/template/Arduino_Fio/Arduino_Fio-cache.lib
@@ -10,9 +10,9 @@ F2 "" 0 0 50 H V C CNN
F3 "" 0 0 50 H V C CNN
ALIAS +3.3V
DRAW
-P 2 0 1 0 -30 50 0 100 N
-P 2 0 1 0 0 0 0 100 N
-P 2 0 1 0 0 100 30 50 N
+P 2 0 1 0 -30 50 0 100 N
+P 2 0 1 0 0 0 0 100 N
+P 2 0 1 0 0 100 30 50 N
X +3V3 1 0 0 0 U 50 50 1 1 W N
ENDDRAW
ENDDEF
@@ -71,7 +71,7 @@ F1 "GND" 0 -150 50 H V C CNN
F2 "" 0 0 50 H V C CNN
F3 "" 0 0 50 H V C CNN
DRAW
-P 6 0 1 0 0 0 0 -50 50 -50 0 -100 -50 -50 0 -50 N
+P 6 0 1 0 0 0 0 -50 50 -50 0 -100 -50 -50 0 -50 N
X GND 1 0 0 0 D 50 50 1 1 W N
ENDDRAW
ENDDEF
diff --git a/template/Arduino_Fio/Arduino_Fio.cmp b/template/Arduino_Fio/Arduino_Fio.cmp
deleted file mode 100644
index 6a2c36d..0000000
--- a/template/Arduino_Fio/Arduino_Fio.cmp
+++ /dev/null
@@ -1,17 +0,0 @@
-Cmp-Mod V01 Created by Cvpcb (2015-03-25 BZR 5536)-product date = sam. 04 avril 2015 11:58:44 UTC
-
-BeginCmp
-TimeStamp = /551FCE8A;
-Reference = P1;
-ValeurCmp = Digital;
-IdModule = Socket_Arduino_Fio:Socket_Strip_Straight_1x14;
-EndCmp
-
-BeginCmp
-TimeStamp = /551FCED2;
-Reference = P2;
-ValeurCmp = Analog;
-IdModule = Socket_Arduino_Fio:Socket_Strip_Straight_1x14;
-EndCmp
-
-EndListe
diff --git a/template/Arduino_Fio/Arduino_Fio.sch b/template/Arduino_Fio/Arduino_Fio.sch
index e71603c..83c971d 100644
--- a/template/Arduino_Fio/Arduino_Fio.sch
+++ b/template/Arduino_Fio/Arduino_Fio.sch
@@ -106,8 +106,8 @@ L CONN_01X14 P1
U 1 1 56D705A1
P 9750 1700
F 0 "P1" H 9750 2450 50 0000 C CNN
-F 1 "Digital" V 9850 1700 50 0000 C CNN
-F 2 "Socket_Arduino_Fio:Socket_Strip_Straight_1x14" H 9750 1700 50 0001 C CNN
+F 1 "Digital" H 9750 950 50 0000 C CNN
+F 2 "Socket_Arduino_Fio:Socket_Strip_Straight_1x14" V 9850 1700 30 0000 C CNN
F 3 "" H 9750 1700 50 0000 C CNN
1 9750 1700
1 0 0 -1
@@ -117,8 +117,8 @@ L CONN_01X14 P2
U 1 1 56D706EC
P 10100 1700
F 0 "P2" H 10100 2450 50 0000 C CNN
-F 1 "Analog" V 10200 1700 50 0000 C CNN
-F 2 "Socket_Arduino_Fio:Socket_Strip_Straight_1x14" H 10100 1700 50 0001 C CNN
+F 1 "Analog" H 10100 950 50 0000 C CNN
+F 2 "Socket_Arduino_Fio:Socket_Strip_Straight_1x14" V 10200 1700 30 0000 C CNN
F 3 "" H 10100 1700 50 0000 C CNN
1 10100 1700
-1 0 0 -1
@@ -231,6 +231,4 @@ Wire Wire Line
10700 2250 10300 2250
Wire Wire Line
10700 2350 10300 2350
-Text Notes 9850 1050 0 60 ~ 0
-1
$EndSCHEMATC
diff --git a/template/Arduino_Fio/fp-lib-table b/template/Arduino_Fio/fp-lib-table
new file mode 100644
index 0000000..6efa3e7
--- /dev/null
+++ b/template/Arduino_Fio/fp-lib-table
@@ -0,0 +1,3 @@
+(fp_lib_table
+ (lib (name Socket_Arduino_Fio)(type KiCad)(uri "$(KIPRJMOD)\\Socket_Arduino_Fio.pretty")(options "")(descr ""))
+)
diff --git a/template/Arduino_Mega_R3/Arduino_Mega-cache.lib b/template/Arduino_Mega_R3/Arduino_Mega-cache.lib
index 071fcaa..9af50df 100644
--- a/template/Arduino_Mega_R3/Arduino_Mega-cache.lib
+++ b/template/Arduino_Mega_R3/Arduino_Mega-cache.lib
@@ -10,9 +10,9 @@ F2 "" 0 0 50 H V C CNN
F3 "" 0 0 50 H V C CNN
ALIAS +3.3V
DRAW
-P 2 0 1 0 -30 50 0 100 N
-P 2 0 1 0 0 0 0 100 N
-P 2 0 1 0 0 100 30 50 N
+P 2 0 1 0 -30 50 0 100 N
+P 2 0 1 0 0 0 0 100 N
+P 2 0 1 0 0 100 30 50 N
X +3V3 1 0 0 0 U 50 50 1 1 W N
ENDDRAW
ENDDEF
@@ -25,9 +25,9 @@ F1 "+5V" 0 140 50 H V C CNN
F2 "" 0 0 50 H V C CNN
F3 "" 0 0 50 H V C CNN
DRAW
-P 2 0 1 0 -30 50 0 100 N
-P 2 0 1 0 0 0 0 100 N
-P 2 0 1 0 0 100 30 50 N
+P 2 0 1 0 -30 50 0 100 N
+P 2 0 1 0 0 0 0 100 N
+P 2 0 1 0 0 100 30 50 N
X +5V 1 0 0 0 U 50 50 1 1 W N
ENDDRAW
ENDDEF
@@ -222,7 +222,7 @@ F1 "GND" 0 -150 50 H V C CNN
F2 "" 0 0 50 H V C CNN
F3 "" 0 0 50 H V C CNN
DRAW
-P 6 0 1 0 0 0 0 -50 50 -50 0 -100 -50 -50 0 -50 N
+P 6 0 1 0 0 0 0 -50 50 -50 0 -100 -50 -50 0 -50 N
X GND 1 0 0 0 D 50 50 1 1 W N
ENDDRAW
ENDDEF
diff --git a/template/Arduino_Mega_R3/Arduino_Mega.cmp b/template/Arduino_Mega_R3/Arduino_Mega.cmp
deleted file mode 100644
index 50e457a..0000000
--- a/template/Arduino_Mega_R3/Arduino_Mega.cmp
+++ /dev/null
@@ -1,94 +0,0 @@
-Cmp-Mod V01 Created by Cvpcb (2015-03-25 BZR 5536)-product date = mer. 08 avril 2015 10:06:02 UTC
-
-BeginCmp
-TimeStamp = /5519A11D;
-Reference = P1;
-ValeurCmp = Digital;
-IdModule = Socket_Arduino_Mega:Socket_Strip_Arduino_2x18;
-EndCmp
-
-BeginCmp
-TimeStamp = /5519888A;
-Reference = P2;
-ValeurCmp = Power;
-IdModule = Socket_Arduino_Mega:Socket_Strip_Arduino_1x08;
-EndCmp
-
-BeginCmp
-TimeStamp = /5519891B;
-Reference = P3;
-ValeurCmp = Analog;
-IdModule = Socket_Arduino_Mega:Socket_Strip_Arduino_1x08;
-EndCmp
-
-BeginCmp
-TimeStamp = /551989CF;
-Reference = P4;
-ValeurCmp = Analog;
-IdModule = Socket_Arduino_Mega:Socket_Strip_Arduino_1x08;
-EndCmp
-
-BeginCmp
-TimeStamp = /55198BE2;
-Reference = P5;
-ValeurCmp = PWM;
-IdModule = Socket_Arduino_Mega:Socket_Strip_Arduino_1x10;
-EndCmp
-
-BeginCmp
-TimeStamp = /55198A32;
-Reference = P6;
-ValeurCmp = PWM;
-IdModule = Socket_Arduino_Mega:Socket_Strip_Arduino_1x08;
-EndCmp
-
-BeginCmp
-TimeStamp = /55198B76;
-Reference = P7;
-ValeurCmp = Communication;
-IdModule = Socket_Arduino_Mega:Socket_Strip_Arduino_1x08;
-EndCmp
-
-BeginCmp
-TimeStamp = /551BBA20;
-Reference = P8;
-ValeurCmp = CONN_1;
-IdModule = Socket_Arduino_Mega:Arduino_1pin;
-EndCmp
-
-BeginCmp
-TimeStamp = /551BBB85;
-Reference = P9;
-ValeurCmp = CONN_1;
-IdModule = Socket_Arduino_Mega:Arduino_1pin;
-EndCmp
-
-BeginCmp
-TimeStamp = /551BBBAB;
-Reference = P10;
-ValeurCmp = CONN_1;
-IdModule = Socket_Arduino_Mega:Arduino_1pin;
-EndCmp
-
-BeginCmp
-TimeStamp = /551BBBD7;
-Reference = P11;
-ValeurCmp = CONN_1;
-IdModule = Socket_Arduino_Mega:Arduino_1pin;
-EndCmp
-
-BeginCmp
-TimeStamp = /551BBC10;
-Reference = P12;
-ValeurCmp = CONN_1;
-IdModule = Socket_Arduino_Mega:Arduino_1pin;
-EndCmp
-
-BeginCmp
-TimeStamp = /551BBC3C;
-Reference = P13;
-ValeurCmp = CONN_1;
-IdModule = Socket_Arduino_Mega:Arduino_1pin;
-EndCmp
-
-EndListe
diff --git a/template/Arduino_Mega_R3/Arduino_Mega.sch b/template/Arduino_Mega_R3/Arduino_Mega.sch
index cedacb2..06b6a01 100644
--- a/template/Arduino_Mega_R3/Arduino_Mega.sch
+++ b/template/Arduino_Mega_R3/Arduino_Mega.sch
@@ -288,7 +288,7 @@ L +3.3V #PWR01
U 1 1 56D71AA9
P 9100 1200
F 0 "#PWR01" H 9100 1050 50 0001 C CNN
-F 1 "+3.3V" H 9100 1340 28 0000 C CNN
+F 1 "+3.3V" H 9100 1340 50 0000 C CNN
F 2 "" H 9100 1200 50 0000 C CNN
F 3 "" H 9100 1200 50 0000 C CNN
1 9100 1200
@@ -299,12 +299,12 @@ Reset
$Comp
L +5V #PWR02
U 1 1 56D71D10
-P 9000 1200
-F 0 "#PWR02" H 9000 1050 50 0001 C CNN
-F 1 "+5V" H 9000 1340 28 0000 C CNN
-F 2 "" H 9000 1200 50 0000 C CNN
-F 3 "" H 9000 1200 50 0000 C CNN
- 1 9000 1200
+P 9000 1050
+F 0 "#PWR02" H 9000 900 50 0001 C CNN
+F 1 "+5V" H 9000 1190 50 0000 C CNN
+F 2 "" H 9000 1050 50 0000 C CNN
+F 3 "" H 9000 1050 50 0000 C CNN
+ 1 9000 1050
1 0 0 -1
$EndComp
$Comp
@@ -412,7 +412,7 @@ Wire Notes Line
Wire Wire Line
9100 1650 9350 1650
Wire Wire Line
- 9000 1200 9000 1750
+ 9000 1050 9000 1750
Wire Wire Line
9000 1750 9350 1750
Wire Wire Line
@@ -424,7 +424,9 @@ Wire Wire Line
Wire Wire Line
9350 1850 9250 1850
Wire Wire Line
- 9250 1850 9250 2150
+ 9250 1850 9250 1950
+Wire Wire Line
+ 9250 1950 9250 2150
Wire Wire Line
9350 1950 9250 1950
Connection ~ 9250 1950
@@ -611,9 +613,13 @@ F 3 "" H 10750 4550 50 0000 C CNN
$EndComp
Connection ~ 10750 4850
Wire Wire Line
- 10750 4550 10750 5350
+ 10750 4550 10750 4850
+Wire Wire Line
+ 10750 4850 10750 5350
+Wire Wire Line
+ 8650 4850 8650 5350
Wire Wire Line
- 8650 4850 8650 5750
+ 8650 5350 8650 5750
Wire Notes Line
11200 6050 8350 6050
Wire Notes Line
diff --git a/template/Arduino_Mega_R3/fp-lib-table b/template/Arduino_Mega_R3/fp-lib-table
new file mode 100644
index 0000000..de78ce5
--- /dev/null
+++ b/template/Arduino_Mega_R3/fp-lib-table
@@ -0,0 +1,3 @@
+(fp_lib_table
+ (lib (name Socket_Arduino_Mega)(type KiCad)(uri "$(KIPRJMOD)\\Socket_Arduino_Mega.pretty")(options "")(descr ""))
+)
diff --git a/template/Arduino_Micro/Arduino_Micro-cache.lib b/template/Arduino_Micro/Arduino_Micro-cache.lib
index 7d4819d..9f49964 100644
--- a/template/Arduino_Micro/Arduino_Micro-cache.lib
+++ b/template/Arduino_Micro/Arduino_Micro-cache.lib
@@ -10,9 +10,9 @@ F2 "" 0 0 50 H V C CNN
F3 "" 0 0 50 H V C CNN
ALIAS +3.3V
DRAW
-P 2 0 1 0 -30 50 0 100 N
-P 2 0 1 0 0 0 0 100 N
-P 2 0 1 0 0 100 30 50 N
+P 2 0 1 0 -30 50 0 100 N
+P 2 0 1 0 0 0 0 100 N
+P 2 0 1 0 0 100 30 50 N
X +3V3 1 0 0 0 U 50 50 1 1 W N
ENDDRAW
ENDDEF
@@ -25,9 +25,9 @@ F1 "+5V" 0 140 50 H V C CNN
F2 "" 0 0 50 H V C CNN
F3 "" 0 0 50 H V C CNN
DRAW
-P 2 0 1 0 -30 50 0 100 N
-P 2 0 1 0 0 0 0 100 N
-P 2 0 1 0 0 100 30 50 N
+P 2 0 1 0 -30 50 0 100 N
+P 2 0 1 0 0 0 0 100 N
+P 2 0 1 0 0 100 30 50 N
X +5V 1 0 0 0 U 50 50 1 1 W N
ENDDRAW
ENDDEF
@@ -112,7 +112,7 @@ F1 "GND" 0 -150 50 H V C CNN
F2 "" 0 0 50 H V C CNN
F3 "" 0 0 50 H V C CNN
DRAW
-P 6 0 1 0 0 0 0 -50 50 -50 0 -100 -50 -50 0 -50 N
+P 6 0 1 0 0 0 0 -50 50 -50 0 -100 -50 -50 0 -50 N
X GND 1 0 0 0 D 50 50 1 1 W N
ENDDRAW
ENDDEF
diff --git a/template/Arduino_Micro/Arduino_Micro.cmp b/template/Arduino_Micro/Arduino_Micro.cmp
deleted file mode 100644
index 1c233d2..0000000
--- a/template/Arduino_Micro/Arduino_Micro.cmp
+++ /dev/null
@@ -1,45 +0,0 @@
-Cmp-Mod V01 Created by Cvpcb (2015-03-25 BZR 5536)-product date = sam. 04 avril 2015 10:45:57 UTC
-
-BeginCmp
-TimeStamp = /551FB57F;
-Reference = P1;
-ValeurCmp = CONN_17;
-IdModule = Socket_Arduino_Micro:Socket_Strip_Arduino_1x17;
-EndCmp
-
-BeginCmp
-TimeStamp = /551FB60C;
-Reference = P2;
-ValeurCmp = CONN_17;
-IdModule = Socket_Arduino_Micro:Socket_Strip_Arduino_1x17;
-EndCmp
-
-BeginCmp
-TimeStamp = /551FB455;
-Reference = P3;
-ValeurCmp = CONN_1;
-IdModule = Socket_Arduino_Micro:1pin_Micro;
-EndCmp
-
-BeginCmp
-TimeStamp = /551FB4B0;
-Reference = P4;
-ValeurCmp = CONN_1;
-IdModule = Socket_Arduino_Micro:1pin_Micro;
-EndCmp
-
-BeginCmp
-TimeStamp = /551FB4D4;
-Reference = P5;
-ValeurCmp = CONN_1;
-IdModule = Socket_Arduino_Micro:1pin_Micro;
-EndCmp
-
-BeginCmp
-TimeStamp = /551FB516;
-Reference = P6;
-ValeurCmp = CONN_1;
-IdModule = Socket_Arduino_Micro:1pin_Micro;
-EndCmp
-
-EndListe
diff --git a/template/Arduino_Micro/Arduino_Micro.pro b/template/Arduino_Micro/Arduino_Micro.pro
index f1979ee..ec536ba 100644
--- a/template/Arduino_Micro/Arduino_Micro.pro
+++ b/template/Arduino_Micro/Arduino_Micro.pro
@@ -1,4 +1,4 @@
-update=mer. 02 mars 2016 15:02:35 CET
+update=13/12/2016 09:51:37
version=1
last_client=kicad
[pcbnew]
@@ -36,25 +36,10 @@ LibName4=conn
LibName5=linear
LibName6=regul
LibName7=74xx
-LibName8=cmos4000
-LibName9=adc-dac
-LibName10=memory
-LibName11=xilinx
-LibName12=microcontrollers
-LibName13=dsp
-LibName14=microchip
-LibName15=analog_switches
-LibName16=motorola
-LibName17=texas
-LibName18=intel
-LibName19=audio
-LibName20=interface
-LibName21=digital-audio
-LibName22=philips
-LibName23=display
-LibName24=cypress
-LibName25=siliconi
-LibName26=opto
-LibName27=atmel
-LibName28=contrib
-LibName29=valves
+LibName8=adc-dac
+LibName9=xilinx
+LibName10=microcontrollers
+LibName11=microchip
+LibName12=analog_switches
+LibName13=motorola
+LibName14=texas
diff --git a/template/Arduino_Micro/Arduino_Micro.sch b/template/Arduino_Micro/Arduino_Micro.sch
index 6133a8a..41e9ca2 100644
--- a/template/Arduino_Micro/Arduino_Micro.sch
+++ b/template/Arduino_Micro/Arduino_Micro.sch
@@ -115,8 +115,8 @@ L CONN_01X17 P1
U 1 1 56D719DF
P 9550 2050
F 0 "P1" H 9550 2950 50 0000 C CNN
-F 1 "Digital" V 9650 2050 50 0000 C CNN
-F 2 "Socket_Arduino_Micro:Socket_Strip_Arduino_1x17" H 9550 2050 50 0001 C CNN
+F 1 "Digital" H 9550 1150 50 0000 C CNN
+F 2 "Socket_Arduino_Micro:Socket_Strip_Arduino_1x17" V 9650 2050 30 0000 C CNN
F 3 "" H 9550 2050 50 0000 C CNN
1 9550 2050
1 0 0 -1
@@ -126,8 +126,8 @@ L CONN_01X17 P2
U 1 1 56D71A21
P 9950 2050
F 0 "P2" H 9950 2950 50 0000 C CNN
-F 1 "Analog" V 10050 2050 50 0000 C CNN
-F 2 "Socket_Arduino_Micro:Socket_Strip_Arduino_1x17" H 9950 2050 50 0001 C CNN
+F 1 "Analog" H 9950 1150 50 0000 C CNN
+F 2 "Socket_Arduino_Micro:Socket_Strip_Arduino_1x17" V 10050 2050 30 0000 C CNN
F 3 "" H 9950 2050 50 0000 C CNN
1 9950 2050
-1 0 0 -1
@@ -214,12 +214,12 @@ $EndComp
$Comp
L +3.3V #PWR04
U 1 1 56D72867
-P 10450 1100
-F 0 "#PWR04" H 10450 950 50 0001 C CNN
-F 1 "+3.3V" H 10450 1240 28 0000 C CNN
-F 2 "" H 10450 1100 50 0000 C CNN
-F 3 "" H 10450 1100 50 0000 C CNN
- 1 10450 1100
+P 10450 1000
+F 0 "#PWR04" H 10450 850 50 0001 C CNN
+F 1 "+3.3V" H 10450 1140 28 0000 C CNN
+F 2 "" H 10450 1000 50 0000 C CNN
+F 3 "" H 10450 1000 50 0000 C CNN
+ 1 10450 1000
1 0 0 -1
$EndComp
Wire Wire Line
@@ -249,7 +249,7 @@ Wire Wire Line
Wire Wire Line
10250 1550 10250 3000
Wire Wire Line
- 10450 1100 10450 2750
+ 10450 1000 10450 2750
Wire Wire Line
10450 2750 10150 2750
Wire Notes Line
@@ -260,7 +260,7 @@ U 1 1 56D72ED3
P 10800 650
F 0 "P3" V 10900 650 50 0000 C CNN
F 1 "CONN_01X01" H 10900 650 50 0001 C CNN
-F 2 "Socket_Arduino_Micro:1pin_Micro" H 10800 650 50 0001 C CNN
+F 2 "Socket_Arduino_Micro:1pin_Micro" H 10722 722 20 0000 C CNN
F 3 "" H 10800 650 50 0000 C CNN
1 10800 650
0 -1 -1 0
@@ -271,7 +271,7 @@ U 1 1 56D72FBF
P 10900 650
F 0 "P4" V 11000 650 50 0000 C CNN
F 1 "CONN_01X01" H 11000 650 50 0001 C CNN
-F 2 "Socket_Arduino_Micro:1pin_Micro" H 10900 650 50 0001 C CNN
+F 2 "Socket_Arduino_Micro:1pin_Micro" H 10900 650 20 0001 C CNN
F 3 "" H 10900 650 50 0000 C CNN
1 10900 650
0 -1 -1 0
@@ -282,7 +282,7 @@ U 1 1 56D72FE7
P 11000 650
F 0 "P5" V 11100 650 50 0000 C CNN
F 1 "CONN_01X01" H 11100 650 50 0001 C CNN
-F 2 "Socket_Arduino_Micro:1pin_Micro" H 11000 650 50 0001 C CNN
+F 2 "Socket_Arduino_Micro:1pin_Micro" H 11000 650 20 0001 C CNN
F 3 "" H 11000 650 50 0000 C CNN
1 11000 650
0 -1 -1 0
@@ -293,7 +293,7 @@ U 1 1 56D73012
P 11100 650
F 0 "P6" V 11200 650 50 0000 C CNN
F 1 "CONN_01X01" H 11200 650 50 0001 C CNN
-F 2 "Socket_Arduino_Micro:1pin_Micro" H 11100 650 50 0001 C CNN
+F 2 "Socket_Arduino_Micro:1pin_Micro" H 11019 581 20 0000 C CNN
F 3 "" H 11100 650 50 0000 C CNN
1 11100 650
0 -1 -1 0
diff --git a/template/Arduino_Micro/fp-lib-table b/template/Arduino_Micro/fp-lib-table
new file mode 100644
index 0000000..807e0eb
--- /dev/null
+++ b/template/Arduino_Micro/fp-lib-table
@@ -0,0 +1,3 @@
+(fp_lib_table
+ (lib (name Socket_Arduino_Micro)(type KiCad)(uri "$(KIPRJMOD)\\Socket_Arduino_Micro.pretty")(options "")(descr ""))
+)
diff --git a/template/raspberrypi-gpio/raspberrypi-gpio-cache.lib b/template/raspberrypi-gpio/raspberrypi-gpio-cache.lib
index e75615e..0a3d6ec 100755
--- a/template/raspberrypi-gpio/raspberrypi-gpio-cache.lib
+++ b/template/raspberrypi-gpio/raspberrypi-gpio-cache.lib
@@ -1,28 +1,34 @@
-EESchema-LIBRARY Version 2.3 Date: 15/11/2012 21:22:43
+EESchema-LIBRARY Version 2.3
#encoding utf-8
#
-# +3.3V
+# +3V3
#
-DEF +3.3V #PWR 0 0 Y Y 1 F P
-F0 "#PWR" 0 -40 30 H I C CNN
-F1 "+3.3V" 0 110 30 H V C CNN
-ALIAS +3,3V
+DEF +3V3 #PWR 0 0 Y Y 1 F P
+F0 "#PWR" 0 -150 50 H I C CNN
+F1 "+3V3" 0 140 50 H V C CNN
+F2 "" 0 0 50 H V C CNN
+F3 "" 0 0 50 H V C CNN
+ALIAS +3.3V
DRAW
-X +3.3V 1 0 0 0 U 30 30 0 0 W N
-C 0 60 20 0 1 0 N
-P 3 0 1 0 0 0 0 40 0 40 N
+P 2 0 1 0 -30 50 0 100 N
+P 2 0 1 0 0 0 0 100 N
+P 2 0 1 0 0 100 30 50 N
+X +3V3 1 0 0 0 U 50 50 1 1 W N
ENDDRAW
ENDDEF
#
# +5V
#
-DEF +5V #PWR 0 40 Y Y 1 F P
-F0 "#PWR" 0 90 20 H I C CNN
-F1 "+5V" 0 90 30 H V C CNN
+DEF +5V #PWR 0 0 Y Y 1 F P
+F0 "#PWR" 0 -150 50 H I C CNN
+F1 "+5V" 0 140 50 H V C CNN
+F2 "" 0 0 50 H V C CNN
+F3 "" 0 0 50 H V C CNN
DRAW
-X +5V 1 0 0 0 U 20 20 0 0 W N
-C 0 50 20 0 1 0 N
-P 4 0 1 0 0 0 0 30 0 30 0 30 N
+P 2 0 1 0 -30 50 0 100 N
+P 2 0 1 0 0 0 0 100 N
+P 2 0 1 0 0 100 30 50 N
+X +5V 1 0 0 0 U 50 50 1 1 W N
ENDDRAW
ENDDEF
#
@@ -31,6 +37,8 @@ ENDDEF
DEF CONN_13X2 P 0 10 Y N 1 F N
F0 "P" 0 700 60 H V C CNN
F1 "CONN_13X2" 0 0 50 V V C CNN
+F2 "" 0 0 60 H I C CNN
+F3 "" 0 0 60 H I C CNN
DRAW
S -100 650 100 -650 0 1 0 N
X P1 1 -400 600 300 R 40 30 1 1 P I
@@ -64,12 +72,14 @@ ENDDEF
#
# GND
#
-DEF ~GND #PWR 0 0 Y Y 1 F P
-F0 "#PWR" 0 0 30 H I C CNN
-F1 "GND" 0 -70 30 H I C CNN
+DEF GND #PWR 0 0 Y Y 1 F P
+F0 "#PWR" 0 -250 50 H I C CNN
+F1 "GND" 0 -150 50 H V C CNN
+F2 "" 0 0 50 H V C CNN
+F3 "" 0 0 50 H V C CNN
DRAW
-P 4 0 1 0 -50 0 0 -50 50 0 -50 0 N
-X GND 1 0 0 0 U 30 30 1 1 W N
+P 6 0 1 0 0 0 0 -50 50 -50 0 -100 -50 -50 0 -50 N
+X GND 1 0 0 0 D 50 50 1 1 W N
ENDDRAW
ENDDEF
#
diff --git a/template/raspberrypi-gpio/raspberrypi-gpio.cmp b/template/raspberrypi-gpio/raspberrypi-gpio.cmp
deleted file mode 100755
index ce0a33b..0000000
--- a/template/raspberrypi-gpio/raspberrypi-gpio.cmp
+++ /dev/null
@@ -1,10 +0,0 @@
-Cmp-Mod V01 Created by CvPcb (2012-11-15 BZR 3804)-testing date = 15/11/2012 21:23:25
-
-BeginCmp
-TimeStamp = /50A55ABA;
-Reference = P1;
-ValeurCmp = CONN_13X2;
-IdModule = pin_array_13x2;
-EndCmp
-
-EndListe
diff --git a/template/raspberrypi-gpio/raspberrypi-gpio.kicad_pcb b/template/raspberrypi-gpio/raspberrypi-gpio.kicad_pcb
index d478c00..d6ce37a 100755
--- a/template/raspberrypi-gpio/raspberrypi-gpio.kicad_pcb
+++ b/template/raspberrypi-gpio/raspberrypi-gpio.kicad_pcb
@@ -1,15 +1,15 @@
-(kicad_pcb (version 3) (host pcbnew "(2012-11-30 BZR 3829)-testing")
+(kicad_pcb (version 4) (host pcbnew 4.0.5)
(general
(links 0)
(no_connects 0)
- (area 127.606667 112.000001 242.964763 190.8)
+ (area 143.424999 124.924999 228.575001 181.075001)
(thickness 1.6)
(drawings 41)
(tracks 0)
(zones 0)
(modules 1)
- (nets 4)
+ (nets 27)
)
(page A3)
@@ -18,21 +18,21 @@
)
(layers
- (15 F.Cu signal)
- (0 B.Cu signal)
- (16 B.Adhes user)
- (17 F.Adhes user)
- (18 B.Paste user)
- (19 F.Paste user)
- (20 B.SilkS user)
- (21 F.SilkS user)
- (22 B.Mask user)
- (23 F.Mask user)
- (24 Dwgs.User user)
- (25 Cmts.User user)
- (26 Eco1.User user)
- (27 Eco2.User user)
- (28 Edge.Cuts user)
+ (0 F.Cu signal)
+ (31 B.Cu signal)
+ (32 B.Adhes user)
+ (33 F.Adhes user)
+ (34 B.Paste user)
+ (35 F.Paste user)
+ (36 B.SilkS user)
+ (37 F.SilkS user)
+ (38 B.Mask user)
+ (39 F.Mask user)
+ (40 Dwgs.User user)
+ (41 Cmts.User user)
+ (42 Eco1.User user)
+ (43 Eco2.User user)
+ (44 Edge.Cuts user)
)
(setup
@@ -63,10 +63,10 @@
(aux_axis_origin 143.5 181)
(visible_elements 7FFFFFFF)
(pcbplotparams
- (layerselection 3178497)
+ (layerselection 0x00030_80000001)
(usegerberextensions true)
(excludeedgelayer true)
- (linewidth 152400)
+ (linewidth 0.150000)
(plotframeref false)
(viasonmask false)
(mode 1)
@@ -79,7 +79,6 @@
(psa4output false)
(plotreference true)
(plotvalue true)
- (plotothertext true)
(plotinvisibletext false)
(padsonsilk false)
(subtractmaskfromsilk false)
@@ -91,9 +90,32 @@
)
(net 0 "")
- (net 1 +3.3V)
- (net 2 +5V)
- (net 3 GND)
+ (net 1 +5V)
+ (net 2 GND)
+ (net 3 +3V3)
+ (net 4 "/GPIO0(SDA)")
+ (net 5 "Net-(P1-Pad4)")
+ (net 6 "/GPIO1(SCL)")
+ (net 7 /GPIO4)
+ (net 8 /TXD)
+ (net 9 "Net-(P1-Pad9)")
+ (net 10 /RXD)
+ (net 11 /GPIO17)
+ (net 12 /GPIO18)
+ (net 13 /GPIO21)
+ (net 14 "Net-(P1-Pad14)")
+ (net 15 /GPIO22)
+ (net 16 /GPIO23)
+ (net 17 "Net-(P1-Pad17)")
+ (net 18 /GPIO24)
+ (net 19 "/GPIO10(MOSI)")
+ (net 20 "Net-(P1-Pad20)")
+ (net 21 "/GPIO9(MISO)")
+ (net 22 /GPIO25)
+ (net 23 "/GPIO11(SCLK)")
+ (net 24 "/GPIO8(CE0)")
+ (net 25 "Net-(P1-Pad25)")
+ (net 26 "/GPIO7(CE1)")
(net_class Default "This is the default net class."
(clearance 0.2)
@@ -102,10 +124,32 @@
(via_drill 0.6)
(uvia_dia 0.5)
(uvia_drill 0.1)
- (add_net "")
- (add_net +3.3V)
+ (add_net +3V3)
(add_net +5V)
+ (add_net "/GPIO0(SDA)")
+ (add_net "/GPIO1(SCL)")
+ (add_net "/GPIO10(MOSI)")
+ (add_net "/GPIO11(SCLK)")
+ (add_net /GPIO17)
+ (add_net /GPIO18)
+ (add_net /GPIO21)
+ (add_net /GPIO22)
+ (add_net /GPIO23)
+ (add_net /GPIO24)
+ (add_net /GPIO25)
+ (add_net /GPIO4)
+ (add_net "/GPIO7(CE1)")
+ (add_net "/GPIO8(CE0)")
+ (add_net "/GPIO9(MISO)")
+ (add_net /RXD)
+ (add_net /TXD)
(add_net GND)
+ (add_net "Net-(P1-Pad14)")
+ (add_net "Net-(P1-Pad17)")
+ (add_net "Net-(P1-Pad20)")
+ (add_net "Net-(P1-Pad25)")
+ (add_net "Net-(P1-Pad4)")
+ (add_net "Net-(P1-Pad9)")
)
(net_class Power ""
@@ -117,106 +161,85 @@
(uvia_drill 0.1)
)
- (module pin_array_13x2 (layer F.Cu) (tedit 50A55E7A) (tstamp 50A55DA3)
- (at 161 129)
- (descr "Double rangee de contacts 2 x 12 pins")
- (tags CONN)
+ (module Pin_Headers:Pin_Header_Straight_2x13 locked (layer F.Cu) (tedit 584FB37B) (tstamp 584FB325)
+ (at 145.75536 130.27914 90)
+ (descr "Through hole pin header")
+ (tags "pin header")
(path /50A55ABA)
- (fp_text reference P1 (at -15.5 4) (layer F.SilkS)
- (effects (font (size 1.016 1.016) (thickness 0.2032)))
+ (fp_text reference P1 (at 1.5875 32.6136 90) (layer F.SilkS)
+ (effects (font (size 1 1) (thickness 0.15)))
)
- (fp_text value CONN_13X2 (at 12 4) (layer F.SilkS)
- (effects (font (size 1.016 1.016) (thickness 0.2032)))
+ (fp_text value CONN_13X2 (at -2.37998 16.29664 180) (layer F.Fab)
+ (effects (font (size 1 1) (thickness 0.15)))
)
- (fp_line (start -16.51 2.54) (end 16.51 2.54) (layer F.SilkS) (width 0.2032))
- (fp_line (start 16.51 -2.54) (end -16.51 -2.54) (layer F.SilkS) (width 0.2032))
- (fp_line (start -16.51 -2.54) (end -16.51 2.54) (layer F.SilkS) (width 0.2032))
- (fp_line (start 16.51 2.54) (end 16.51 -2.54) (layer F.SilkS) (width 0.2032))
- (pad 1 thru_hole rect (at -15.24 1.27) (size 1.524 1.524) (drill 0.8128)
- (layers *.Cu *.Mask F.SilkS)
- (net 1 +3.3V)
- )
- (pad 2 thru_hole circle (at -15.24 -1.27) (size 1.524 1.524) (drill 1.016)
- (layers *.Cu *.Mask F.SilkS)
- (net 2 +5V)
- )
- (pad 3 thru_hole circle (at -12.7 1.27) (size 1.524 1.524) (drill 1.016)
- (layers *.Cu *.Mask F.SilkS)
- )
- (pad 4 thru_hole circle (at -12.7 -1.27) (size 1.524 1.524) (drill 1.016)
- (layers *.Cu *.Mask F.SilkS)
- )
- (pad 5 thru_hole circle (at -10.16 1.27) (size 1.524 1.524) (drill 1.016)
- (layers *.Cu *.Mask F.SilkS)
- )
- (pad 6 thru_hole circle (at -10.16 -1.27) (size 1.524 1.524) (drill 1.016)
- (layers *.Cu *.Mask F.SilkS)
- (net 3 GND)
- )
- (pad 7 thru_hole circle (at -7.62 1.27) (size 1.524 1.524) (drill 1.016)
- (layers *.Cu *.Mask F.SilkS)
- )
- (pad 8 thru_hole circle (at -7.62 -1.27) (size 1.524 1.524) (drill 1.016)
- (layers *.Cu *.Mask F.SilkS)
- )
- (pad 9 thru_hole circle (at -5.08 1.27) (size 1.524 1.524) (drill 1.016)
- (layers *.Cu *.Mask F.SilkS)
- )
- (pad 10 thru_hole circle (at -5.08 -1.27) (size 1.524 1.524) (drill 1.016)
- (layers *.Cu *.Mask F.SilkS)
- )
- (pad 11 thru_hole circle (at -2.54 1.27) (size 1.524 1.524) (drill 1.016)
- (layers *.Cu *.Mask F.SilkS)
- )
- (pad 12 thru_hole circle (at -2.54 -1.27) (size 1.524 1.524) (drill 1.016)
- (layers *.Cu *.Mask F.SilkS)
- )
- (pad 13 thru_hole circle (at 0 1.27) (size 1.524 1.524) (drill 1.016)
- (layers *.Cu *.Mask F.SilkS)
- )
- (pad 14 thru_hole circle (at 0 -1.27) (size 1.524 1.524) (drill 1.016)
- (layers *.Cu *.Mask F.SilkS)
- )
- (pad 15 thru_hole circle (at 2.54 1.27) (size 1.524 1.524) (drill 1.016)
- (layers *.Cu *.Mask F.SilkS)
- )
- (pad 16 thru_hole circle (at 2.54 -1.27) (size 1.524 1.524) (drill 1.016)
- (layers *.Cu *.Mask F.SilkS)
- )
- (pad 17 thru_hole circle (at 5.08 1.27) (size 1.524 1.524) (drill 1.016)
- (layers *.Cu *.Mask F.SilkS)
- )
- (pad 18 thru_hole circle (at 5.08 -1.27) (size 1.524 1.524) (drill 1.016)
- (layers *.Cu *.Mask F.SilkS)
- )
- (pad 19 thru_hole circle (at 7.62 1.27) (size 1.524 1.524) (drill 1.016)
- (layers *.Cu *.Mask F.SilkS)
- )
- (pad 20 thru_hole circle (at 7.62 -1.27) (size 1.524 1.524) (drill 1.016)
- (layers *.Cu *.Mask F.SilkS)
- )
- (pad 21 thru_hole circle (at 10.16 1.27) (size 1.524 1.524) (drill 1.016)
- (layers *.Cu *.Mask F.SilkS)
- )
- (pad 22 thru_hole circle (at 10.16 -1.27) (size 1.524 1.524) (drill 1.016)
- (layers *.Cu *.Mask F.SilkS)
- )
- (pad 23 thru_hole circle (at 12.7 1.27) (size 1.524 1.524) (drill 1.016)
- (layers *.Cu *.Mask F.SilkS)
- )
- (pad 24 thru_hole circle (at 12.7 -1.27) (size 1.524 1.524) (drill 1.016)
- (layers *.Cu *.Mask F.SilkS)
- )
- (pad 25 thru_hole circle (at 15.24 1.27) (size 1.524 1.524) (drill 1.016)
- (layers *.Cu *.Mask F.SilkS)
- )
- (pad 26 thru_hole circle (at 15.24 -1.27) (size 1.524 1.524) (drill 1.016)
- (layers *.Cu *.Mask F.SilkS)
- )
- (model pin_array/pins_array_13x2.wrl
- (at (xyz 0 0 0))
+ (fp_line (start -1.75 -1.75) (end -1.75 32.25) (layer F.CrtYd) (width 0.05))
+ (fp_line (start 4.3 -1.75) (end 4.3 32.25) (layer F.CrtYd) (width 0.05))
+ (fp_line (start -1.75 -1.75) (end 4.3 -1.75) (layer F.CrtYd) (width 0.05))
+ (fp_line (start -1.75 32.25) (end 4.3 32.25) (layer F.CrtYd) (width 0.05))
+ (fp_line (start 3.81 -1.27) (end 3.81 31.75) (layer F.SilkS) (width 0.15))
+ (fp_line (start -1.27 1.27) (end -1.27 31.75) (layer F.SilkS) (width 0.15))
+ (fp_line (start 3.81 31.75) (end -1.27 31.75) (layer F.SilkS) (width 0.15))
+ (fp_line (start 3.81 -1.27) (end 1.27 -1.27) (layer F.SilkS) (width 0.15))
+ (fp_line (start 0 -1.55) (end -1.55 -1.55) (layer F.SilkS) (width 0.15))
+ (fp_line (start 1.27 -1.27) (end 1.27 1.27) (layer F.SilkS) (width 0.15))
+ (fp_line (start 1.27 1.27) (end -1.27 1.27) (layer F.SilkS) (width 0.15))
+ (fp_line (start -1.55 -1.55) (end -1.55 0) (layer F.SilkS) (width 0.15))
+ (pad 1 thru_hole rect (at 0 0 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)
+ (net 3 +3V3))
+ (pad 2 thru_hole oval (at 2.54 0 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)
+ (net 1 +5V))
+ (pad 3 thru_hole oval (at 0 2.54 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)
+ (net 4 "/GPIO0(SDA)"))
+ (pad 4 thru_hole oval (at 2.54 2.54 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)
+ (net 5 "Net-(P1-Pad4)"))
+ (pad 5 thru_hole oval (at 0 5.08 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)
+ (net 6 "/GPIO1(SCL)"))
+ (pad 6 thru_hole oval (at 2.54 5.08 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)
+ (net 2 GND))
+ (pad 7 thru_hole oval (at 0 7.62 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)
+ (net 7 /GPIO4))
+ (pad 8 thru_hole oval (at 2.54 7.62 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)
+ (net 8 /TXD))
+ (pad 9 thru_hole oval (at 0 10.16 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)
+ (net 9 "Net-(P1-Pad9)"))
+ (pad 10 thru_hole oval (at 2.54 10.16 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)
+ (net 10 /RXD))
+ (pad 11 thru_hole oval (at 0 12.7 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)
+ (net 11 /GPIO17))
+ (pad 12 thru_hole oval (at 2.54 12.7 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)
+ (net 12 /GPIO18))
+ (pad 13 thru_hole oval (at 0 15.24 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)
+ (net 13 /GPIO21))
+ (pad 14 thru_hole oval (at 2.54 15.24 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)
+ (net 14 "Net-(P1-Pad14)"))
+ (pad 15 thru_hole oval (at 0 17.78 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)
+ (net 15 /GPIO22))
+ (pad 16 thru_hole oval (at 2.54 17.78 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)
+ (net 16 /GPIO23))
+ (pad 17 thru_hole oval (at 0 20.32 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)
+ (net 17 "Net-(P1-Pad17)"))
+ (pad 18 thru_hole oval (at 2.54 20.32 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)
+ (net 18 /GPIO24))
+ (pad 19 thru_hole oval (at 0 22.86 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)
+ (net 19 "/GPIO10(MOSI)"))
+ (pad 20 thru_hole oval (at 2.54 22.86 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)
+ (net 20 "Net-(P1-Pad20)"))
+ (pad 21 thru_hole oval (at 0 25.4 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)
+ (net 21 "/GPIO9(MISO)"))
+ (pad 22 thru_hole oval (at 2.54 25.4 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)
+ (net 22 /GPIO25))
+ (pad 23 thru_hole oval (at 0 27.94 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)
+ (net 23 "/GPIO11(SCLK)"))
+ (pad 24 thru_hole oval (at 2.54 27.94 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)
+ (net 24 "/GPIO8(CE0)"))
+ (pad 25 thru_hole oval (at 0 30.48 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)
+ (net 25 "Net-(P1-Pad25)"))
+ (pad 26 thru_hole oval (at 2.54 30.48 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)
+ (net 26 "/GPIO7(CE1)"))
+ (model Pin_Headers.3dshapes/Pin_Header_Straight_2x13.wrl
+ (at (xyz 0.05 -0.6 0))
(scale (xyz 1 1 1))
- (rotate (xyz 0 0 0))
+ (rotate (xyz 0 0 90))
)
)
@@ -294,6 +317,4 @@
(gr_line (start 143.5 181) (end 228.5 181) (angle 90) (layer Edge.Cuts) (width 0.15))
(gr_line (start 143.5 125) (end 143.5 181) (angle 90) (layer Edge.Cuts) (width 0.15))
-
-
)
diff --git a/template/raspberrypi-gpio/raspberrypi-gpio.net b/template/raspberrypi-gpio/raspberrypi-gpio.net
index d9fd5be..9cd9153 100755
--- a/template/raspberrypi-gpio/raspberrypi-gpio.net
+++ b/template/raspberrypi-gpio/raspberrypi-gpio.net
@@ -1,35 +1,111 @@
-# EESchema Netlist Version 1.1 created 15/11/2012 21:22:35
-(
- ( /50A55ABA $noname P1 CONN_13X2 {Lib=CONN_13X2}
- ( 1 +3.3V )
- ( 2 +5V )
- ( 3 ? )
- ( 4 ? )
- ( 5 ? )
- ( 6 GND )
- ( 7 ? )
- ( 8 ? )
- ( 9 ? )
- ( 10 ? )
- ( 11 ? )
- ( 12 ? )
- ( 13 ? )
- ( 14 ? )
- ( 15 ? )
- ( 16 ? )
- ( 17 ? )
- ( 18 ? )
- ( 19 ? )
- ( 20 ? )
- ( 21 ? )
- ( 22 ? )
- ( 23 ? )
- ( 24 ? )
- ( 25 ? )
- ( 26 ? )
- )
-)
-*
-{ Pin List by Nets
-}
-#End
+(export (version D)
+ (design
+ (source E:/kicad-git/kicad_git_libs/template/raspberrypi-gpio/raspberrypi-gpio.sch)
+ (date "13/12/2016 09:39:29")
+ (tool "Eeschema 4.0.5")
+ (sheet (number 1) (name /) (tstamps /)
+ (title_block
+ (title)
+ (company)
+ (rev)
+ (date "15 nov 2012")
+ (source raspberrypi-gpio.sch)
+ (comment (number 1) (value ""))
+ (comment (number 2) (value ""))
+ (comment (number 3) (value ""))
+ (comment (number 4) (value "")))))
+ (components
+ (comp (ref P1)
+ (value CONN_13X2)
+ (footprint Pin_Headers:Pin_Header_Straight_2x13)
+ (libsource (lib raspberrypi-gpio-cache) (part CONN_13X2))
+ (sheetpath (names /) (tstamps /))
+ (tstamp 50A55ABA)))
+ (libparts
+ (libpart (lib raspberrypi-gpio-cache) (part CONN_13X2)
+ (fields
+ (field (name Reference) P)
+ (field (name Value) CONN_13X2))
+ (pins
+ (pin (num 1) (name P1) (type passive))
+ (pin (num 2) (name P2) (type passive))
+ (pin (num 3) (name P3) (type passive))
+ (pin (num 4) (name P4) (type passive))
+ (pin (num 5) (name P5) (type passive))
+ (pin (num 6) (name P6) (type passive))
+ (pin (num 7) (name P7) (type passive))
+ (pin (num 8) (name P8) (type passive))
+ (pin (num 9) (name P9) (type passive))
+ (pin (num 10) (name P10) (type passive))
+ (pin (num 11) (name P11) (type passive))
+ (pin (num 12) (name P12) (type passive))
+ (pin (num 13) (name P13) (type passive))
+ (pin (num 14) (name P14) (type passive))
+ (pin (num 15) (name P15) (type passive))
+ (pin (num 16) (name P16) (type passive))
+ (pin (num 17) (name P17) (type passive))
+ (pin (num 18) (name P18) (type passive))
+ (pin (num 19) (name P19) (type passive))
+ (pin (num 20) (name P20) (type passive))
+ (pin (num 21) (name P21) (type passive))
+ (pin (num 22) (name P22) (type passive))
+ (pin (num 23) (name P23) (type passive))
+ (pin (num 24) (name P20) (type passive))
+ (pin (num 25) (name P24) (type passive))
+ (pin (num 26) (name P22) (type passive)))))
+ (libraries
+ (library (logical raspberrypi-gpio-cache)
+ (uri E:\kicad-git\kicad_git_libs\template\raspberrypi-gpio\raspberrypi-gpio-cache.lib)))
+ (nets
+ (net (code 1) (name "/GPIO10(MOSI)")
+ (node (ref P1) (pin 19)))
+ (net (code 2) (name GND)
+ (node (ref P1) (pin 6)))
+ (net (code 3) (name "Net-(P1-Pad25)")
+ (node (ref P1) (pin 25)))
+ (net (code 4) (name "/GPIO11(SCLK)")
+ (node (ref P1) (pin 23)))
+ (net (code 5) (name "/GPIO9(MISO)")
+ (node (ref P1) (pin 21)))
+ (net (code 6) (name "Net-(P1-Pad17)")
+ (node (ref P1) (pin 17)))
+ (net (code 7) (name /GPIO22)
+ (node (ref P1) (pin 15)))
+ (net (code 8) (name /GPIO21)
+ (node (ref P1) (pin 13)))
+ (net (code 9) (name /GPIO17)
+ (node (ref P1) (pin 11)))
+ (net (code 10) (name "Net-(P1-Pad9)")
+ (node (ref P1) (pin 9)))
+ (net (code 11) (name /GPIO4)
+ (node (ref P1) (pin 7)))
+ (net (code 12) (name /GPIO24)
+ (node (ref P1) (pin 18)))
+ (net (code 13) (name "/GPIO7(CE1)")
+ (node (ref P1) (pin 26)))
+ (net (code 14) (name "/GPIO8(CE0)")
+ (node (ref P1) (pin 24)))
+ (net (code 15) (name /GPIO25)
+ (node (ref P1) (pin 22)))
+ (net (code 16) (name "Net-(P1-Pad20)")
+ (node (ref P1) (pin 20)))
+ (net (code 17) (name /GPIO23)
+ (node (ref P1) (pin 16)))
+ (net (code 18) (name "Net-(P1-Pad14)")
+ (node (ref P1) (pin 14)))
+ (net (code 19) (name /GPIO18)
+ (node (ref P1) (pin 12)))
+ (net (code 20) (name /RXD)
+ (node (ref P1) (pin 10)))
+ (net (code 21) (name /TXD)
+ (node (ref P1) (pin 8)))
+ (net (code 22) (name "Net-(P1-Pad4)")
+ (node (ref P1) (pin 4)))
+ (net (code 23) (name +5V)
+ (node (ref P1) (pin 2)))
+ (net (code 24) (name +3V3)
+ (node (ref P1) (pin 1)))
+ (net (code 25) (name "/GPIO1(SCL)")
+ (node (ref P1) (pin 5)))
+ (net (code 26) (name "/GPIO0(SDA)")
+ (node (ref P1) (pin 3)))))
\ No newline at end of file
diff --git a/template/raspberrypi-gpio/raspberrypi-gpio.pro b/template/raspberrypi-gpio/raspberrypi-gpio.pro
index 06180fd..575fe0d 100755
--- a/template/raspberrypi-gpio/raspberrypi-gpio.pro
+++ b/template/raspberrypi-gpio/raspberrypi-gpio.pro
@@ -1,4 +1,4 @@
-update=15/11/2012 21:11:59
+update=13/12/2016 09:33:12
version=1
last_client=kicad
[cvpcb]
@@ -77,39 +77,11 @@ LibName7=display
LibName8=valves
LibName9=led
LibName10=dip_sockets
+[general]
+version=1
[eeschema]
version=1
LibDir=
-NetFmt=1
-HPGLSpd=20
-HPGLDm=15
-HPGLNum=1
-offX_A4=0
-offY_A4=0
-offX_A3=0
-offY_A3=0
-offX_A2=0
-offY_A2=0
-offX_A1=0
-offY_A1=0
-offX_A0=0
-offY_A0=0
-offX_A=0
-offY_A=0
-offX_B=0
-offY_B=0
-offX_C=0
-offY_C=0
-offX_D=0
-offY_D=0
-offX_E=0
-offY_E=0
-RptD_X=0
-RptD_Y=100
-RptLab=1
-SimCmd=
-UseNetN=0
-LabSize=60
[eeschema/libraries]
LibName1=power
LibName2=device
@@ -122,24 +94,13 @@ LibName8=cmos4000
LibName9=adc-dac
LibName10=memory
LibName11=xilinx
-LibName12=special
-LibName13=microcontrollers
-LibName14=dsp
-LibName15=microchip
-LibName16=analog_switches
-LibName17=motorola
-LibName18=texas
-LibName19=intel
-LibName20=audio
-LibName21=interface
-LibName22=digital-audio
-LibName23=philips
-LibName24=display
-LibName25=cypress
-LibName26=siliconi
-LibName27=opto
-LibName28=atmel
-LibName29=contrib
-LibName30=valves
-[general]
-version=1
+LibName12=microcontrollers
+LibName13=dsp
+LibName14=microchip
+LibName15=analog_switches
+LibName16=motorola
+LibName17=texas
+LibName18=intel
+LibName19=audio
+LibName20=interface
+LibName21=opto
diff --git a/template/raspberrypi-gpio/raspberrypi-gpio.sch b/template/raspberrypi-gpio/raspberrypi-gpio.sch
index 09ccc85..5ec292d 100755
--- a/template/raspberrypi-gpio/raspberrypi-gpio.sch
+++ b/template/raspberrypi-gpio/raspberrypi-gpio.sch
@@ -1,4 +1,4 @@
-EESchema Schematic File Version 2 date 15/11/2012 21:22:43
+EESchema Schematic File Version 2
LIBS:power
LIBS:device
LIBS:transistors
@@ -10,7 +10,6 @@ LIBS:cmos4000
LIBS:adc-dac
LIBS:memory
LIBS:xilinx
-LIBS:special
LIBS:microcontrollers
LIBS:dsp
LIBS:microchip
@@ -20,17 +19,9 @@ LIBS:texas
LIBS:intel
LIBS:audio
LIBS:interface
-LIBS:digital-audio
-LIBS:philips
-LIBS:display
-LIBS:cypress
-LIBS:siliconi
LIBS:opto
-LIBS:atmel
-LIBS:contrib
-LIBS:valves
-LIBS:rpi-cache
-EELAYER 27 0
+LIBS:raspberrypi-gpio-cache
+EELAYER 25 0
EELAYER END
$Descr A4 11693 8268
encoding utf-8
@@ -50,6 +41,8 @@ U 1 1 50A55ABA
P 2400 1800
F 0 "P1" H 2400 2500 60 0000 C CNN
F 1 "CONN_13X2" V 2400 1800 50 0000 C CNN
+F 2 "Pin_Headers:Pin_Header_Straight_2x13" H 2400 1100 30 0000 C CNN
+F 3 "" H 2400 1800 60 0001 C CNN
1 2400 1800
1 0 0 -1
$EndComp
@@ -57,8 +50,10 @@ $Comp
L +3.3V #PWR01
U 1 1 50A55B18
P 1900 1050
-F 0 "#PWR01" H 1900 1010 30 0001 C CNN
-F 1 "+3.3V" H 1900 1160 30 0000 C CNN
+F 0 "#PWR01" H 1900 900 50 0001 C CNN
+F 1 "+3.3V" H 1900 1190 50 0000 C CNN
+F 2 "" H 1900 1050 50 0000 C CNN
+F 3 "" H 1900 1050 50 0000 C CNN
1 1900 1050
1 0 0 -1
$EndComp
@@ -70,8 +65,10 @@ $Comp
L +5V #PWR02
U 1 1 50A55B2E
P 2900 1050
-F 0 "#PWR02" H 2900 1140 20 0001 C CNN
-F 1 "+5V" H 2900 1140 30 0000 C CNN
+F 0 "#PWR02" H 2900 900 50 0001 C CNN
+F 1 "+5V" H 2900 1190 50 0000 C CNN
+F 2 "" H 2900 1050 50 0000 C CNN
+F 3 "" H 2900 1050 50 0000 C CNN
1 2900 1050
1 0 0 -1
$EndComp
@@ -123,8 +120,10 @@ $Comp
L GND #PWR03
U 1 1 50A55C3F
P 2900 2500
-F 0 "#PWR03" H 2900 2500 30 0001 C CNN
-F 1 "GND" H 2900 2430 30 0001 C CNN
+F 0 "#PWR03" H 2900 2250 50 0001 C CNN
+F 1 "GND" H 2900 2350 50 0000 C CNN
+F 2 "" H 2900 2500 50 0000 C CNN
+F 3 "" H 2900 2500 50 0000 C CNN
1 2900 2500
1 0 0 -1
$EndComp
diff --git a/template/stm32f100-discovery-shield/fp-lib-table b/template/stm32f100-discovery-shield/fp-lib-table
new file mode 100644
index 0000000..1d0dafd
--- /dev/null
+++ b/template/stm32f100-discovery-shield/fp-lib-table
@@ -0,0 +1,3 @@
+(fp_lib_table
+ (lib (name Pin_Headers)(type KiCad)(uri "$(KISYSMOD)\\Pin_Headers.pretty")(options "")(descr ""))
+)
diff --git a/template/stm32f100-discovery-shield/stm32f100-discovery-shield-cache.lib b/template/stm32f100-discovery-shield/stm32f100-discovery-shield-cache.lib
index 39a8ab4..38f0713 100644
--- a/template/stm32f100-discovery-shield/stm32f100-discovery-shield-cache.lib
+++ b/template/stm32f100-discovery-shield/stm32f100-discovery-shield-cache.lib
@@ -1,28 +1,34 @@
-EESchema-LIBRARY Version 2.3 Date: 2012-10-20 12:45:55
+EESchema-LIBRARY Version 2.3
#encoding utf-8
#
-# +3.3V
+# +3V3
#
-DEF +3.3V #PWR 0 0 Y Y 1 F P
-F0 "#PWR" 0 -40 30 H I C CNN
-F1 "+3.3V" 0 110 30 H V C CNN
-ALIAS +3,3V
+DEF +3V3 #PWR 0 0 Y Y 1 F P
+F0 "#PWR" 0 -150 50 H I C CNN
+F1 "+3V3" 0 140 50 H V C CNN
+F2 "" 0 0 50 H V C CNN
+F3 "" 0 0 50 H V C CNN
+ALIAS +3.3V
DRAW
-X +3.3V 1 0 0 0 U 30 30 0 0 W N
-C 0 60 20 0 1 0 N
-P 3 0 1 0 0 0 0 40 0 40 N
+P 2 0 1 0 -30 50 0 100 N
+P 2 0 1 0 0 0 0 100 N
+P 2 0 1 0 0 100 30 50 N
+X +3V3 1 0 0 0 U 50 50 1 1 W N
ENDDRAW
ENDDEF
#
# +5V
#
-DEF +5V #PWR 0 40 Y Y 1 F P
-F0 "#PWR" 0 90 20 H I C CNN
-F1 "+5V" 0 90 30 H V C CNN
+DEF +5V #PWR 0 0 Y Y 1 F P
+F0 "#PWR" 0 -150 50 H I C CNN
+F1 "+5V" 0 140 50 H V C CNN
+F2 "" 0 0 50 H V C CNN
+F3 "" 0 0 50 H V C CNN
DRAW
-X +5V 1 0 0 0 U 20 20 0 0 W N
-C 0 50 20 0 1 0 N
-P 4 0 1 0 0 0 0 30 0 30 0 30 N
+P 2 0 1 0 -30 50 0 100 N
+P 2 0 1 0 0 0 0 100 N
+P 2 0 1 0 0 100 30 50 N
+X +5V 1 0 0 0 U 50 50 1 1 W N
ENDDRAW
ENDDEF
#
@@ -31,6 +37,8 @@ ENDDEF
DEF CONN28 P 0 40 Y N 1 F N
F0 "P" -50 0 60 V V C CNN
F1 "CONN28" 50 0 60 V V C CNN
+F2 "" 0 0 60 H I C CNN
+F3 "" 0 0 60 H I C CNN
DRAW
S -100 -1400 150 1400 0 1 0 f
X P1 1 -350 1350 250 R 50 50 1 1 P I
@@ -69,6 +77,8 @@ ENDDEF
DEF CONN6 P 0 40 Y N 1 F N
F0 "P" -50 0 60 V V C CNN
F1 "CONN6" 50 0 60 V V C CNN
+F2 "" 0 0 60 H I C CNN
+F3 "" 0 0 60 H I C CNN
DRAW
S -100 -300 150 300 0 1 0 f
X P1 1 -350 250 250 R 50 50 1 1 P I
@@ -82,12 +92,14 @@ ENDDEF
#
# GND
#
-DEF ~GND #PWR 0 0 Y Y 1 F P
-F0 "#PWR" 0 0 30 H I C CNN
-F1 "GND" 0 -70 30 H I C CNN
+DEF GND #PWR 0 0 Y Y 1 F P
+F0 "#PWR" 0 -250 50 H I C CNN
+F1 "GND" 0 -150 50 H V C CNN
+F2 "" 0 0 50 H V C CNN
+F3 "" 0 0 50 H V C CNN
DRAW
-P 4 0 1 0 -50 0 0 -50 50 0 -50 0 N
-X GND 1 0 0 0 U 30 30 1 1 W N
+P 6 0 1 0 0 0 0 -50 50 -50 0 -100 -50 -50 0 -50 N
+X GND 1 0 0 0 D 50 50 1 1 W N
ENDDRAW
ENDDEF
#
diff --git a/template/stm32f100-discovery-shield/stm32f100-discovery-shield.cmp b/template/stm32f100-discovery-shield/stm32f100-discovery-shield.cmp
deleted file mode 100644
index f21c200..0000000
--- a/template/stm32f100-discovery-shield/stm32f100-discovery-shield.cmp
+++ /dev/null
@@ -1,24 +0,0 @@
-Cmp-Mod V01 Created by CvPcb (2012-10-17 BZR 3773)-testing date = 2012-10-20 12:09:50
-
-BeginCmp
-TimeStamp = /50827277;
-Reference = P1;
-ValeurCmp = CONN28;
-IdModule = PIN_ARRAY_28X1;
-EndCmp
-
-BeginCmp
-TimeStamp = /50827286;
-Reference = P2;
-ValeurCmp = CONN28;
-IdModule = PIN_ARRAY_28X1;
-EndCmp
-
-BeginCmp
-TimeStamp = /50827295;
-Reference = P3;
-ValeurCmp = CONN6;
-IdModule = PIN_ARRAY_6X1;
-EndCmp
-
-EndListe
diff --git a/template/stm32f100-discovery-shield/stm32f100-discovery-shield.kicad_pcb b/template/stm32f100-discovery-shield/stm32f100-discovery-shield.kicad_pcb
index cdb33af..48af8e0 100644
--- a/template/stm32f100-discovery-shield/stm32f100-discovery-shield.kicad_pcb
+++ b/template/stm32f100-discovery-shield/stm32f100-discovery-shield.kicad_pcb
@@ -1,4 +1,4 @@
-(kicad_pcb (version 3) (host pcbnew "(2013-02-23 BZR 3971)-testing")
+(kicad_pcb (version 4) (host pcbnew 4.0.5)
(general
(links 3)
@@ -9,31 +9,31 @@
(tracks 0)
(zones 0)
(modules 3)
- (nets 4)
+ (nets 2)
)
(page A3)
- (title_block
+ (title_block
(title "STM32 Value Line Discovery - Shiled board")
(rev 1.0)
)
(layers
- (15 F.Cu signal)
- (0 B.Cu signal)
- (16 B.Adhes user)
- (17 F.Adhes user)
- (18 B.Paste user)
- (19 F.Paste user)
- (20 B.SilkS user)
- (21 F.SilkS user)
- (22 B.Mask user)
- (23 F.Mask user)
- (24 Dwgs.User user)
- (25 Cmts.User user)
- (26 Eco1.User user)
- (27 Eco2.User user)
- (28 Edge.Cuts user)
+ (0 F.Cu signal)
+ (31 B.Cu signal)
+ (32 B.Adhes user)
+ (33 F.Adhes user)
+ (34 B.Paste user)
+ (35 F.Paste user)
+ (36 B.SilkS user)
+ (37 F.SilkS user)
+ (38 B.Mask user)
+ (39 F.Mask user)
+ (40 Dwgs.User user)
+ (41 Cmts.User user)
+ (42 Eco1.User user)
+ (43 Eco2.User user)
+ (44 Edge.Cuts user)
)
(setup
@@ -64,10 +64,10 @@
(aux_axis_origin 0 0)
(visible_elements 7FFFFFFF)
(pcbplotparams
- (layerselection 3178497)
+ (layerselection 0x00030_80000001)
(usegerberextensions true)
(excludeedgelayer true)
- (linewidth 60)
+ (linewidth 0.150000)
(plotframeref false)
(viasonmask false)
(mode 1)
@@ -80,7 +80,6 @@
(psa4output false)
(plotreference true)
(plotvalue true)
- (plotothertext true)
(plotinvisibletext false)
(padsonsilk false)
(subtractmaskfromsilk false)
@@ -92,9 +91,7 @@
)
(net 0 "")
- (net 1 +3.3V)
- (net 2 +5V)
- (net 3 GND)
+ (net 1 GND)
(net_class Default "To jest domyślna klasa połączeń."
(clearance 0.254)
@@ -103,252 +100,159 @@
(via_drill 0.635)
(uvia_dia 0.508)
(uvia_drill 0.127)
- (add_net "")
- (add_net +3.3V)
- (add_net +5V)
(add_net GND)
)
- (module PIN_ARRAY_6X1 locked (layer F.Cu) (tedit 50827C81) (tstamp 50827C60)
- (at 55.88 113.03)
- (descr "Single rangee contacts 1 x 6 pins")
- (tags CONN)
- (path /50827295)
- (fp_text reference P3 (at -8.89 0) (layer F.SilkS)
- (effects (font (size 0.63246 0.63246) (thickness 0.15748)))
- )
- (fp_text value CONN6 (at -8.89 0) (layer F.SilkS) hide
- (effects (font (size 0.63246 0.63246) (thickness 0.15748)))
- )
- (fp_line (start -7.62 -1.27) (end 7.62 -1.27) (layer F.SilkS) (width 0.14986))
- (fp_line (start 7.62 -1.27) (end 7.62 1.27) (layer F.SilkS) (width 0.14986))
- (fp_line (start 7.62 1.27) (end -7.62 1.27) (layer F.SilkS) (width 0.14986))
- (fp_line (start -7.62 1.27) (end -7.62 -1.27) (layer F.SilkS) (width 0.14986))
- (pad 1 thru_hole rect (at -6.35 0) (size 1.524 1.524) (drill 1.016)
- (layers *.Cu *.Mask F.SilkS)
- )
- (pad 2 thru_hole circle (at -3.81 0) (size 1.524 1.524) (drill 1.016)
- (layers *.Cu *.Mask F.SilkS)
- )
- (pad 4 thru_hole circle (at 1.27 0) (size 1.524 1.524) (drill 1.016)
- (layers *.Cu *.Mask F.SilkS)
- )
- (pad 6 thru_hole circle (at 6.35 0) (size 1.524 1.524) (drill 1.016)
- (layers *.Cu *.Mask F.SilkS)
- )
- (pad 3 thru_hole circle (at -1.27 0) (size 1.524 1.524) (drill 1.016)
- (layers *.Cu *.Mask F.SilkS)
- )
- (pad 5 thru_hole circle (at 3.81 0) (size 1.524 1.524) (drill 1.016)
- (layers *.Cu *.Mask F.SilkS)
+ (module Pin_Headers:Pin_Header_Straight_1x28 locked (layer F.Cu) (tedit 0) (tstamp 50827CA8)
+ (at 69.85 107.95 180)
+ (descr "Through hole pin header")
+ (tags "pin header")
+ (path /50827286)
+ (fp_text reference P2 (at 0 -5.1 180) (layer F.SilkS)
+ (effects (font (size 1 1) (thickness 0.15)))
+ )
+ (fp_text value CONN28 (at 0 -3.1 180) (layer F.Fab)
+ (effects (font (size 1 1) (thickness 0.15)))
+ )
+ (fp_line (start -1.75 -1.75) (end -1.75 70.35) (layer F.CrtYd) (width 0.05))
+ (fp_line (start 1.75 -1.75) (end 1.75 70.35) (layer F.CrtYd) (width 0.05))
+ (fp_line (start -1.75 -1.75) (end 1.75 -1.75) (layer F.CrtYd) (width 0.05))
+ (fp_line (start -1.75 70.35) (end 1.75 70.35) (layer F.CrtYd) (width 0.05))
+ (fp_line (start -1.27 1.27) (end -1.27 69.85) (layer F.SilkS) (width 0.15))
+ (fp_line (start -1.27 69.85) (end 1.27 69.85) (layer F.SilkS) (width 0.15))
+ (fp_line (start 1.27 69.85) (end 1.27 1.27) (layer F.SilkS) (width 0.15))
+ (fp_line (start 1.55 -1.55) (end 1.55 0) (layer F.SilkS) (width 0.15))
+ (fp_line (start 1.27 1.27) (end -1.27 1.27) (layer F.SilkS) (width 0.15))
+ (fp_line (start -1.55 0) (end -1.55 -1.55) (layer F.SilkS) (width 0.15))
+ (fp_line (start -1.55 -1.55) (end 1.55 -1.55) (layer F.SilkS) (width 0.15))
+ (pad 1 thru_hole rect (at 0 0 180) (size 2.032 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)
+ (net 1 GND))
+ (pad 2 thru_hole oval (at 0 2.54 180) (size 2.032 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS))
+ (pad 3 thru_hole oval (at 0 5.08 180) (size 2.032 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS))
+ (pad 4 thru_hole oval (at 0 7.62 180) (size 2.032 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS))
+ (pad 5 thru_hole oval (at 0 10.16 180) (size 2.032 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS))
+ (pad 6 thru_hole oval (at 0 12.7 180) (size 2.032 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS))
+ (pad 7 thru_hole oval (at 0 15.24 180) (size 2.032 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS))
+ (pad 8 thru_hole oval (at 0 17.78 180) (size 2.032 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS))
+ (pad 9 thru_hole oval (at 0 20.32 180) (size 2.032 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS))
+ (pad 10 thru_hole oval (at 0 22.86 180) (size 2.032 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS))
+ (pad 11 thru_hole oval (at 0 25.4 180) (size 2.032 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS))
+ (pad 12 thru_hole oval (at 0 27.94 180) (size 2.032 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS))
+ (pad 13 thru_hole oval (at 0 30.48 180) (size 2.032 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS))
+ (pad 14 thru_hole oval (at 0 33.02 180) (size 2.032 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS))
+ (pad 15 thru_hole oval (at 0 35.56 180) (size 2.032 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS))
+ (pad 16 thru_hole oval (at 0 38.1 180) (size 2.032 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS))
+ (pad 17 thru_hole oval (at 0 40.64 180) (size 2.032 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS))
+ (pad 18 thru_hole oval (at 0 43.18 180) (size 2.032 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS))
+ (pad 19 thru_hole oval (at 0 45.72 180) (size 2.032 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS))
+ (pad 20 thru_hole oval (at 0 48.26 180) (size 2.032 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS))
+ (pad 21 thru_hole oval (at 0 50.8 180) (size 2.032 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS))
+ (pad 22 thru_hole oval (at 0 53.34 180) (size 2.032 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS))
+ (pad 23 thru_hole oval (at 0 55.88 180) (size 2.032 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS))
+ (pad 24 thru_hole oval (at 0 58.42 180) (size 2.032 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS))
+ (pad 25 thru_hole oval (at 0 60.96 180) (size 2.032 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS))
+ (pad 26 thru_hole oval (at 0 63.5 180) (size 2.032 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS))
+ (pad 27 thru_hole oval (at 0 66.04 180) (size 2.032 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS))
+ (pad 28 thru_hole oval (at 0 68.58 180) (size 2.032 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)
+ (net 1 GND))
+ (model Pin_Headers.3dshapes/Pin_Header_Straight_1x28.wrl
+ (at (xyz 0 -1.35 0))
+ (scale (xyz 1 1 1))
+ (rotate (xyz 0 0 90))
)
)
- (module PIN_ARRAY_28X1 locked (layer F.Cu) (tedit 50827C6F) (tstamp 50827C84)
- (at 39.37 73.66 270)
- (descr "Single rangee contacts 1 x 28 pins")
- (tags CONN)
+ (module Pin_Headers:Pin_Header_Straight_1x28 locked (layer F.Cu) (tedit 0) (tstamp 50827C84)
+ (at 39.37 39.37)
+ (descr "Through hole pin header")
+ (tags "pin header")
(path /50827277)
- (fp_text reference P1 (at -36.195 0 360) (layer F.SilkS)
- (effects (font (size 0.63246 0.63246) (thickness 0.15748)))
- )
- (fp_text value CONN28 (at -36.195 0 360) (layer F.SilkS) hide
- (effects (font (size 0.63246 0.63246) (thickness 0.15748)))
- )
- (fp_line (start -35.56 -1.27) (end 35.56 -1.27) (layer F.SilkS) (width 0.14986))
- (fp_line (start 35.56 -1.27) (end 35.56 1.27) (layer F.SilkS) (width 0.14986))
- (fp_line (start 35.56 1.27) (end -35.56 1.27) (layer F.SilkS) (width 0.14986))
- (fp_line (start -35.56 1.27) (end -35.56 -1.27) (layer F.SilkS) (width 0.14986))
- (pad 1 thru_hole rect (at -34.29 0 270) (size 1.524 1.524) (drill 1.016)
- (layers *.Cu *.Mask F.SilkS)
- (net 3 GND)
- )
- (pad 2 thru_hole circle (at -31.75 0 270) (size 1.524 1.524) (drill 1.016)
- (layers *.Cu *.Mask F.SilkS)
- )
- (pad 11 thru_hole circle (at -8.89 0 270) (size 1.524 1.524) (drill 1.016)
- (layers *.Cu *.Mask F.SilkS)
- )
- (pad 4 thru_hole circle (at -26.67 0 270) (size 1.524 1.524) (drill 1.016)
- (layers *.Cu *.Mask F.SilkS)
- )
- (pad 13 thru_hole circle (at -3.81 0 270) (size 1.524 1.524) (drill 1.016)
- (layers *.Cu *.Mask F.SilkS)
- )
- (pad 6 thru_hole circle (at -21.59 0 270) (size 1.524 1.524) (drill 1.016)
- (layers *.Cu *.Mask F.SilkS)
- )
- (pad 15 thru_hole circle (at 1.27 0 270) (size 1.524 1.524) (drill 1.016)
- (layers *.Cu *.Mask F.SilkS)
- )
- (pad 8 thru_hole circle (at -16.51 0 270) (size 1.524 1.524) (drill 1.016)
- (layers *.Cu *.Mask F.SilkS)
- )
- (pad 17 thru_hole circle (at 6.35 0 270) (size 1.524 1.524) (drill 1.016)
- (layers *.Cu *.Mask F.SilkS)
- )
- (pad 10 thru_hole circle (at -11.43 0 270) (size 1.524 1.524) (drill 1.016)
- (layers *.Cu *.Mask F.SilkS)
- )
- (pad 19 thru_hole circle (at 11.43 0 270) (size 1.524 1.524) (drill 1.016)
- (layers *.Cu *.Mask F.SilkS)
- )
- (pad 12 thru_hole circle (at -6.35 0 270) (size 1.524 1.524) (drill 1.016)
- (layers *.Cu *.Mask F.SilkS)
- )
- (pad 21 thru_hole circle (at 16.51 0 270) (size 1.524 1.524) (drill 1.016)
- (layers *.Cu *.Mask F.SilkS)
- )
- (pad 14 thru_hole circle (at -1.27 0 270) (size 1.524 1.524) (drill 1.016)
- (layers *.Cu *.Mask F.SilkS)
- )
- (pad 23 thru_hole circle (at 21.59 0 270) (size 1.524 1.524) (drill 1.016)
- (layers *.Cu *.Mask F.SilkS)
- )
- (pad 16 thru_hole circle (at 3.81 0 270) (size 1.524 1.524) (drill 1.016)
- (layers *.Cu *.Mask F.SilkS)
- )
- (pad 25 thru_hole circle (at 26.67 0 270) (size 1.524 1.524) (drill 1.016)
- (layers *.Cu *.Mask F.SilkS)
- )
- (pad 18 thru_hole circle (at 8.89 0 270) (size 1.524 1.524) (drill 1.016)
- (layers *.Cu *.Mask F.SilkS)
- )
- (pad 27 thru_hole circle (at 31.75 0 270) (size 1.524 1.524) (drill 1.016)
- (layers *.Cu *.Mask F.SilkS)
- )
- (pad 20 thru_hole circle (at 13.97 0 270) (size 1.524 1.524) (drill 1.016)
- (layers *.Cu *.Mask F.SilkS)
- )
- (pad 22 thru_hole circle (at 19.05 0 270) (size 1.524 1.524) (drill 1.016)
- (layers *.Cu *.Mask F.SilkS)
- )
- (pad 24 thru_hole circle (at 24.13 0 270) (size 1.524 1.524) (drill 1.016)
- (layers *.Cu *.Mask F.SilkS)
- )
- (pad 26 thru_hole circle (at 29.21 0 270) (size 1.524 1.524) (drill 1.016)
- (layers *.Cu *.Mask F.SilkS)
- )
- (pad 28 thru_hole circle (at 34.29 0 270) (size 1.524 1.524) (drill 1.016)
- (layers *.Cu *.Mask F.SilkS)
- (net 3 GND)
- )
- (pad 3 thru_hole circle (at -29.21 0 270) (size 1.524 1.524) (drill 1.016)
- (layers *.Cu *.Mask F.SilkS)
- (net 1 +3.3V)
- )
- (pad 5 thru_hole circle (at -24.13 0 270) (size 1.524 1.524) (drill 1.016)
- (layers *.Cu *.Mask F.SilkS)
- )
- (pad 7 thru_hole circle (at -19.05 0 270) (size 1.524 1.524) (drill 1.016)
- (layers *.Cu *.Mask F.SilkS)
- )
- (pad 9 thru_hole circle (at -13.97 0 270) (size 1.524 1.524) (drill 1.016)
- (layers *.Cu *.Mask F.SilkS)
+ (fp_text reference P1 (at 0 -5.1) (layer F.SilkS)
+ (effects (font (size 1 1) (thickness 0.15)))
+ )
+ (fp_text value CONN28 (at 0 -3.1) (layer F.Fab)
+ (effects (font (size 1 1) (thickness 0.15)))
+ )
+ (fp_line (start -1.75 -1.75) (end -1.75 70.35) (layer F.CrtYd) (width 0.05))
+ (fp_line (start 1.75 -1.75) (end 1.75 70.35) (layer F.CrtYd) (width 0.05))
+ (fp_line (start -1.75 -1.75) (end 1.75 -1.75) (layer F.CrtYd) (width 0.05))
+ (fp_line (start -1.75 70.35) (end 1.75 70.35) (layer F.CrtYd) (width 0.05))
+ (fp_line (start -1.27 1.27) (end -1.27 69.85) (layer F.SilkS) (width 0.15))
+ (fp_line (start -1.27 69.85) (end 1.27 69.85) (layer F.SilkS) (width 0.15))
+ (fp_line (start 1.27 69.85) (end 1.27 1.27) (layer F.SilkS) (width 0.15))
+ (fp_line (start 1.55 -1.55) (end 1.55 0) (layer F.SilkS) (width 0.15))
+ (fp_line (start 1.27 1.27) (end -1.27 1.27) (layer F.SilkS) (width 0.15))
+ (fp_line (start -1.55 0) (end -1.55 -1.55) (layer F.SilkS) (width 0.15))
+ (fp_line (start -1.55 -1.55) (end 1.55 -1.55) (layer F.SilkS) (width 0.15))
+ (pad 1 thru_hole rect (at 0 0) (size 2.032 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)
+ (net 1 GND))
+ (pad 2 thru_hole oval (at 0 2.54) (size 2.032 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS))
+ (pad 3 thru_hole oval (at 0 5.08) (size 2.032 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS))
+ (pad 4 thru_hole oval (at 0 7.62) (size 2.032 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS))
+ (pad 5 thru_hole oval (at 0 10.16) (size 2.032 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS))
+ (pad 6 thru_hole oval (at 0 12.7) (size 2.032 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS))
+ (pad 7 thru_hole oval (at 0 15.24) (size 2.032 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS))
+ (pad 8 thru_hole oval (at 0 17.78) (size 2.032 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS))
+ (pad 9 thru_hole oval (at 0 20.32) (size 2.032 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS))
+ (pad 10 thru_hole oval (at 0 22.86) (size 2.032 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS))
+ (pad 11 thru_hole oval (at 0 25.4) (size 2.032 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS))
+ (pad 12 thru_hole oval (at 0 27.94) (size 2.032 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS))
+ (pad 13 thru_hole oval (at 0 30.48) (size 2.032 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS))
+ (pad 14 thru_hole oval (at 0 33.02) (size 2.032 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS))
+ (pad 15 thru_hole oval (at 0 35.56) (size 2.032 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS))
+ (pad 16 thru_hole oval (at 0 38.1) (size 2.032 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS))
+ (pad 17 thru_hole oval (at 0 40.64) (size 2.032 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS))
+ (pad 18 thru_hole oval (at 0 43.18) (size 2.032 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS))
+ (pad 19 thru_hole oval (at 0 45.72) (size 2.032 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS))
+ (pad 20 thru_hole oval (at 0 48.26) (size 2.032 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS))
+ (pad 21 thru_hole oval (at 0 50.8) (size 2.032 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS))
+ (pad 22 thru_hole oval (at 0 53.34) (size 2.032 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS))
+ (pad 23 thru_hole oval (at 0 55.88) (size 2.032 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS))
+ (pad 24 thru_hole oval (at 0 58.42) (size 2.032 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS))
+ (pad 25 thru_hole oval (at 0 60.96) (size 2.032 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS))
+ (pad 26 thru_hole oval (at 0 63.5) (size 2.032 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS))
+ (pad 27 thru_hole oval (at 0 66.04) (size 2.032 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS))
+ (pad 28 thru_hole oval (at 0 68.58) (size 2.032 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)
+ (net 1 GND))
+ (model Pin_Headers.3dshapes/Pin_Header_Straight_1x28.wrl
+ (at (xyz 0 -1.35 0))
+ (scale (xyz 1 1 1))
+ (rotate (xyz 0 0 90))
)
)
- (module PIN_ARRAY_28X1 locked (layer F.Cu) (tedit 50827C8E) (tstamp 50827CA8)
- (at 69.85 73.66 90)
- (descr "Single rangee contacts 1 x 28 pins")
- (tags CONN)
- (path /50827286)
- (fp_text reference P2 (at -36.195 0 180) (layer F.SilkS)
- (effects (font (size 0.63246 0.63246) (thickness 0.15748)))
- )
- (fp_text value CONN28 (at -36.195 0 180) (layer F.SilkS) hide
- (effects (font (size 0.63246 0.63246) (thickness 0.15748)))
- )
- (fp_line (start -35.56 -1.27) (end 35.56 -1.27) (layer F.SilkS) (width 0.14986))
- (fp_line (start 35.56 -1.27) (end 35.56 1.27) (layer F.SilkS) (width 0.14986))
- (fp_line (start 35.56 1.27) (end -35.56 1.27) (layer F.SilkS) (width 0.14986))
- (fp_line (start -35.56 1.27) (end -35.56 -1.27) (layer F.SilkS) (width 0.14986))
- (pad 1 thru_hole rect (at -34.29 0 90) (size 1.524 1.524) (drill 1.016)
- (layers *.Cu *.Mask F.SilkS)
- (net 3 GND)
- )
- (pad 2 thru_hole circle (at -31.75 0 90) (size 1.524 1.524) (drill 1.016)
- (layers *.Cu *.Mask F.SilkS)
- )
- (pad 11 thru_hole circle (at -8.89 0 90) (size 1.524 1.524) (drill 1.016)
- (layers *.Cu *.Mask F.SilkS)
- )
- (pad 4 thru_hole circle (at -26.67 0 90) (size 1.524 1.524) (drill 1.016)
- (layers *.Cu *.Mask F.SilkS)
- )
- (pad 13 thru_hole circle (at -3.81 0 90) (size 1.524 1.524) (drill 1.016)
- (layers *.Cu *.Mask F.SilkS)
- )
- (pad 6 thru_hole circle (at -21.59 0 90) (size 1.524 1.524) (drill 1.016)
- (layers *.Cu *.Mask F.SilkS)
- )
- (pad 15 thru_hole circle (at 1.27 0 90) (size 1.524 1.524) (drill 1.016)
- (layers *.Cu *.Mask F.SilkS)
- )
- (pad 8 thru_hole circle (at -16.51 0 90) (size 1.524 1.524) (drill 1.016)
- (layers *.Cu *.Mask F.SilkS)
- )
- (pad 17 thru_hole circle (at 6.35 0 90) (size 1.524 1.524) (drill 1.016)
- (layers *.Cu *.Mask F.SilkS)
- )
- (pad 10 thru_hole circle (at -11.43 0 90) (size 1.524 1.524) (drill 1.016)
- (layers *.Cu *.Mask F.SilkS)
- )
- (pad 19 thru_hole circle (at 11.43 0 90) (size 1.524 1.524) (drill 1.016)
- (layers *.Cu *.Mask F.SilkS)
- )
- (pad 12 thru_hole circle (at -6.35 0 90) (size 1.524 1.524) (drill 1.016)
- (layers *.Cu *.Mask F.SilkS)
- )
- (pad 21 thru_hole circle (at 16.51 0 90) (size 1.524 1.524) (drill 1.016)
- (layers *.Cu *.Mask F.SilkS)
- )
- (pad 14 thru_hole circle (at -1.27 0 90) (size 1.524 1.524) (drill 1.016)
- (layers *.Cu *.Mask F.SilkS)
- )
- (pad 23 thru_hole circle (at 21.59 0 90) (size 1.524 1.524) (drill 1.016)
- (layers *.Cu *.Mask F.SilkS)
- )
- (pad 16 thru_hole circle (at 3.81 0 90) (size 1.524 1.524) (drill 1.016)
- (layers *.Cu *.Mask F.SilkS)
- )
- (pad 25 thru_hole circle (at 26.67 0 90) (size 1.524 1.524) (drill 1.016)
- (layers *.Cu *.Mask F.SilkS)
- )
- (pad 18 thru_hole circle (at 8.89 0 90) (size 1.524 1.524) (drill 1.016)
- (layers *.Cu *.Mask F.SilkS)
- )
- (pad 27 thru_hole circle (at 31.75 0 90) (size 1.524 1.524) (drill 1.016)
- (layers *.Cu *.Mask F.SilkS)
- )
- (pad 20 thru_hole circle (at 13.97 0 90) (size 1.524 1.524) (drill 1.016)
- (layers *.Cu *.Mask F.SilkS)
- )
- (pad 22 thru_hole circle (at 19.05 0 90) (size 1.524 1.524) (drill 1.016)
- (layers *.Cu *.Mask F.SilkS)
- )
- (pad 24 thru_hole circle (at 24.13 0 90) (size 1.524 1.524) (drill 1.016)
- (layers *.Cu *.Mask F.SilkS)
- )
- (pad 26 thru_hole circle (at 29.21 0 90) (size 1.524 1.524) (drill 1.016)
- (layers *.Cu *.Mask F.SilkS)
- (net 2 +5V)
- )
- (pad 28 thru_hole circle (at 34.29 0 90) (size 1.524 1.524) (drill 1.016)
- (layers *.Cu *.Mask F.SilkS)
- (net 3 GND)
- )
- (pad 3 thru_hole circle (at -29.21 0 90) (size 1.524 1.524) (drill 1.016)
- (layers *.Cu *.Mask F.SilkS)
- )
- (pad 5 thru_hole circle (at -24.13 0 90) (size 1.524 1.524) (drill 1.016)
- (layers *.Cu *.Mask F.SilkS)
- )
- (pad 7 thru_hole circle (at -19.05 0 90) (size 1.524 1.524) (drill 1.016)
- (layers *.Cu *.Mask F.SilkS)
- )
- (pad 9 thru_hole circle (at -13.97 0 90) (size 1.524 1.524) (drill 1.016)
- (layers *.Cu *.Mask F.SilkS)
+ (module Pin_Headers:Pin_Header_Straight_1x06 (layer F.Cu) (tedit 0) (tstamp 50827C60)
+ (at 49.53 113.03 90)
+ (descr "Through hole pin header")
+ (tags "pin header")
+ (path /50827295)
+ (fp_text reference P3 (at 0 -5.1 90) (layer F.SilkS)
+ (effects (font (size 1 1) (thickness 0.15)))
+ )
+ (fp_text value CONN6 (at 0 -3.1 90) (layer F.Fab)
+ (effects (font (size 1 1) (thickness 0.15)))
+ )
+ (fp_line (start -1.75 -1.75) (end -1.75 14.45) (layer F.CrtYd) (width 0.05))
+ (fp_line (start 1.75 -1.75) (end 1.75 14.45) (layer F.CrtYd) (width 0.05))
+ (fp_line (start -1.75 -1.75) (end 1.75 -1.75) (layer F.CrtYd) (width 0.05))
+ (fp_line (start -1.75 14.45) (end 1.75 14.45) (layer F.CrtYd) (width 0.05))
+ (fp_line (start 1.27 1.27) (end 1.27 13.97) (layer F.SilkS) (width 0.15))
+ (fp_line (start 1.27 13.97) (end -1.27 13.97) (layer F.SilkS) (width 0.15))
+ (fp_line (start -1.27 13.97) (end -1.27 1.27) (layer F.SilkS) (width 0.15))
+ (fp_line (start 1.55 -1.55) (end 1.55 0) (layer F.SilkS) (width 0.15))
+ (fp_line (start 1.27 1.27) (end -1.27 1.27) (layer F.SilkS) (width 0.15))
+ (fp_line (start -1.55 0) (end -1.55 -1.55) (layer F.SilkS) (width 0.15))
+ (fp_line (start -1.55 -1.55) (end 1.55 -1.55) (layer F.SilkS) (width 0.15))
+ (pad 1 thru_hole rect (at 0 0 90) (size 2.032 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS))
+ (pad 2 thru_hole oval (at 0 2.54 90) (size 2.032 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS))
+ (pad 3 thru_hole oval (at 0 5.08 90) (size 2.032 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS))
+ (pad 4 thru_hole oval (at 0 7.62 90) (size 2.032 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS))
+ (pad 5 thru_hole oval (at 0 10.16 90) (size 2.032 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS))
+ (pad 6 thru_hole oval (at 0 12.7 90) (size 2.032 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS))
+ (model Pin_Headers.3dshapes/Pin_Header_Straight_1x06.wrl
+ (at (xyz 0 -0.25 0))
+ (scale (xyz 1 1 1))
+ (rotate (xyz 0 0 90))
)
)
@@ -360,7 +264,7 @@
(gr_line (start 76.2 118.745) (end 33.02 118.745) (angle 90) (layer Edge.Cuts) (width 0.14986))
(gr_line (start 33.02 34.29) (end 76.2 34.29) (angle 90) (layer Edge.Cuts) (width 0.14986))
- (zone (net 3) (net_name GND) (layer B.Cu) (tstamp 50827DC8) (hatch edge 0.508)
+ (zone (net 1) (net_name GND) (layer B.Cu) (tstamp 50827DC8) (hatch edge 0.508)
(connect_pads (clearance 0.508))
(min_thickness 0.254)
(fill (arc_segments 16) (thermal_gap 0.508) (thermal_bridge_width 0.889))
diff --git a/template/stm32f100-discovery-shield/stm32f100-discovery-shield.mod b/template/stm32f100-discovery-shield/stm32f100-discovery-shield.mod
deleted file mode 100644
index 21ff54a..0000000
--- a/template/stm32f100-discovery-shield/stm32f100-discovery-shield.mod
+++ /dev/null
@@ -1,276 +0,0 @@
-PCBNEW-LibModule-V1 2012-10-20 12:13:07
-# encoding utf-8
-Units deci-mils
-$INDEX
-PIN_ARRAY_28X1
-PIN_ARRAY_6X1
-$EndINDEX
-$MODULE PIN_ARRAY_28X1
-Po 0 0 0 15 50827920 00000000 ~~
-Li PIN_ARRAY_28X1
-Cd Single rangee contacts 1 x 28 pins
-Kw CONN
-Sc 0
-AR
-Op 0 0 0
-T0 0 -800 249 249 0 62 N V 21 N "PIN_ARRAY_28X1"
-T1 0 800 249 249 0 62 N I 21 N "VAL**"
-DS -14000 -500 14000 -500 59 21
-DS 14000 -500 14000 500 59 21
-DS 14000 500 -14000 500 59 21
-DS -14000 500 -14000 -500 59 21
-$PAD
-Sh "1" R 600 600 0 0 0
-Dr 400 0 0
-At STD N 00E0FFFF
-Ne 0 ""
-Po -13500 0
-$EndPAD
-$PAD
-Sh "2" C 600 600 0 0 0
-Dr 400 0 0
-At STD N 00E0FFFF
-Ne 0 ""
-Po -12500 0
-$EndPAD
-$PAD
-Sh "11" C 600 600 0 0 0
-Dr 400 0 0
-At STD N 00E0FFFF
-Ne 0 ""
-Po -3500 0
-$EndPAD
-$PAD
-Sh "4" C 600 600 0 0 0
-Dr 400 0 0
-At STD N 00E0FFFF
-Ne 0 ""
-Po -10500 0
-$EndPAD
-$PAD
-Sh "13" C 600 600 0 0 0
-Dr 400 0 0
-At STD N 00E0FFFF
-Ne 0 ""
-Po -1500 0
-$EndPAD
-$PAD
-Sh "6" C 600 600 0 0 0
-Dr 400 0 0
-At STD N 00E0FFFF
-Ne 0 ""
-Po -8500 0
-$EndPAD
-$PAD
-Sh "15" C 600 600 0 0 0
-Dr 400 0 0
-At STD N 00E0FFFF
-Ne 0 ""
-Po 500 0
-$EndPAD
-$PAD
-Sh "8" C 600 600 0 0 0
-Dr 400 0 0
-At STD N 00E0FFFF
-Ne 0 ""
-Po -6500 0
-$EndPAD
-$PAD
-Sh "17" C 600 600 0 0 0
-Dr 400 0 0
-At STD N 00E0FFFF
-Ne 0 ""
-Po 2500 0
-$EndPAD
-$PAD
-Sh "10" C 600 600 0 0 0
-Dr 400 0 0
-At STD N 00E0FFFF
-Ne 0 ""
-Po -4500 0
-$EndPAD
-$PAD
-Sh "19" C 600 600 0 0 0
-Dr 400 0 0
-At STD N 00E0FFFF
-Ne 0 ""
-Po 4500 0
-$EndPAD
-$PAD
-Sh "12" C 600 600 0 0 0
-Dr 400 0 0
-At STD N 00E0FFFF
-Ne 0 ""
-Po -2500 0
-$EndPAD
-$PAD
-Sh "21" C 600 600 0 0 0
-Dr 400 0 0
-At STD N 00E0FFFF
-Ne 0 ""
-Po 6500 0
-$EndPAD
-$PAD
-Sh "14" C 600 600 0 0 0
-Dr 400 0 0
-At STD N 00E0FFFF
-Ne 0 ""
-Po -500 0
-$EndPAD
-$PAD
-Sh "23" C 600 600 0 0 0
-Dr 400 0 0
-At STD N 00E0FFFF
-Ne 0 ""
-Po 8500 0
-$EndPAD
-$PAD
-Sh "16" C 600 600 0 0 0
-Dr 400 0 0
-At STD N 00E0FFFF
-Ne 0 ""
-Po 1500 0
-$EndPAD
-$PAD
-Sh "25" C 600 600 0 0 0
-Dr 400 0 0
-At STD N 00E0FFFF
-Ne 0 ""
-Po 10500 0
-$EndPAD
-$PAD
-Sh "18" C 600 600 0 0 0
-Dr 400 0 0
-At STD N 00E0FFFF
-Ne 0 ""
-Po 3500 0
-$EndPAD
-$PAD
-Sh "27" C 600 600 0 0 0
-Dr 400 0 0
-At STD N 00E0FFFF
-Ne 0 ""
-Po 12500 0
-$EndPAD
-$PAD
-Sh "20" C 600 600 0 0 0
-Dr 400 0 0
-At STD N 00E0FFFF
-Ne 0 ""
-Po 5500 0
-$EndPAD
-$PAD
-Sh "22" C 600 600 0 0 0
-Dr 400 0 0
-At STD N 00E0FFFF
-Ne 0 ""
-Po 7500 0
-$EndPAD
-$PAD
-Sh "24" C 600 600 0 0 0
-Dr 400 0 0
-At STD N 00E0FFFF
-Ne 0 ""
-Po 9500 0
-$EndPAD
-$PAD
-Sh "26" C 600 600 0 0 0
-Dr 400 0 0
-At STD N 00E0FFFF
-Ne 0 ""
-Po 11500 0
-$EndPAD
-$PAD
-Sh "28" C 600 600 0 0 0
-Dr 400 0 0
-At STD N 00E0FFFF
-Ne 0 ""
-Po 13500 0
-$EndPAD
-$PAD
-Sh "3" C 600 600 0 0 0
-Dr 400 0 0
-At STD N 00E0FFFF
-Ne 0 ""
-Po -11500 0
-$EndPAD
-$PAD
-Sh "5" C 600 600 0 0 0
-Dr 400 0 0
-At STD N 00E0FFFF
-Ne 0 ""
-Po -9500 0
-$EndPAD
-$PAD
-Sh "7" C 600 600 0 0 0
-Dr 400 0 0
-At STD N 00E0FFFF
-Ne 0 ""
-Po -7500 0
-$EndPAD
-$PAD
-Sh "9" C 600 600 0 0 0
-Dr 400 0 0
-At STD N 00E0FFFF
-Ne 0 ""
-Po -5500 0
-$EndPAD
-$EndMODULE PIN_ARRAY_28X1
-$MODULE PIN_ARRAY_6X1
-Po 0 0 0 15 508278F8 00000000 ~~
-Li PIN_ARRAY_6X1
-Cd Single rangee contacts 1 x 6 pins
-Kw CONN
-Sc 0
-AR
-Op 0 0 0
-T0 0 -700 249 249 0 62 N V 21 N "PIN_ARRAY_6X1"
-T1 0 800 249 249 0 62 N I 21 N "VAL**"
-DS -3000 -500 3000 -500 59 21
-DS 3000 -500 3000 500 59 21
-DS 3000 500 -3000 500 59 21
-DS -3000 500 -3000 -500 59 21
-$PAD
-Sh "1" R 600 600 0 0 0
-Dr 400 0 0
-At STD N 00E0FFFF
-Ne 0 ""
-Po -2500 0
-$EndPAD
-$PAD
-Sh "2" C 600 600 0 0 0
-Dr 400 0 0
-At STD N 00E0FFFF
-Ne 0 ""
-Po -1500 0
-$EndPAD
-$PAD
-Sh "4" C 600 600 0 0 0
-Dr 400 0 0
-At STD N 00E0FFFF
-Ne 0 ""
-Po 500 0
-$EndPAD
-$PAD
-Sh "6" C 600 600 0 0 0
-Dr 400 0 0
-At STD N 00E0FFFF
-Ne 0 ""
-Po 2500 0
-$EndPAD
-$PAD
-Sh "3" C 600 600 0 0 0
-Dr 400 0 0
-At STD N 00E0FFFF
-Ne 0 ""
-Po -500 0
-$EndPAD
-$PAD
-Sh "5" C 600 600 0 0 0
-Dr 400 0 0
-At STD N 00E0FFFF
-Ne 0 ""
-Po 1500 0
-$EndPAD
-$EndMODULE PIN_ARRAY_6X1
-$EndLIBRARY
diff --git a/template/stm32f100-discovery-shield/stm32f100-discovery-shield.net b/template/stm32f100-discovery-shield/stm32f100-discovery-shield.net
index 7d29e0c..6af7815 100644
--- a/template/stm32f100-discovery-shield/stm32f100-discovery-shield.net
+++ b/template/stm32f100-discovery-shield/stm32f100-discovery-shield.net
@@ -1,80 +1,207 @@
-# EESchema Netlist Version 1.1 created 2012-10-20 12:24:05
-(
- ( /50827277 $noname P1 CONN28 {Lib=CONN28}
- ( 1 GND )
- ( 2 ? )
- ( 3 +3.3V )
- ( 4 ? )
- ( 5 ? )
- ( 6 ? )
- ( 7 ? )
- ( 8 ? )
- ( 9 ? )
- ( 10 ? )
- ( 11 ? )
- ( 12 ? )
- ( 13 ? )
- ( 14 ? )
- ( 15 ? )
- ( 16 ? )
- ( 17 ? )
- ( 18 ? )
- ( 19 ? )
- ( 20 ? )
- ( 21 ? )
- ( 22 ? )
- ( 23 ? )
- ( 24 ? )
- ( 25 ? )
- ( 26 ? )
- ( 27 ? )
- ( 28 GND )
- )
- ( /50827286 $noname P2 CONN28 {Lib=CONN28}
- ( 1 GND )
- ( 2 ? )
- ( 3 ? )
- ( 4 ? )
- ( 5 ? )
- ( 6 ? )
- ( 7 ? )
- ( 8 ? )
- ( 9 ? )
- ( 10 ? )
- ( 11 ? )
- ( 12 ? )
- ( 13 ? )
- ( 14 ? )
- ( 15 ? )
- ( 16 ? )
- ( 17 ? )
- ( 18 ? )
- ( 19 ? )
- ( 20 ? )
- ( 21 ? )
- ( 22 ? )
- ( 23 ? )
- ( 24 ? )
- ( 25 ? )
- ( 26 +5V )
- ( 27 ? )
- ( 28 GND )
- )
- ( /50827295 $noname P3 CONN6 {Lib=CONN6}
- ( 1 ? )
- ( 2 ? )
- ( 3 ? )
- ( 4 ? )
- ( 5 ? )
- ( 6 ? )
- )
-)
-*
-{ Pin List by Nets
-Net 59 "GND" "GND"
- P1 1
- P2 28
- P1 28
- P2 1
-}
-#End
+(export (version D)
+ (design
+ (source E:/kicad-git/kicad_git_libs/template/stm32f100-discovery-shield/stm32f100-discovery-shield.sch)
+ (date "13/12/2016 09:19:37")
+ (tool "Eeschema 4.0.5")
+ (sheet (number 1) (name /) (tstamps /)
+ (title_block
+ (title "STM32 Value Line Discovery - Shiled board")
+ (company)
+ (rev 1.0)
+ (date "20 oct 2012")
+ (source stm32f100-discovery-shield.sch)
+ (comment (number 1) (value ""))
+ (comment (number 2) (value ""))
+ (comment (number 3) (value ""))
+ (comment (number 4) (value "")))))
+ (components
+ (comp (ref P1)
+ (value CONN28)
+ (footprint Pin_Headers:Pin_Header_Straight_1x28)
+ (libsource (lib stm32f100-discovery-shield) (part CONN28))
+ (sheetpath (names /) (tstamps /))
+ (tstamp 50827277))
+ (comp (ref P2)
+ (value CONN28)
+ (footprint Pin_Headers:Pin_Header_Straight_1x28)
+ (libsource (lib stm32f100-discovery-shield) (part CONN28))
+ (sheetpath (names /) (tstamps /))
+ (tstamp 50827286))
+ (comp (ref P3)
+ (value CONN6)
+ (footprint stm32f100-discovery-shield:PIN_ARRAY_6X1)
+ (libsource (lib stm32f100-discovery-shield) (part CONN6))
+ (sheetpath (names /) (tstamps /))
+ (tstamp 50827295)))
+ (libparts
+ (libpart (lib stm32f100-discovery-shield) (part CONN28)
+ (description "Symbole general de connexion")
+ (fields
+ (field (name Reference) P)
+ (field (name Value) CONN28))
+ (pins
+ (pin (num 1) (name P1) (type passive))
+ (pin (num 2) (name P2) (type passive))
+ (pin (num 3) (name P3) (type passive))
+ (pin (num 4) (name P4) (type passive))
+ (pin (num 5) (name P5) (type passive))
+ (pin (num 6) (name P6) (type passive))
+ (pin (num 7) (name P7) (type passive))
+ (pin (num 8) (name P8) (type passive))
+ (pin (num 9) (name P9) (type passive))
+ (pin (num 10) (name P10) (type passive))
+ (pin (num 11) (name P11) (type passive))
+ (pin (num 12) (name P12) (type passive))
+ (pin (num 13) (name P13) (type passive))
+ (pin (num 14) (name P14) (type passive))
+ (pin (num 15) (name P15) (type passive))
+ (pin (num 16) (name P16) (type passive))
+ (pin (num 17) (name P17) (type passive))
+ (pin (num 18) (name P18) (type passive))
+ (pin (num 19) (name P19) (type passive))
+ (pin (num 20) (name P20) (type passive))
+ (pin (num 21) (name P21) (type passive))
+ (pin (num 22) (name P22) (type passive))
+ (pin (num 23) (name P23) (type passive))
+ (pin (num 24) (name P24) (type passive))
+ (pin (num 25) (name P25) (type passive))
+ (pin (num 26) (name P26) (type passive))
+ (pin (num 27) (name P27) (type passive))
+ (pin (num 28) (name P28) (type passive))))
+ (libpart (lib stm32f100-discovery-shield) (part CONN6)
+ (description "Symbole general de connexion")
+ (fields
+ (field (name Reference) P)
+ (field (name Value) CONN6))
+ (pins
+ (pin (num 1) (name P1) (type passive))
+ (pin (num 2) (name P2) (type passive))
+ (pin (num 3) (name P3) (type passive))
+ (pin (num 4) (name P4) (type passive))
+ (pin (num 5) (name P5) (type passive))
+ (pin (num 6) (name P6) (type passive)))))
+ (libraries
+ (library (logical stm32f100-discovery-shield)
+ (uri E:\kicad-git\kicad_git_libs\template\stm32f100-discovery-shield\stm32f100-discovery-shield.lib)))
+ (nets
+ (net (code 1) (name /PB10)
+ (node (ref P3) (pin 1)))
+ (net (code 2) (name /PB11)
+ (node (ref P3) (pin 2)))
+ (net (code 3) (name /PB12)
+ (node (ref P3) (pin 3)))
+ (net (code 4) (name /PB13)
+ (node (ref P3) (pin 4)))
+ (net (code 5) (name /PB14)
+ (node (ref P3) (pin 5)))
+ (net (code 6) (name /PB15)
+ (node (ref P3) (pin 6)))
+ (net (code 7) (name "Net-(P1-Pad2)")
+ (node (ref P1) (pin 2)))
+ (net (code 8) (name "Net-(P2-Pad27)")
+ (node (ref P2) (pin 27)))
+ (net (code 9) (name +5V)
+ (node (ref P2) (pin 26)))
+ (net (code 10) (name /PA15)
+ (node (ref P2) (pin 13)))
+ (net (code 11) (name /PB6)
+ (node (ref P2) (pin 21)))
+ (net (code 12) (name /PB5)
+ (node (ref P2) (pin 20)))
+ (net (code 13) (name /PB4)
+ (node (ref P2) (pin 19)))
+ (net (code 14) (name /PB3)
+ (node (ref P2) (pin 18)))
+ (net (code 15) (name /PD2)
+ (node (ref P2) (pin 17)))
+ (net (code 16) (name /PC12)
+ (node (ref P2) (pin 16)))
+ (net (code 17) (name /PC11)
+ (node (ref P2) (pin 15)))
+ (net (code 18) (name /PC10)
+ (node (ref P2) (pin 14)))
+ (net (code 19) (name /PA14)
+ (node (ref P2) (pin 12)))
+ (net (code 20) (name /PA13)
+ (node (ref P2) (pin 11)))
+ (net (code 21) (name /PA12)
+ (node (ref P2) (pin 10)))
+ (net (code 22) (name /PA11)
+ (node (ref P2) (pin 9)))
+ (net (code 23) (name /PA10)
+ (node (ref P2) (pin 8)))
+ (net (code 24) (name /PA8)
+ (node (ref P2) (pin 6)))
+ (net (code 25) (name /PA9)
+ (node (ref P2) (pin 7)))
+ (net (code 26) (name /PC9)
+ (node (ref P2) (pin 5)))
+ (net (code 27) (name /PC8)
+ (node (ref P2) (pin 4)))
+ (net (code 28) (name /PC7)
+ (node (ref P2) (pin 3)))
+ (net (code 29) (name /PC6)
+ (node (ref P2) (pin 2)))
+ (net (code 30) (name /PA3)
+ (node (ref P1) (pin 18)))
+ (net (code 31) (name /PA4)
+ (node (ref P1) (pin 19)))
+ (net (code 32) (name /PB2)
+ (node (ref P1) (pin 27)))
+ (net (code 33) (name /PB7)
+ (node (ref P2) (pin 22)))
+ (net (code 34) (name /BOOT)
+ (node (ref P2) (pin 23)))
+ (net (code 35) (name /PB8)
+ (node (ref P2) (pin 24)))
+ (net (code 36) (name /PA6)
+ (node (ref P1) (pin 21)))
+ (net (code 37) (name +3V3)
+ (node (ref P1) (pin 3)))
+ (net (code 38) (name /VBAT)
+ (node (ref P1) (pin 4)))
+ (net (code 39) (name /PC13)
+ (node (ref P1) (pin 5)))
+ (net (code 40) (name /PC14)
+ (node (ref P1) (pin 6)))
+ (net (code 41) (name /PC15)
+ (node (ref P1) (pin 7)))
+ (net (code 42) (name /PD0)
+ (node (ref P1) (pin 8)))
+ (net (code 43) (name /PD1)
+ (node (ref P1) (pin 9)))
+ (net (code 44) (name /RST)
+ (node (ref P1) (pin 10)))
+ (net (code 45) (name /PA5)
+ (node (ref P1) (pin 20)))
+ (net (code 46) (name /PC0)
+ (node (ref P1) (pin 11)))
+ (net (code 47) (name /PB9)
+ (node (ref P2) (pin 25)))
+ (net (code 48) (name /PC1)
+ (node (ref P1) (pin 12)))
+ (net (code 49) (name /PA7)
+ (node (ref P1) (pin 22)))
+ (net (code 50) (name /PC2)
+ (node (ref P1) (pin 13)))
+ (net (code 51) (name /PC4)
+ (node (ref P1) (pin 23)))
+ (net (code 52) (name /PC3)
+ (node (ref P1) (pin 14)))
+ (net (code 53) (name /PC5)
+ (node (ref P1) (pin 24)))
+ (net (code 54) (name /PA0)
+ (node (ref P1) (pin 15)))
+ (net (code 55) (name /PB0)
+ (node (ref P1) (pin 25)))
+ (net (code 56) (name /PA1)
+ (node (ref P1) (pin 16)))
+ (net (code 57) (name /PB1)
+ (node (ref P1) (pin 26)))
+ (net (code 58) (name /PA2)
+ (node (ref P1) (pin 17)))
+ (net (code 59) (name GND)
+ (node (ref P1) (pin 1))
+ (node (ref P2) (pin 1))
+ (node (ref P1) (pin 28))
+ (node (ref P2) (pin 28)))))
\ No newline at end of file
diff --git a/template/stm32f100-discovery-shield/stm32f100-discovery-shield.pro b/template/stm32f100-discovery-shield/stm32f100-discovery-shield.pro
index 4411b1b..2e6bde0 100644
--- a/template/stm32f100-discovery-shield/stm32f100-discovery-shield.pro
+++ b/template/stm32f100-discovery-shield/stm32f100-discovery-shield.pro
@@ -1,6 +1,6 @@
-update=2012-10-20 12:46:25
+update=13/12/2016 09:10:33
version=1
-last_client=pcbnew
+last_client=kicad
[general]
version=1
[cvpcb]
@@ -8,47 +8,6 @@ version=1
NetIExt=net
[cvpcb/libraries]
EquName1=devcms
-[eeschema]
-version=1
-LibDir=
-NetFmtName=
-RptD_X=0
-RptD_Y=100
-RptLab=1
-LabSize=40
-[eeschema/libraries]
-LibName1=stm32f100-discovery-shield
-LibName2=stm32
-LibName3=power
-LibName4=device
-LibName5=transistors
-LibName6=conn
-LibName7=linear
-LibName8=regul
-LibName9=74xx
-LibName10=cmos4000
-LibName11=adc-dac
-LibName12=memory
-LibName13=xilinx
-LibName14=special
-LibName15=microcontrollers
-LibName16=dsp
-LibName17=microchip
-LibName18=analog_switches
-LibName19=motorola
-LibName20=texas
-LibName21=intel
-LibName22=audio
-LibName23=interface
-LibName24=digital-audio
-LibName25=philips
-LibName26=display
-LibName27=cypress
-LibName28=siliconi
-LibName29=opto
-LibName30=atmel
-LibName31=contrib
-LibName32=valves
[pcbnew]
version=1
LastNetListRead=
@@ -79,3 +38,22 @@ LibName9=led
LibName10=dip_sockets
LibName11=pga_sockets
LibName12=valves
+[eeschema]
+version=1
+LibDir=
+[eeschema/libraries]
+LibName1=stm32f100-discovery-shield
+LibName2=stm32
+LibName3=power
+LibName4=device
+LibName5=transistors
+LibName6=conn
+LibName7=linear
+LibName8=regul
+LibName9=74xx
+LibName10=adc-dac
+LibName11=memory
+LibName12=microcontrollers
+LibName13=microchip
+LibName14=analog_switches
+LibName15=display
diff --git a/template/stm32f100-discovery-shield/stm32f100-discovery-shield.sch b/template/stm32f100-discovery-shield/stm32f100-discovery-shield.sch
index fd499ff..0dea3e9 100644
--- a/template/stm32f100-discovery-shield/stm32f100-discovery-shield.sch
+++ b/template/stm32f100-discovery-shield/stm32f100-discovery-shield.sch
@@ -1,4 +1,4 @@
-EESchema Schematic File Version 2 date 2012-10-20 12:45:55
+EESchema Schematic File Version 2
LIBS:stm32f100-discovery-shield
LIBS:stm32
LIBS:power
@@ -8,31 +8,14 @@ LIBS:conn
LIBS:linear
LIBS:regul
LIBS:74xx
-LIBS:cmos4000
LIBS:adc-dac
LIBS:memory
-LIBS:xilinx
-LIBS:special
LIBS:microcontrollers
-LIBS:dsp
LIBS:microchip
LIBS:analog_switches
-LIBS:motorola
-LIBS:texas
-LIBS:intel
-LIBS:audio
-LIBS:interface
-LIBS:digital-audio
-LIBS:philips
LIBS:display
-LIBS:cypress
-LIBS:siliconi
-LIBS:opto
-LIBS:atmel
-LIBS:contrib
-LIBS:valves
LIBS:stm32f100-discovery-shield-cache
-EELAYER 27 0
+EELAYER 25 0
EELAYER END
$Descr A4 11693 8268
encoding utf-8
@@ -49,320 +32,330 @@ $EndDescr
$Comp
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- 1 10950 1950
+P 10800 1950
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+F 1 "CONN28" V 10850 1950 60 0000 C CNN
+F 2 "Pin_Headers:Pin_Header_Straight_1x28" V 11000 1950 30 0000 C CNN
+F 3 "" H 10800 1950 60 0001 C CNN
+ 1 10800 1950
1 0 0 -1
$EndComp
$Comp
L CONN28 P2
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- 1 10950 4850
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+ 1 10800 4850
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$EndComp
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L CONN6 P3
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- 1 10950 6650
+P 9000 850
+F 0 "P3" V 8950 850 60 0000 C CNN
+F 1 "CONN6" V 9050 850 60 0000 C CNN
+F 2 "stm32f100-discovery-shield:PIN_ARRAY_6X1" V 9200 850 30 0000 C CNN
+F 3 "" H 9000 850 60 0001 C CNN
+ 1 9000 850
1 0 0 -1
$EndComp
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Wire Wire Line
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+ 10450 4200 10150 4200
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+ 10450 4500 10150 4500
Wire Wire Line
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Wire Wire Line
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Wire Wire Line
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Wire Wire Line
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Wire Wire Line
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Wire Wire Line
- 10600 5200 10300 5200
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Wire Wire Line
- 10600 5300 10300 5300
+ 10450 5300 10150 5300
Wire Wire Line
- 10600 5400 10300 5400
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Wire Wire Line
- 10600 5500 10300 5500
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Wire Wire Line
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Wire Wire Line
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Wire Wire Line
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Wire Wire Line
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Wire Wire Line
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Wire Wire Line
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Wire Wire Line
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Wire Wire Line
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Wire Wire Line
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Wire Wire Line
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Wire Wire Line
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Wire Wire Line
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Wire Wire Line
- 10600 6900 10300 6900
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PB10
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+Text Label 8400 700 0 40 ~ 0
PB11
-Text Label 10350 6600 0 40 ~ 0
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PB12
-Text Label 10350 6700 0 40 ~ 0
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PB13
-Text Label 10350 6800 0 40 ~ 0
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PB14
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PB15
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$Comp
L GND #PWR01
U 1 1 50827354
-P 10300 650
-F 0 "#PWR01" H 10300 650 30 0001 C CNN
-F 1 "GND" H 10300 580 30 0001 C CNN
- 1 10300 650
- 1 0 0 -1
+P 10350 600
+F 0 "#PWR01" H 10350 350 50 0001 C CNN
+F 1 "GND" H 10350 450 50 0000 C CNN
+F 2 "" H 10350 600 50 0000 C CNN
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+ 1 10350 600
+ 0 1 1 0
$EndComp
$Comp
L GND #PWR02
U 1 1 50827361
-P 10300 3350
-F 0 "#PWR02" H 10300 3350 30 0001 C CNN
-F 1 "GND" H 10300 3280 30 0001 C CNN
- 1 10300 3350
- 1 0 0 -1
+P 10150 3300
+F 0 "#PWR02" H 10150 3050 50 0001 C CNN
+F 1 "GND" H 10150 3150 50 0000 C CNN
+F 2 "" H 10150 3300 50 0000 C CNN
+F 3 "" H 10150 3300 50 0000 C CNN
+ 1 10150 3300
+ 0 1 1 0
$EndComp
$Comp
L GND #PWR03
U 1 1 50827367
-P 10300 3550
-F 0 "#PWR03" H 10300 3550 30 0001 C CNN
-F 1 "GND" H 10300 3480 30 0001 C CNN
- 1 10300 3550
- 1 0 0 -1
+P 10150 3500
+F 0 "#PWR03" H 10150 3250 50 0001 C CNN
+F 1 "GND" H 10150 3350 50 0000 C CNN
+F 2 "" H 10150 3500 50 0000 C CNN
+F 3 "" H 10150 3500 50 0000 C CNN
+ 1 10150 3500
+ 0 1 1 0
$EndComp
$Comp
L GND #PWR04
U 1 1 5082736D
-P 10300 6250
-F 0 "#PWR04" H 10300 6250 30 0001 C CNN
-F 1 "GND" H 10300 6180 30 0001 C CNN
- 1 10300 6250
- 1 0 0 -1
+P 10150 6200
+F 0 "#PWR04" H 10150 5950 50 0001 C CNN
+F 1 "GND" H 10150 6050 50 0000 C CNN
+F 2 "" H 10150 6200 50 0000 C CNN
+F 3 "" H 10150 6200 50 0000 C CNN
+ 1 10150 6200
+ 0 1 1 0
$EndComp
$Comp
L +3.3V #PWR05
U 1 1 50827375
-P 10300 800
-F 0 "#PWR05" H 10300 760 30 0001 C CNN
-F 1 "+3.3V" H 10300 910 30 0000 C CNN
- 1 10300 800
+P 10150 800
+F 0 "#PWR05" H 10150 650 50 0001 C CNN
+F 1 "+3.3V" H 10150 940 50 0000 C CNN
+F 2 "" H 10150 800 50 0000 C CNN
+F 3 "" H 10150 800 50 0000 C CNN
+ 1 10150 800
0 -1 -1 0
$EndComp
$Comp
L +5V #PWR06
U 1 1 50827384
-P 10300 3700
-F 0 "#PWR06" H 10300 3790 20 0001 C CNN
-F 1 "+5V" H 10300 3790 30 0000 C CNN
- 1 10300 3700
+P 10150 3700
+F 0 "#PWR06" H 10150 3550 50 0001 C CNN
+F 1 "+5V" H 10150 3840 50 0000 C CNN
+F 2 "" H 10150 3700 50 0000 C CNN
+F 3 "" H 10150 3700 50 0000 C CNN
+ 1 10150 3700
0 -1 -1 0
$EndComp
-Wire Wire Line
- 10300 6200 10300 6250
-Wire Wire Line
- 10300 3500 10300 3550
-Wire Wire Line
- 10300 3300 10300 3350
-Wire Wire Line
- 10300 600 10300 650
-Text Label 10350 900 0 40 ~ 0
+Text Label 10200 900 0 40 ~ 0
VBAT
-Text Label 10350 1000 0 40 ~ 0
+Text Label 10200 1000 0 40 ~ 0
PC13
-Text Label 10350 1100 0 40 ~ 0
+Text Label 10200 1100 0 40 ~ 0
PC14
-Text Label 10350 1200 0 40 ~ 0
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PC15
-Text Label 10350 1300 0 40 ~ 0
+Text Label 10200 1300 0 40 ~ 0
PD0
-Text Label 10350 1400 0 40 ~ 0
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PD1
-Text Label 10350 1500 0 40 ~ 0
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RST
-Text Label 10350 1600 0 40 ~ 0
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PC0
-Text Label 10350 1700 0 40 ~ 0
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PC1
-Text Label 10350 1800 0 40 ~ 0
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PC2
-Text Label 10350 1900 0 40 ~ 0
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PC3
-Text Label 10350 2000 0 40 ~ 0
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PA0
-Text Label 10350 2100 0 40 ~ 0
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PA1
-Text Label 10350 2200 0 40 ~ 0
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PA2
-Text Label 10350 2300 0 40 ~ 0
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PA3
-Text Label 10350 2400 0 40 ~ 0
+Text Label 10200 2400 0 40 ~ 0
PA4
-Text Label 10350 2500 0 40 ~ 0
+Text Label 10200 2500 0 40 ~ 0
PA5
-Text Label 10350 2600 0 40 ~ 0
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PA6
-Text Label 10350 2700 0 40 ~ 0
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PA7
-Text Label 10350 2800 0 40 ~ 0
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PC4
-Text Label 10350 2900 0 40 ~ 0
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PC5
-Text Label 10350 3000 0 40 ~ 0
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PB0
-Text Label 10350 3100 0 40 ~ 0
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PB1
-Text Label 10350 3200 0 40 ~ 0
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PB2
-Text Label 10350 3800 0 40 ~ 0
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PB9
-Text Label 10350 3900 0 40 ~ 0
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PB8
-Text Label 10350 4000 0 40 ~ 0
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BOOT
-Text Label 10350 4100 0 40 ~ 0
+Text Label 10200 4100 0 40 ~ 0
PB7
-Text Label 10350 4200 0 40 ~ 0
+Text Label 10200 4200 0 40 ~ 0
PB6
-Text Label 10350 4300 0 40 ~ 0
+Text Label 10200 4300 0 40 ~ 0
PB5
-Text Label 10350 4400 0 40 ~ 0
+Text Label 10200 4400 0 40 ~ 0
PB4
-Text Label 10350 4500 0 40 ~ 0
+Text Label 10200 4500 0 40 ~ 0
PB3
-Text Label 10350 4600 0 40 ~ 0
+Text Label 10200 4600 0 40 ~ 0
PD2
-Text Label 10350 4700 0 40 ~ 0
+Text Label 10200 4700 0 40 ~ 0
PC12
-Text Label 10350 4800 0 40 ~ 0
+Text Label 10200 4800 0 40 ~ 0
PC11
-Text Label 10350 4900 0 40 ~ 0
+Text Label 10200 4900 0 40 ~ 0
PC10
-Text Label 10350 5000 0 40 ~ 0
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PA15
-Text Label 10350 5100 0 40 ~ 0
+Text Label 10200 5100 0 40 ~ 0
PA14
-Text Label 10350 5200 0 40 ~ 0
+Text Label 10200 5200 0 40 ~ 0
PA13
-Text Label 10350 5300 0 40 ~ 0
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PA12
-Text Label 10350 5400 0 40 ~ 0
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PA11
-Text Label 10350 5500 0 40 ~ 0
+Text Label 10200 5500 0 40 ~ 0
PA10
-Text Label 10350 5700 0 40 ~ 0
+Text Label 10200 5700 0 40 ~ 0
PA8
-Text Label 10350 5600 0 40 ~ 0
+Text Label 10200 5600 0 40 ~ 0
PA9
-Text Label 10350 5800 0 40 ~ 0
+Text Label 10200 5800 0 40 ~ 0
PC9
-Text Label 10350 5900 0 40 ~ 0
+Text Label 10200 5900 0 40 ~ 0
PC8
-Text Label 10350 6000 0 40 ~ 0
+Text Label 10200 6000 0 40 ~ 0
PC7
-Text Label 10350 6100 0 40 ~ 0
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$EndSCHEMATC
diff --git a/template/ti-stellaris-boosterpack40/boosterpack40-cache.lib b/template/ti-stellaris-boosterpack40/boosterpack40-cache.lib
index ea7c11d..48718a8 100644
--- a/template/ti-stellaris-boosterpack40/boosterpack40-cache.lib
+++ b/template/ti-stellaris-boosterpack40/boosterpack40-cache.lib
@@ -1,15 +1,18 @@
-EESchema-LIBRARY Version 2.3 Date: Thu 18 Oct 2012 10:04:05 PM PDT
+EESchema-LIBRARY Version 2.3
#encoding utf-8
#
# +5V
#
-DEF +5V #PWR 0 40 Y Y 1 F P
-F0 "#PWR" 0 90 20 H I C CNN
-F1 "+5V" 0 90 30 H V C CNN
+DEF +5V #PWR 0 0 Y Y 1 F P
+F0 "#PWR" 0 -150 50 H I C CNN
+F1 "+5V" 0 140 50 H V C CNN
+F2 "" 0 0 60 H V C CNN
+F3 "" 0 0 60 H V C CNN
DRAW
-X +5V 1 0 0 0 U 20 20 0 0 W N
-C 0 50 20 0 1 0 N
-P 4 0 1 0 0 0 0 30 0 30 0 30 N
+P 2 0 1 0 -30 50 0 100 N
+P 2 0 1 0 0 0 0 100 N
+P 2 0 1 0 0 100 30 50 N
+X +5V 1 0 0 0 U 50 50 1 1 W N
ENDDRAW
ENDDEF
#
@@ -18,6 +21,8 @@ ENDDEF
DEF CONN_3 K 0 40 Y N 1 F N
F0 "K" -50 0 50 V V C CNN
F1 "CONN_3" 50 0 40 V V C CNN
+F2 "" 0 0 60 H I C CNN
+F3 "" 0 0 60 H I C CNN
DRAW
S -100 150 100 -150 0 1 0 N
X P1 1 -350 100 250 R 60 60 1 1 P I
@@ -28,12 +33,14 @@ ENDDEF
#
# GND
#
-DEF ~GND #PWR 0 0 Y Y 1 F P
-F0 "#PWR" 0 0 30 H I C CNN
-F1 "GND" 0 -70 30 H I C CNN
+DEF GND #PWR 0 0 Y Y 1 F P
+F0 "#PWR" 0 -150 50 H I C CNN
+F1 "GND" 0 -123 30 H V C CNN
+F2 "" 0 0 60 H V C CNN
+F3 "" 0 0 60 H V C CNN
DRAW
-P 4 0 1 0 -50 0 0 -50 50 0 -50 0 N
-X GND 1 0 0 0 U 30 30 1 1 W N
+P 6 0 1 0 0 0 0 -50 50 -50 0 -100 -50 -50 0 -50 N
+X GND 1 0 0 0 D 20 30 1 1 W N
ENDDRAW
ENDDEF
#
@@ -42,6 +49,8 @@ ENDDEF
DEF Ti_Booster_40_J1 J 0 40 Y Y 1 F N
F0 "J" -50 650 60 H V C CNN
F1 "Ti_Booster_40_J1" 0 -650 60 H V C CNN
+F2 "" 0 0 60 H I C CNN
+F3 "" 0 0 60 H I C CNN
DRAW
S -300 550 400 -550 0 1 0 N
X 1.01/Vcc 1 -600 450 300 R 50 50 1 1 W
@@ -62,6 +71,8 @@ ENDDEF
DEF Ti_Booster_40_J2 J 0 40 Y Y 1 F N
F0 "J" -50 650 60 H V C CNN
F1 "Ti_Booster_40_J2" 0 -650 60 H V C CNN
+F2 "" 0 0 60 H I C CNN
+F3 "" 0 0 60 H I C CNN
DRAW
S -300 550 400 -550 0 1 0 N
X 2.01/GND 1 -600 450 300 R 50 50 1 1 W
@@ -82,6 +93,8 @@ ENDDEF
DEF Ti_Booster_40_J3 J 0 40 Y Y 1 F N
F0 "J" -50 650 60 H V C CNN
F1 "Ti_Booster_40_J3" 0 -650 60 H V C CNN
+F2 "" 0 0 60 H I C CNN
+F3 "" 0 0 60 H I C CNN
DRAW
S -300 550 400 -550 0 1 0 N
X 3.01/+5V 1 -600 450 300 R 50 50 1 1 W
@@ -102,6 +115,8 @@ ENDDEF
DEF Ti_Booster_40_J4 J 0 40 Y Y 1 F N
F0 "J" -50 650 60 H V C CNN
F1 "Ti_Booster_40_J4" 0 -650 60 H V C CNN
+F2 "" 0 0 60 H I C CNN
+F3 "" 0 0 60 H I C CNN
DRAW
S -300 550 400 -550 0 1 0 N
X 4.01/PF2 1 -600 450 300 R 50 50 1 1 W
@@ -120,12 +135,14 @@ ENDDEF
# VCC
#
DEF VCC #PWR 0 0 Y Y 1 F P
-F0 "#PWR" 0 100 30 H I C CNN
-F1 "VCC" 0 100 30 H V C CNN
+F0 "#PWR" 0 -50 40 H I C CNN
+F1 "VCC" 0 133 50 H V C CNN
+F2 "" 0 0 60 H V C CNN
+F3 "" 0 0 60 H V C CNN
DRAW
-X VCC 1 0 0 0 U 20 20 0 0 W N
-C 0 50 20 0 1 0 N
-P 3 0 1 0 0 0 0 30 0 30 N
+C 0 75 25 0 1 0 N
+P 2 0 1 0 0 0 0 50 N
+X VCC 1 0 0 0 U 20 30 1 1 W N
ENDDRAW
ENDDEF
#
diff --git a/template/ti-stellaris-boosterpack40/boosterpack40.cmp b/template/ti-stellaris-boosterpack40/boosterpack40.cmp
deleted file mode 100644
index eab4a19..0000000
--- a/template/ti-stellaris-boosterpack40/boosterpack40.cmp
+++ /dev/null
@@ -1,38 +0,0 @@
-Cmp-Mod V01 Created by CvPcb (2011-nov-30)-testing date = Thu 18 Oct 2012 09:58:43 PM PDT
-
-BeginCmp
-TimeStamp = /5080DB5C;
-Reference = J1;
-ValeurCmp = TI_BOOSTER_40_J1;
-IdModule = SIL-10;
-EndCmp
-
-BeginCmp
-TimeStamp = /5080DBF4;
-Reference = J2;
-ValeurCmp = TI_BOOSTER_40_J2;
-IdModule = SIL-10;
-EndCmp
-
-BeginCmp
-TimeStamp = /5080DC03;
-Reference = J3;
-ValeurCmp = TI_BOOSTER_40_J3;
-IdModule = SIL-10;
-EndCmp
-
-BeginCmp
-TimeStamp = /5080DC12;
-Reference = J4;
-ValeurCmp = TI_BOOSTER_40_J4;
-IdModule = SIL-10;
-EndCmp
-
-BeginCmp
-TimeStamp = /5080A33C;
-Reference = J5;
-ValeurCmp = CONN_3;
-IdModule = SIL-3;
-EndCmp
-
-EndListe
diff --git a/template/ti-stellaris-boosterpack40/boosterpack40.net b/template/ti-stellaris-boosterpack40/boosterpack40.net
index 933e50d..9c6b812 100644
--- a/template/ti-stellaris-boosterpack40/boosterpack40.net
+++ b/template/ti-stellaris-boosterpack40/boosterpack40.net
@@ -1,68 +1,204 @@
-# EESchema Netlist Version 1.1 created Thu 18 Oct 2012 09:58:06 PM PDT
-(
- ( /5080A33C $noname J5 CONN_3 {Lib=CONN_3}
- ( 1 VCC )
- ( 2 GND )
- ( 3 GND )
- )
- ( /5080DB5C $noname J1 TI_BOOSTER_40_J1 {Lib=TI_BOOSTER_40_J1}
- ( 1 VCC )
- ( 2 ? )
- ( 3 ? )
- ( 4 ? )
- ( 5 ? )
- ( 6 ? )
- ( 7 ? )
- ( 8 ? )
- ( 9 ? )
- ( 10 ? )
- )
- ( /5080DBF4 $noname J2 TI_BOOSTER_40_J2 {Lib=TI_BOOSTER_40_J2}
- ( 1 GND )
- ( 2 ? )
- ( 3 ? )
- ( 4 ? )
- ( 5 ? )
- ( 6 ? )
- ( 7 ? )
- ( 8 ? )
- ( 9 ? )
- ( 10 ? )
- )
- ( /5080DC03 $noname J3 TI_BOOSTER_40_J3 {Lib=TI_BOOSTER_40_J3}
- ( 1 +5V )
- ( 2 GND )
- ( 3 ? )
- ( 4 ? )
- ( 5 ? )
- ( 6 ? )
- ( 7 ? )
- ( 8 ? )
- ( 9 ? )
- ( 10 ? )
- )
- ( /5080DC12 $noname J4 TI_BOOSTER_40_J4 {Lib=TI_BOOSTER_40_J4}
- ( 1 ? )
- ( 2 ? )
- ( 3 ? )
- ( 4 ? )
- ( 5 ? )
- ( 6 ? )
- ( 7 ? )
- ( 8 ? )
- ( 9 ? )
- ( 10 ? )
- )
-)
-*
-{ Pin List by Nets
-Net 8 "GND" "GND"
- J5 3
- J5 2
- J2 1
- J3 2
-Net 27 "VCC" "VCC"
- J5 1
- J1 1
-}
-#End
+(export (version D)
+ (design
+ (source E:\kicad-git\kicad_git_libs\template\ti-stellaris-boosterpack40\boosterpack40.sch)
+ (date "13/12/2016 09:02:22")
+ (tool "Eeschema (2016-12-12 revision b1e37ae)-master")
+ (sheet (number 1) (name /) (tstamps /)
+ (title_block
+ (title)
+ (company)
+ (rev)
+ (date "19 oct 2012")
+ (source boosterpack40.sch)
+ (comment (number 1) (value ""))
+ (comment (number 2) (value ""))
+ (comment (number 3) (value ""))
+ (comment (number 4) (value "")))))
+ (components
+ (comp (ref J5)
+ (value CONN_3)
+ (footprint Connect:SIL-3)
+ (libsource (lib boosterpack40-cache) (part CONN_3))
+ (sheetpath (names /) (tstamps /))
+ (tstamp 5080A33C))
+ (comp (ref J1)
+ (value TI_BOOSTER_40_J1)
+ (footprint Connect:SIL-10)
+ (libsource (lib boosterpack) (part Ti_Booster_40_J1))
+ (sheetpath (names /) (tstamps /))
+ (tstamp 5080DB5C))
+ (comp (ref J2)
+ (value TI_BOOSTER_40_J2)
+ (footprint Connect:SIL-10)
+ (libsource (lib boosterpack) (part Ti_Booster_40_J2))
+ (sheetpath (names /) (tstamps /))
+ (tstamp 5080DBF4))
+ (comp (ref J3)
+ (value TI_BOOSTER_40_J3)
+ (footprint Connect:SIL-10)
+ (libsource (lib boosterpack) (part Ti_Booster_40_J3))
+ (sheetpath (names /) (tstamps /))
+ (tstamp 5080DC03))
+ (comp (ref J4)
+ (value TI_BOOSTER_40_J4)
+ (footprint Connect:SIL-10)
+ (libsource (lib boosterpack) (part Ti_Booster_40_J4))
+ (sheetpath (names /) (tstamps /))
+ (tstamp 5080DC12)))
+ (libparts
+ (libpart (lib boosterpack40-cache) (part CONN_3)
+ (fields
+ (field (name Reference) K)
+ (field (name Value) CONN_3))
+ (pins
+ (pin (num 1) (name P1) (type passive))
+ (pin (num 2) (name PM) (type passive))
+ (pin (num 3) (name P3) (type passive))))
+ (libpart (lib boosterpack) (part Ti_Booster_40_J1)
+ (fields
+ (field (name Reference) J)
+ (field (name Value) Ti_Booster_40_J1))
+ (pins
+ (pin (num 1) (name 1.01/Vcc) (type power_in))
+ (pin (num 2) (name 1.02/PB5) (type BiDi))
+ (pin (num 3) (name 1.03/PB0/Rxd) (type BiDi))
+ (pin (num 4) (name 1.04/PB1/TxD) (type BiDi))
+ (pin (num 5) (name 1.05/PE4) (type BiDi))
+ (pin (num 6) (name 1.06/PE5) (type BiDi))
+ (pin (num 7) (name 1.07/PB4) (type BiDi))
+ (pin (num 8) (name 1.08/PA5) (type BiDi))
+ (pin (num 9) (name 1.09/PA6) (type BiDi))
+ (pin (num 10) (name 1.10/PA7) (type BiDi))))
+ (libpart (lib boosterpack) (part Ti_Booster_40_J2)
+ (fields
+ (field (name Reference) J)
+ (field (name Value) Ti_Booster_40_J2))
+ (pins
+ (pin (num 1) (name 2.01/GND) (type power_in))
+ (pin (num 2) (name 2.02/PB2) (type BiDi))
+ (pin (num 3) (name 2.03/PE0) (type BiDi))
+ (pin (num 4) (name 2.04/PF0) (type BiDi))
+ (pin (num 5) (name 2.05/RESET) (type BiDi))
+ (pin (num 6) (name 2.06/PB7) (type BiDi))
+ (pin (num 7) (name 2.07/PB6) (type BiDi))
+ (pin (num 8) (name 2.08/PA4) (type BiDi))
+ (pin (num 9) (name 2.09/PA3) (type BiDi))
+ (pin (num 10) (name 2.10/PA2) (type BiDi))))
+ (libpart (lib boosterpack) (part Ti_Booster_40_J3)
+ (fields
+ (field (name Reference) J)
+ (field (name Value) Ti_Booster_40_J3))
+ (pins
+ (pin (num 1) (name 3.01/+5V) (type power_in))
+ (pin (num 2) (name 3.02/GND) (type BiDi))
+ (pin (num 3) (name 3.03/PD0) (type BiDi))
+ (pin (num 4) (name 3.04/PD1) (type BiDi))
+ (pin (num 5) (name 3.05/PD2) (type BiDi))
+ (pin (num 6) (name 3.06/PD3) (type BiDi))
+ (pin (num 7) (name 3.07/PE1) (type BiDi))
+ (pin (num 8) (name 3.08/PE2) (type BiDi))
+ (pin (num 9) (name 3.09/PE3) (type BiDi))
+ (pin (num 10) (name 3.10/PF1) (type BiDi))))
+ (libpart (lib boosterpack) (part Ti_Booster_40_J4)
+ (fields
+ (field (name Reference) J)
+ (field (name Value) Ti_Booster_40_J4))
+ (pins
+ (pin (num 1) (name 4.01/PF2) (type power_in))
+ (pin (num 2) (name 4.02/PF3) (type BiDi))
+ (pin (num 3) (name 4.03/PB3) (type BiDi))
+ (pin (num 4) (name 4.04/PC4) (type BiDi))
+ (pin (num 5) (name 4.05/PC5) (type BiDi))
+ (pin (num 6) (name 4.06/PC6) (type BiDi))
+ (pin (num 7) (name 4.07/PC7) (type BiDi))
+ (pin (num 8) (name 4.08/PD6) (type BiDi))
+ (pin (num 9) (name 4.09/PD7) (type BiDi))
+ (pin (num 10) (name 4.10/PF4) (type BiDi)))))
+ (libraries
+ (library (logical boosterpack)
+ (uri E:\kicad-git\kicad_git_libs\template\ti-stellaris-boosterpack40\boosterpack.lib))
+ (library (logical boosterpack40-cache)
+ (uri E:\kicad-git\kicad_git_libs\template\ti-stellaris-boosterpack40\boosterpack40-cache.lib)))
+ (nets
+ (net (code 1) (name "Net-(J3-Pad10)")
+ (node (ref J3) (pin 10)))
+ (net (code 2) (name "Net-(J2-Pad6)")
+ (node (ref J2) (pin 6)))
+ (net (code 3) (name "Net-(J2-Pad7)")
+ (node (ref J2) (pin 7)))
+ (net (code 4) (name "Net-(J2-Pad8)")
+ (node (ref J2) (pin 8)))
+ (net (code 5) (name "Net-(J2-Pad9)")
+ (node (ref J2) (pin 9)))
+ (net (code 6) (name "Net-(J2-Pad10)")
+ (node (ref J2) (pin 10)))
+ (net (code 7) (name +5V)
+ (node (ref J3) (pin 1)))
+ (net (code 8) (name GND)
+ (node (ref J5) (pin 2))
+ (node (ref J5) (pin 3))
+ (node (ref J2) (pin 1))
+ (node (ref J3) (pin 2)))
+ (net (code 9) (name "Net-(J3-Pad3)")
+ (node (ref J3) (pin 3)))
+ (net (code 10) (name "Net-(J3-Pad4)")
+ (node (ref J3) (pin 4)))
+ (net (code 11) (name "Net-(J3-Pad5)")
+ (node (ref J3) (pin 5)))
+ (net (code 12) (name "Net-(J3-Pad6)")
+ (node (ref J3) (pin 6)))
+ (net (code 13) (name "Net-(J3-Pad7)")
+ (node (ref J3) (pin 7)))
+ (net (code 14) (name "Net-(J3-Pad8)")
+ (node (ref J3) (pin 8)))
+ (net (code 15) (name "Net-(J3-Pad9)")
+ (node (ref J3) (pin 9)))
+ (net (code 16) (name "Net-(J2-Pad5)")
+ (node (ref J2) (pin 5)))
+ (net (code 17) (name "Net-(J4-Pad1)")
+ (node (ref J4) (pin 1)))
+ (net (code 18) (name "Net-(J4-Pad2)")
+ (node (ref J4) (pin 2)))
+ (net (code 19) (name "Net-(J4-Pad3)")
+ (node (ref J4) (pin 3)))
+ (net (code 20) (name "Net-(J4-Pad4)")
+ (node (ref J4) (pin 4)))
+ (net (code 21) (name "Net-(J4-Pad5)")
+ (node (ref J4) (pin 5)))
+ (net (code 22) (name "Net-(J4-Pad6)")
+ (node (ref J4) (pin 6)))
+ (net (code 23) (name "Net-(J4-Pad7)")
+ (node (ref J4) (pin 7)))
+ (net (code 24) (name "Net-(J4-Pad8)")
+ (node (ref J4) (pin 8)))
+ (net (code 25) (name "Net-(J4-Pad9)")
+ (node (ref J4) (pin 9)))
+ (net (code 26) (name "Net-(J4-Pad10)")
+ (node (ref J4) (pin 10)))
+ (net (code 27) (name VCC)
+ (node (ref J5) (pin 1))
+ (node (ref J1) (pin 1)))
+ (net (code 28) (name "Net-(J1-Pad2)")
+ (node (ref J1) (pin 2)))
+ (net (code 29) (name "Net-(J1-Pad3)")
+ (node (ref J1) (pin 3)))
+ (net (code 30) (name "Net-(J1-Pad4)")
+ (node (ref J1) (pin 4)))
+ (net (code 31) (name "Net-(J1-Pad5)")
+ (node (ref J1) (pin 5)))
+ (net (code 32) (name "Net-(J1-Pad6)")
+ (node (ref J1) (pin 6)))
+ (net (code 33) (name "Net-(J1-Pad7)")
+ (node (ref J1) (pin 7)))
+ (net (code 34) (name "Net-(J1-Pad8)")
+ (node (ref J1) (pin 8)))
+ (net (code 35) (name "Net-(J1-Pad9)")
+ (node (ref J1) (pin 9)))
+ (net (code 36) (name "Net-(J1-Pad10)")
+ (node (ref J1) (pin 10)))
+ (net (code 37) (name "Net-(J2-Pad2)")
+ (node (ref J2) (pin 2)))
+ (net (code 38) (name "Net-(J2-Pad3)")
+ (node (ref J2) (pin 3)))
+ (net (code 39) (name "Net-(J2-Pad4)")
+ (node (ref J2) (pin 4)))))
\ No newline at end of file
diff --git a/template/ti-stellaris-boosterpack40/boosterpack40.pro b/template/ti-stellaris-boosterpack40/boosterpack40.pro
index d2bacba..0980082 100644
--- a/template/ti-stellaris-boosterpack40/boosterpack40.pro
+++ b/template/ti-stellaris-boosterpack40/boosterpack40.pro
@@ -1,6 +1,6 @@
-update=Wed 10 Apr 2013 04:16:40 PM CDT
+update=13/12/2016 08:53:50
version=1
-last_client=eeschema
+last_client=kicad
[cvpcb]
version=1
NetIExt=net
@@ -41,11 +41,6 @@ version=1
[eeschema]
version=1
LibDir=
-NetFmtName=
-RptD_X=0
-RptD_Y=100
-RptLab=1
-LabSize=60
[eeschema/libraries]
LibName1=boosterpack
LibName2=power
@@ -59,22 +54,21 @@ LibName9=cmos4000
LibName10=adc-dac
LibName11=memory
LibName12=xilinx
-LibName13=special
-LibName14=microcontrollers
-LibName15=dsp
-LibName16=microchip
-LibName17=analog_switches
-LibName18=motorola
-LibName19=texas
-LibName20=intel
-LibName21=audio
-LibName22=interface
-LibName23=digital-audio
-LibName24=philips
-LibName25=display
-LibName26=cypress
-LibName27=siliconi
-LibName28=opto
-LibName29=atmel
-LibName30=contrib
-LibName31=valves
+LibName13=microcontrollers
+LibName14=dsp
+LibName15=microchip
+LibName16=analog_switches
+LibName17=motorola
+LibName18=texas
+LibName19=intel
+LibName20=audio
+LibName21=interface
+LibName22=digital-audio
+LibName23=philips
+LibName24=display
+LibName25=cypress
+LibName26=siliconi
+LibName27=opto
+LibName28=atmel
+LibName29=contrib
+LibName30=valves
diff --git a/template/ti-stellaris-boosterpack40/boosterpack40.sch b/template/ti-stellaris-boosterpack40/boosterpack40.sch
index fdc14e3..c12bd29 100644
--- a/template/ti-stellaris-boosterpack40/boosterpack40.sch
+++ b/template/ti-stellaris-boosterpack40/boosterpack40.sch
@@ -1,4 +1,4 @@
-EESchema Schematic File Version 2 date Thu 18 Oct 2012 10:04:05 PM PDT
+EESchema Schematic File Version 2
LIBS:boosterpack
LIBS:power
LIBS:device
@@ -11,7 +11,6 @@ LIBS:cmos4000
LIBS:adc-dac
LIBS:memory
LIBS:xilinx
-LIBS:special
LIBS:microcontrollers
LIBS:dsp
LIBS:microchip
@@ -31,7 +30,7 @@ LIBS:atmel
LIBS:contrib
LIBS:valves
LIBS:boosterpack40-cache
-EELAYER 27 0
+EELAYER 26 0
EELAYER END
$Descr A4 11693 8268
encoding utf-8
@@ -51,6 +50,8 @@ U 1 1 5080A33C
P 7600 6800
F 0 "J5" V 7550 6800 50 0000 C CNN
F 1 "CONN_3" V 7650 6800 40 0000 C CNN
+F 2 "Connect:SIL-3" H 7600 6800 60 0000 C CNN
+F 3 "" H 7600 6800 60 0001 C CNN
1 7600 6800
1 0 0 1
$EndComp
@@ -64,6 +65,8 @@ U 1 1 5080A56F
P 7000 6900
F 0 "#PWR01" H 7000 7000 30 0001 C CNN
F 1 "VCC" H 7000 7000 30 0000 C CNN
+F 2 "" H 7000 6900 60 0001 C CNN
+F 3 "" H 7000 6900 60 0001 C CNN
1 7000 6900
0 -1 -1 0
$EndComp
@@ -73,6 +76,8 @@ U 1 1 5080A57E
P 7000 6700
F 0 "#PWR02" H 7000 6700 30 0001 C CNN
F 1 "GND" H 7000 6630 30 0001 C CNN
+F 2 "" H 7000 6700 60 0001 C CNN
+F 3 "" H 7000 6700 60 0001 C CNN
1 7000 6700
0 1 1 0
$EndComp
@@ -85,8 +90,10 @@ $Comp
L GND #PWR03
U 1 1 5080AA99
P 9150 2450
-F 0 "#PWR03" H 9150 2450 30 0001 C CNN
-F 1 "GND" H 9150 2380 30 0001 C CNN
+F 0 "#PWR03" H 9150 2200 50 0001 C CNN
+F 1 "GND" H 9150 2300 50 0000 C CNN
+F 2 "" H 9150 2450 50 0000 C CNN
+F 3 "" H 9150 2450 50 0000 C CNN
1 9150 2450
0 1 1 0
$EndComp
@@ -94,44 +101,54 @@ $Comp
L VCC #PWR04
U 1 1 5080AA9F
P 9150 900
-F 0 "#PWR04" H 9150 1000 30 0001 C CNN
-F 1 "VCC" H 9150 1000 30 0000 C CNN
+F 0 "#PWR04" H 9150 750 50 0001 C CNN
+F 1 "VCC" H 9150 1050 50 0000 C CNN
+F 2 "" H 9150 900 50 0000 C CNN
+F 3 "" H 9150 900 50 0000 C CNN
1 9150 900
- 0 -1 -1 0
+ 1 0 0 -1
$EndComp
$Comp
-L TI_BOOSTER_40_J1 J1
+L Ti_Booster_40_J1 J1
U 1 1 5080DB5C
P 9750 1350
F 0 "J1" H 9700 2000 60 0000 C CNN
F 1 "TI_BOOSTER_40_J1" H 9750 700 60 0000 C CNN
+F 2 "Connect:SIL-10" V 10200 1350 60 0000 C CNN
+F 3 "" H 9750 1350 60 0001 C CNN
1 9750 1350
1 0 0 -1
$EndComp
$Comp
-L TI_BOOSTER_40_J2 J2
+L Ti_Booster_40_J2 J2
U 1 1 5080DBF4
P 9750 2900
F 0 "J2" H 9700 3550 60 0000 C CNN
F 1 "TI_BOOSTER_40_J2" H 9750 2250 60 0000 C CNN
+F 2 "Connect:SIL-10" V 10200 2900 60 0000 C CNN
+F 3 "" H 9750 2900 60 0001 C CNN
1 9750 2900
1 0 0 -1
$EndComp
$Comp
-L TI_BOOSTER_40_J3 J3
+L Ti_Booster_40_J3 J3
U 1 1 5080DC03
P 9750 4450
F 0 "J3" H 9700 5100 60 0000 C CNN
F 1 "TI_BOOSTER_40_J3" H 9750 3800 60 0000 C CNN
+F 2 "Connect:SIL-10" V 10200 4450 60 0000 C CNN
+F 3 "" H 9750 4450 60 0001 C CNN
1 9750 4450
1 0 0 -1
$EndComp
$Comp
-L TI_BOOSTER_40_J4 J4
+L Ti_Booster_40_J4 J4
U 1 1 5080DC12
P 9750 6000
F 0 "J4" H 9700 6650 60 0000 C CNN
F 1 "TI_BOOSTER_40_J4" H 9750 5350 60 0000 C CNN
+F 2 "Connect:SIL-10" V 10200 6000 60 0000 C CNN
+F 3 "" H 9750 6000 60 0001 C CNN
1 9750 6000
1 0 0 -1
$EndComp
@@ -139,8 +156,10 @@ $Comp
L GND #PWR05
U 1 1 5080DC79
P 9150 4100
-F 0 "#PWR05" H 9150 4100 30 0001 C CNN
-F 1 "GND" H 9150 4030 30 0001 C CNN
+F 0 "#PWR05" H 9150 3850 50 0001 C CNN
+F 1 "GND" H 9150 3950 50 0000 C CNN
+F 2 "" H 9150 4100 50 0000 C CNN
+F 3 "" H 9150 4100 50 0000 C CNN
1 9150 4100
0 1 1 0
$EndComp
@@ -148,9 +167,11 @@ $Comp
L +5V #PWR06
U 1 1 5080DC8B
P 9150 4000
-F 0 "#PWR06" H 9150 4090 20 0001 C CNN
-F 1 "+5V" H 9150 4090 30 0000 C CNN
+F 0 "#PWR06" H 9150 3850 50 0001 C CNN
+F 1 "+5V" H 9150 4140 50 0000 C CNN
+F 2 "" H 9150 4000 50 0000 C CNN
+F 3 "" H 9150 4000 50 0000 C CNN
1 9150 4000
- 0 -1 -1 0
+ 1 0 0 -1
$EndComp
$EndSCHEMATC
diff --git a/template/ti-stellaris-boosterpack40/boosterpack40_min.kicad_pcb b/template/ti-stellaris-boosterpack40/boosterpack40_min.kicad_pcb
deleted file mode 100644
index 21b568c..0000000
--- a/template/ti-stellaris-boosterpack40/boosterpack40_min.kicad_pcb
+++ /dev/null
@@ -1,344 +0,0 @@
-(kicad_pcb (version 3) (host pcbnew "(2013-02-23 BZR 3971)-testing")
-
- (general
- (links 1)
- (no_connects 1)
- (area 172.984525 104.605002 242.305477 149.137511)
- (thickness 1.6)
- (drawings 7)
- (tracks 0)
- (zones 0)
- (modules 4)
- (nets 4)
- )
-
- (page A3)
- (layers
- (15 F.Cu signal)
- (0 B.Cu signal)
- (16 B.Adhes user)
- (17 F.Adhes user)
- (18 B.Paste user)
- (19 F.Paste user)
- (20 B.SilkS user)
- (21 F.SilkS user)
- (22 B.Mask user)
- (23 F.Mask user)
- (24 Dwgs.User user)
- (25 Cmts.User user)
- (26 Eco1.User user)
- (27 Eco2.User user)
- (28 Edge.Cuts user)
- )
-
- (setup
- (last_trace_width 0.254)
- (trace_clearance 0.254)
- (zone_clearance 0.508)
- (zone_45_only no)
- (trace_min 0.254)
- (segment_width 0.20066)
- (edge_width 0.14986)
- (via_size 0.889)
- (via_drill 0.635)
- (via_min_size 0.889)
- (via_min_drill 0.508)
- (uvia_size 0.508)
- (uvia_drill 0.127)
- (uvias_allowed no)
- (uvia_min_size 0.508)
- (uvia_min_drill 0.127)
- (pcb_text_width 0.3)
- (pcb_text_size 1 1)
- (mod_edge_width 0.14986)
- (mod_text_size 1 1)
- (mod_text_width 0.15)
- (pad_size 1 1)
- (pad_drill 0.6)
- (pad_to_mask_clearance 0)
- (aux_axis_origin 0 0)
- (visible_elements 7FFFFFFF)
- (pcbplotparams
- (layerselection 3178497)
- (usegerberextensions true)
- (excludeedgelayer true)
- (linewidth 152400)
- (plotframeref false)
- (viasonmask false)
- (mode 1)
- (useauxorigin false)
- (hpglpennumber 1)
- (hpglpenspeed 20)
- (hpglpendiameter 15)
- (hpglpenoverlay 2)
- (psnegative false)
- (psa4output false)
- (plotreference true)
- (plotvalue true)
- (plotothertext true)
- (plotinvisibletext false)
- (padsonsilk false)
- (subtractmaskfromsilk false)
- (outputformat 1)
- (mirror false)
- (drillshape 1)
- (scaleselection 1)
- (outputdirectory ""))
- )
-
- (net 0 "")
- (net 1 +5V)
- (net 2 GND)
- (net 3 VCC)
-
- (net_class Default "This is the default net class."
- (clearance 0.254)
- (trace_width 0.254)
- (via_dia 0.889)
- (via_drill 0.635)
- (uvia_dia 0.508)
- (uvia_drill 0.127)
- (add_net "")
- (add_net +5V)
- (add_net GND)
- (add_net VCC)
- )
-
- (module SIL-10 (layer F.Cu) (tedit 5080DEE6) (tstamp 5080DE37)
- (at 231.14 133.35 270)
- (descr "Connecteur 10 pins")
- (tags "CONN DEV")
- (path /5080DBF4)
- (fp_text reference J2 (at -13.97 0 360) (layer F.SilkS)
- (effects (font (size 1.72974 1.08712) (thickness 0.3048)))
- )
- (fp_text value TI_BOOSTER_40_J2 (at 6.35 -2.54 270) (layer F.SilkS)
- (effects (font (size 1.524 1.016) (thickness 0.3048)))
- )
- (fp_line (start -12.7 1.27) (end -12.7 -1.27) (layer F.SilkS) (width 0.3048))
- (fp_line (start -12.7 -1.27) (end 12.7 -1.27) (layer F.SilkS) (width 0.3048))
- (fp_line (start 12.7 -1.27) (end 12.7 1.27) (layer F.SilkS) (width 0.3048))
- (fp_line (start 12.7 1.27) (end -12.7 1.27) (layer F.SilkS) (width 0.3048))
- (fp_line (start -10.16 1.27) (end -10.16 -1.27) (layer F.SilkS) (width 0.3048))
- (pad 1 thru_hole rect (at -11.43 0 270) (size 1.397 1.397) (drill 0.8128)
- (layers *.Cu *.Mask F.SilkS)
- (net 2 GND)
- )
- (pad 2 thru_hole circle (at -8.89 0 270) (size 1.397 1.397) (drill 0.8128)
- (layers *.Cu *.Mask F.SilkS)
- )
- (pad 3 thru_hole circle (at -6.35 0 270) (size 1.397 1.397) (drill 0.8128)
- (layers *.Cu *.Mask F.SilkS)
- )
- (pad 4 thru_hole circle (at -3.81 0 270) (size 1.397 1.397) (drill 0.8128)
- (layers *.Cu *.Mask F.SilkS)
- )
- (pad 5 thru_hole circle (at -1.27 0 270) (size 1.397 1.397) (drill 0.8128)
- (layers *.Cu *.Mask F.SilkS)
- )
- (pad 6 thru_hole circle (at 1.27 0 270) (size 1.397 1.397) (drill 0.8128)
- (layers *.Cu *.Mask F.SilkS)
- )
- (pad 7 thru_hole circle (at 3.81 0 270) (size 1.397 1.397) (drill 0.8128)
- (layers *.Cu *.Mask F.SilkS)
- )
- (pad 8 thru_hole circle (at 6.35 0 270) (size 1.397 1.397) (drill 0.8128)
- (layers *.Cu *.Mask F.SilkS)
- )
- (pad 9 thru_hole circle (at 8.89 0 270) (size 1.397 1.397) (drill 0.8128)
- (layers *.Cu *.Mask F.SilkS)
- )
- (pad 10 thru_hole circle (at 11.43 0 270) (size 1.397 1.397) (drill 0.8128)
- (layers *.Cu *.Mask F.SilkS)
- )
- )
-
- (module SIL-10 (layer F.Cu) (tedit 5080DEED) (tstamp 5080DE4A)
- (at 228.6 133.35 270)
- (descr "Connecteur 10 pins")
- (tags "CONN DEV")
- (path /5080DC12)
- (fp_text reference J4 (at -13.97 0 360) (layer F.SilkS)
- (effects (font (size 1.72974 1.08712) (thickness 0.3048)))
- )
- (fp_text value TI_BOOSTER_40_J4 (at 6.35 -2.54 270) (layer F.SilkS)
- (effects (font (size 1.524 1.016) (thickness 0.3048)))
- )
- (fp_line (start -12.7 1.27) (end -12.7 -1.27) (layer F.SilkS) (width 0.3048))
- (fp_line (start -12.7 -1.27) (end 12.7 -1.27) (layer F.SilkS) (width 0.3048))
- (fp_line (start 12.7 -1.27) (end 12.7 1.27) (layer F.SilkS) (width 0.3048))
- (fp_line (start 12.7 1.27) (end -12.7 1.27) (layer F.SilkS) (width 0.3048))
- (fp_line (start -10.16 1.27) (end -10.16 -1.27) (layer F.SilkS) (width 0.3048))
- (pad 1 thru_hole rect (at -11.43 0 270) (size 1.397 1.397) (drill 0.8128)
- (layers *.Cu *.Mask F.SilkS)
- )
- (pad 2 thru_hole circle (at -8.89 0 270) (size 1.397 1.397) (drill 0.8128)
- (layers *.Cu *.Mask F.SilkS)
- )
- (pad 3 thru_hole circle (at -6.35 0 270) (size 1.397 1.397) (drill 0.8128)
- (layers *.Cu *.Mask F.SilkS)
- )
- (pad 4 thru_hole circle (at -3.81 0 270) (size 1.397 1.397) (drill 0.8128)
- (layers *.Cu *.Mask F.SilkS)
- )
- (pad 5 thru_hole circle (at -1.27 0 270) (size 1.397 1.397) (drill 0.8128)
- (layers *.Cu *.Mask F.SilkS)
- )
- (pad 6 thru_hole circle (at 1.27 0 270) (size 1.397 1.397) (drill 0.8128)
- (layers *.Cu *.Mask F.SilkS)
- )
- (pad 7 thru_hole circle (at 3.81 0 270) (size 1.397 1.397) (drill 0.8128)
- (layers *.Cu *.Mask F.SilkS)
- )
- (pad 8 thru_hole circle (at 6.35 0 270) (size 1.397 1.397) (drill 0.8128)
- (layers *.Cu *.Mask F.SilkS)
- )
- (pad 9 thru_hole circle (at 8.89 0 270) (size 1.397 1.397) (drill 0.8128)
- (layers *.Cu *.Mask F.SilkS)
- )
- (pad 10 thru_hole circle (at 11.43 0 270) (size 1.397 1.397) (drill 0.8128)
- (layers *.Cu *.Mask F.SilkS)
- )
- )
-
- (module SIL-10 (layer F.Cu) (tedit 5080DEE0) (tstamp 5080AB71)
- (at 187.96 133.35 270)
- (descr "Connecteur 10 pins")
- (tags "CONN DEV")
- (path /5080DC03)
- (fp_text reference J3 (at -13.97 0 360) (layer F.SilkS)
- (effects (font (size 1.72974 1.08712) (thickness 0.3048)))
- )
- (fp_text value TI_BOOSTER_40_J3 (at 6.35 -2.54 270) (layer F.SilkS)
- (effects (font (size 1.524 1.016) (thickness 0.3048)))
- )
- (fp_line (start -12.7 1.27) (end -12.7 -1.27) (layer F.SilkS) (width 0.3048))
- (fp_line (start -12.7 -1.27) (end 12.7 -1.27) (layer F.SilkS) (width 0.3048))
- (fp_line (start 12.7 -1.27) (end 12.7 1.27) (layer F.SilkS) (width 0.3048))
- (fp_line (start 12.7 1.27) (end -12.7 1.27) (layer F.SilkS) (width 0.3048))
- (fp_line (start -10.16 1.27) (end -10.16 -1.27) (layer F.SilkS) (width 0.3048))
- (pad 1 thru_hole rect (at -11.43 0 270) (size 1.397 1.397) (drill 0.8128)
- (layers *.Cu *.Mask F.SilkS)
- (net 1 +5V)
- )
- (pad 2 thru_hole circle (at -8.89 0 270) (size 1.397 1.397) (drill 0.8128)
- (layers *.Cu *.Mask F.SilkS)
- (net 2 GND)
- )
- (pad 3 thru_hole circle (at -6.35 0 270) (size 1.397 1.397) (drill 0.8128)
- (layers *.Cu *.Mask F.SilkS)
- )
- (pad 4 thru_hole circle (at -3.81 0 270) (size 1.397 1.397) (drill 0.8128)
- (layers *.Cu *.Mask F.SilkS)
- )
- (pad 5 thru_hole circle (at -1.27 0 270) (size 1.397 1.397) (drill 0.8128)
- (layers *.Cu *.Mask F.SilkS)
- )
- (pad 6 thru_hole circle (at 1.27 0 270) (size 1.397 1.397) (drill 0.8128)
- (layers *.Cu *.Mask F.SilkS)
- )
- (pad 7 thru_hole circle (at 3.81 0 270) (size 1.397 1.397) (drill 0.8128)
- (layers *.Cu *.Mask F.SilkS)
- )
- (pad 8 thru_hole circle (at 6.35 0 270) (size 1.397 1.397) (drill 0.8128)
- (layers *.Cu *.Mask F.SilkS)
- )
- (pad 9 thru_hole circle (at 8.89 0 270) (size 1.397 1.397) (drill 0.8128)
- (layers *.Cu *.Mask F.SilkS)
- )
- (pad 10 thru_hole circle (at 11.43 0 270) (size 1.397 1.397) (drill 0.8128)
- (layers *.Cu *.Mask F.SilkS)
- )
- )
-
- (module SIL-10 (layer F.Cu) (tedit 5080DEDC) (tstamp 5080AB8D)
- (at 185.42 133.35 270)
- (descr "Connecteur 10 pins")
- (tags "CONN DEV")
- (path /5080DB5C)
- (fp_text reference J1 (at -13.97 0 360) (layer F.SilkS)
- (effects (font (size 1.72974 1.08712) (thickness 0.3048)))
- )
- (fp_text value TI_BOOSTER_40_J1 (at 6.35 -2.54 270) (layer F.SilkS)
- (effects (font (size 1.524 1.016) (thickness 0.3048)))
- )
- (fp_line (start -12.7 1.27) (end -12.7 -1.27) (layer F.SilkS) (width 0.3048))
- (fp_line (start -12.7 -1.27) (end 12.7 -1.27) (layer F.SilkS) (width 0.3048))
- (fp_line (start 12.7 -1.27) (end 12.7 1.27) (layer F.SilkS) (width 0.3048))
- (fp_line (start 12.7 1.27) (end -12.7 1.27) (layer F.SilkS) (width 0.3048))
- (fp_line (start -10.16 1.27) (end -10.16 -1.27) (layer F.SilkS) (width 0.3048))
- (pad 1 thru_hole rect (at -11.43 0 270) (size 1.397 1.397) (drill 0.8128)
- (layers *.Cu *.Mask F.SilkS)
- (net 3 VCC)
- )
- (pad 2 thru_hole circle (at -8.89 0 270) (size 1.397 1.397) (drill 0.8128)
- (layers *.Cu *.Mask F.SilkS)
- )
- (pad 3 thru_hole circle (at -6.35 0 270) (size 1.397 1.397) (drill 0.8128)
- (layers *.Cu *.Mask F.SilkS)
- )
- (pad 4 thru_hole circle (at -3.81 0 270) (size 1.397 1.397) (drill 0.8128)
- (layers *.Cu *.Mask F.SilkS)
- )
- (pad 5 thru_hole circle (at -1.27 0 270) (size 1.397 1.397) (drill 0.8128)
- (layers *.Cu *.Mask F.SilkS)
- )
- (pad 6 thru_hole circle (at 1.27 0 270) (size 1.397 1.397) (drill 0.8128)
- (layers *.Cu *.Mask F.SilkS)
- )
- (pad 7 thru_hole circle (at 3.81 0 270) (size 1.397 1.397) (drill 0.8128)
- (layers *.Cu *.Mask F.SilkS)
- )
- (pad 8 thru_hole circle (at 6.35 0 270) (size 1.397 1.397) (drill 0.8128)
- (layers *.Cu *.Mask F.SilkS)
- )
- (pad 9 thru_hole circle (at 8.89 0 270) (size 1.397 1.397) (drill 0.8128)
- (layers *.Cu *.Mask F.SilkS)
- )
- (pad 10 thru_hole circle (at 11.43 0 270) (size 1.397 1.397) (drill 0.8128)
- (layers *.Cu *.Mask F.SilkS)
- )
- )
-
- (dimension 34.29 (width 0.25) (layer Dwgs.User)
- (gr_text "1.3500 in" (at 176.800001 130.175 270) (layer Dwgs.User)
- (effects (font (size 1 1) (thickness 0.25)))
- )
- (feature1 (pts (xy 182.88 147.32) (xy 175.800001 147.32)))
- (feature2 (pts (xy 182.88 113.03) (xy 175.800001 113.03)))
- (crossbar (pts (xy 177.800001 113.03) (xy 177.800001 147.32)))
- (arrow1a (pts (xy 177.800001 147.32) (xy 177.213581 146.193497)))
- (arrow1b (pts (xy 177.800001 147.32) (xy 178.386421 146.193497)))
- (arrow2a (pts (xy 177.800001 113.03) (xy 177.213581 114.156503)))
- (arrow2b (pts (xy 177.800001 113.03) (xy 178.386421 114.156503)))
- )
- (dimension 8.89 (width 0.25) (layer Dwgs.User)
- (gr_text "0.3500 in" (at 238.49 117.475 90) (layer Dwgs.User)
- (effects (font (size 1 1) (thickness 0.25)))
- )
- (feature1 (pts (xy 231.14 113.03) (xy 239.49 113.03)))
- (feature2 (pts (xy 231.14 121.92) (xy 239.49 121.92)))
- (crossbar (pts (xy 237.49 121.92) (xy 237.49 113.03)))
- (arrow1a (pts (xy 237.49 113.03) (xy 238.07642 114.156503)))
- (arrow1b (pts (xy 237.49 113.03) (xy 236.90358 114.156503)))
- (arrow2a (pts (xy 237.49 121.92) (xy 238.07642 120.793497)))
- (arrow2b (pts (xy 237.49 121.92) (xy 236.90358 120.793497)))
- )
- (gr_line (start 233.68 147.32) (end 182.88 147.32) (angle 90) (layer Edge.Cuts) (width 0.15))
- (dimension 50.8 (width 0.25) (layer Dwgs.User)
- (gr_text "2.0000 in" (at 208.28 105.680002) (layer Dwgs.User)
- (effects (font (size 1 1) (thickness 0.25)))
- )
- (feature1 (pts (xy 233.68 113.03) (xy 233.68 104.680002)))
- (feature2 (pts (xy 182.88 113.03) (xy 182.88 104.680002)))
- (crossbar (pts (xy 182.88 106.680002) (xy 233.68 106.680002)))
- (arrow1a (pts (xy 233.68 106.680002) (xy 232.553497 107.266422)))
- (arrow1b (pts (xy 233.68 106.680002) (xy 232.553497 106.093582)))
- (arrow2a (pts (xy 182.88 106.680002) (xy 184.006503 107.266422)))
- (arrow2b (pts (xy 182.88 106.680002) (xy 184.006503 106.093582)))
- )
- (gr_line (start 182.88 147.32) (end 182.88 113.03) (angle 90) (layer Edge.Cuts) (width 0.14986))
- (gr_line (start 233.68 113.03) (end 233.68 147.32) (angle 90) (layer Edge.Cuts) (width 0.14986))
- (gr_line (start 182.88 113.03) (end 233.68 113.03) (angle 90) (layer Edge.Cuts) (width 0.15))
-
-)
diff --git a/template/ti-stellaris-boosterpack40_min/boosterpack40_min-cache.lib b/template/ti-stellaris-boosterpack40_min/boosterpack40_min-cache.lib
index 3c9da8d..c16a1ef 100644
--- a/template/ti-stellaris-boosterpack40_min/boosterpack40_min-cache.lib
+++ b/template/ti-stellaris-boosterpack40_min/boosterpack40_min-cache.lib
@@ -1,26 +1,31 @@
-EESchema-LIBRARY Version 2.3 Date: Thu 18 Oct 2012 10:11:13 PM PDT
+EESchema-LIBRARY Version 2.3
#encoding utf-8
#
# +5V
#
-DEF +5V #PWR 0 40 Y Y 1 F P
-F0 "#PWR" 0 90 20 H I C CNN
-F1 "+5V" 0 90 30 H V C CNN
+DEF +5V #PWR 0 0 Y Y 1 F P
+F0 "#PWR" 0 -150 50 H I C CNN
+F1 "+5V" 0 140 50 H V C CNN
+F2 "" 0 0 60 H V C CNN
+F3 "" 0 0 60 H V C CNN
DRAW
-X +5V 1 0 0 0 U 20 20 0 0 W N
-C 0 50 20 0 1 0 N
-P 4 0 1 0 0 0 0 30 0 30 0 30 N
+P 2 0 1 0 -30 50 0 100 N
+P 2 0 1 0 0 0 0 100 N
+P 2 0 1 0 0 100 30 50 N
+X +5V 1 0 0 0 U 50 50 1 1 W N
ENDDRAW
ENDDEF
#
# GND
#
-DEF ~GND #PWR 0 0 Y Y 1 F P
-F0 "#PWR" 0 0 30 H I C CNN
-F1 "GND" 0 -70 30 H I C CNN
+DEF GND #PWR 0 0 Y Y 1 F P
+F0 "#PWR" 0 -150 50 H I C CNN
+F1 "GND" 0 -123 30 H V C CNN
+F2 "" 0 0 60 H V C CNN
+F3 "" 0 0 60 H V C CNN
DRAW
-P 4 0 1 0 -50 0 0 -50 50 0 -50 0 N
-X GND 1 0 0 0 U 30 30 1 1 W N
+P 6 0 1 0 0 0 0 -50 50 -50 0 -100 -50 -50 0 -50 N
+X GND 1 0 0 0 D 20 30 1 1 W N
ENDDRAW
ENDDEF
#
@@ -29,6 +34,8 @@ ENDDEF
DEF Ti_Booster_40_J1 J 0 40 Y Y 1 F N
F0 "J" -50 650 60 H V C CNN
F1 "Ti_Booster_40_J1" 0 -650 60 H V C CNN
+F2 "" 0 0 60 H I C CNN
+F3 "" 0 0 60 H I C CNN
DRAW
S -300 550 400 -550 0 1 0 N
X 1.01/Vcc 1 -600 450 300 R 50 50 1 1 W
@@ -49,6 +56,8 @@ ENDDEF
DEF Ti_Booster_40_J2 J 0 40 Y Y 1 F N
F0 "J" -50 650 60 H V C CNN
F1 "Ti_Booster_40_J2" 0 -650 60 H V C CNN
+F2 "" 0 0 60 H I C CNN
+F3 "" 0 0 60 H I C CNN
DRAW
S -300 550 400 -550 0 1 0 N
X 2.01/GND 1 -600 450 300 R 50 50 1 1 W
@@ -69,6 +78,8 @@ ENDDEF
DEF Ti_Booster_40_J3 J 0 40 Y Y 1 F N
F0 "J" -50 650 60 H V C CNN
F1 "Ti_Booster_40_J3" 0 -650 60 H V C CNN
+F2 "" 0 0 60 H I C CNN
+F3 "" 0 0 60 H I C CNN
DRAW
S -300 550 400 -550 0 1 0 N
X 3.01/+5V 1 -600 450 300 R 50 50 1 1 W
@@ -89,6 +100,8 @@ ENDDEF
DEF Ti_Booster_40_J4 J 0 40 Y Y 1 F N
F0 "J" -50 650 60 H V C CNN
F1 "Ti_Booster_40_J4" 0 -650 60 H V C CNN
+F2 "" 0 0 60 H I C CNN
+F3 "" 0 0 60 H I C CNN
DRAW
S -300 550 400 -550 0 1 0 N
X 4.01/PF2 1 -600 450 300 R 50 50 1 1 W
@@ -107,12 +120,14 @@ ENDDEF
# VCC
#
DEF VCC #PWR 0 0 Y Y 1 F P
-F0 "#PWR" 0 100 30 H I C CNN
-F1 "VCC" 0 100 30 H V C CNN
+F0 "#PWR" 0 -50 40 H I C CNN
+F1 "VCC" 0 133 50 H V C CNN
+F2 "" 0 0 60 H V C CNN
+F3 "" 0 0 60 H V C CNN
DRAW
-X VCC 1 0 0 0 U 20 20 0 0 W N
-C 0 50 20 0 1 0 N
-P 3 0 1 0 0 0 0 30 0 30 N
+C 0 75 25 0 1 0 N
+P 2 0 1 0 0 0 0 50 N
+X VCC 1 0 0 0 U 20 30 1 1 W N
ENDDRAW
ENDDEF
#
diff --git a/template/ti-stellaris-boosterpack40_min/boosterpack40_min.cmp b/template/ti-stellaris-boosterpack40_min/boosterpack40_min.cmp
deleted file mode 100644
index eab4a19..0000000
--- a/template/ti-stellaris-boosterpack40_min/boosterpack40_min.cmp
+++ /dev/null
@@ -1,38 +0,0 @@
-Cmp-Mod V01 Created by CvPcb (2011-nov-30)-testing date = Thu 18 Oct 2012 09:58:43 PM PDT
-
-BeginCmp
-TimeStamp = /5080DB5C;
-Reference = J1;
-ValeurCmp = TI_BOOSTER_40_J1;
-IdModule = SIL-10;
-EndCmp
-
-BeginCmp
-TimeStamp = /5080DBF4;
-Reference = J2;
-ValeurCmp = TI_BOOSTER_40_J2;
-IdModule = SIL-10;
-EndCmp
-
-BeginCmp
-TimeStamp = /5080DC03;
-Reference = J3;
-ValeurCmp = TI_BOOSTER_40_J3;
-IdModule = SIL-10;
-EndCmp
-
-BeginCmp
-TimeStamp = /5080DC12;
-Reference = J4;
-ValeurCmp = TI_BOOSTER_40_J4;
-IdModule = SIL-10;
-EndCmp
-
-BeginCmp
-TimeStamp = /5080A33C;
-Reference = J5;
-ValeurCmp = CONN_3;
-IdModule = SIL-3;
-EndCmp
-
-EndListe
diff --git a/template/ti-stellaris-boosterpack40_min/boosterpack40_min.kicad_pcb b/template/ti-stellaris-boosterpack40_min/boosterpack40_min.kicad_pcb
index 21b568c..9cedfba 100644
--- a/template/ti-stellaris-boosterpack40_min/boosterpack40_min.kicad_pcb
+++ b/template/ti-stellaris-boosterpack40_min/boosterpack40_min.kicad_pcb
@@ -1,34 +1,34 @@
-(kicad_pcb (version 3) (host pcbnew "(2013-02-23 BZR 3971)-testing")
+(kicad_pcb (version 20160815) (host pcbnew "(2016-12-12 revision b1e37ae)-master")
(general
(links 1)
(no_connects 1)
- (area 172.984525 104.605002 242.305477 149.137511)
+ (area 182.804999 112.954999 233.755001 147.395001)
(thickness 1.6)
(drawings 7)
(tracks 0)
(zones 0)
(modules 4)
- (nets 4)
+ (nets 2)
)
(page A3)
(layers
- (15 F.Cu signal)
- (0 B.Cu signal)
- (16 B.Adhes user)
- (17 F.Adhes user)
- (18 B.Paste user)
- (19 F.Paste user)
- (20 B.SilkS user)
- (21 F.SilkS user)
- (22 B.Mask user)
- (23 F.Mask user)
- (24 Dwgs.User user)
- (25 Cmts.User user)
- (26 Eco1.User user)
- (27 Eco2.User user)
- (28 Edge.Cuts user)
+ (0 F.Cu signal)
+ (31 B.Cu signal)
+ (32 B.Adhes user)
+ (33 F.Adhes user)
+ (34 B.Paste user)
+ (35 F.Paste user)
+ (36 B.SilkS user)
+ (37 F.SilkS user)
+ (38 B.Mask user)
+ (39 F.Mask user)
+ (40 Dwgs.User user)
+ (41 Cmts.User user)
+ (42 Eco1.User user)
+ (43 Eco2.User user)
+ (44 Edge.Cuts user)
)
(setup
@@ -59,10 +59,10 @@
(aux_axis_origin 0 0)
(visible_elements 7FFFFFFF)
(pcbplotparams
- (layerselection 3178497)
+ (layerselection 0x00030_ffffffff)
(usegerberextensions true)
(excludeedgelayer true)
- (linewidth 152400)
+ (linewidth 0.150000)
(plotframeref false)
(viasonmask false)
(mode 1)
@@ -70,12 +70,10 @@
(hpglpennumber 1)
(hpglpenspeed 20)
(hpglpendiameter 15)
- (hpglpenoverlay 2)
(psnegative false)
(psa4output false)
(plotreference true)
(plotvalue true)
- (plotothertext true)
(plotinvisibletext false)
(padsonsilk false)
(subtractmaskfromsilk false)
@@ -87,9 +85,7 @@
)
(net 0 "")
- (net 1 +5V)
- (net 2 GND)
- (net 3 VCC)
+ (net 1 GND)
(net_class Default "This is the default net class."
(clearance 0.254)
@@ -98,21 +94,18 @@
(via_drill 0.635)
(uvia_dia 0.508)
(uvia_drill 0.127)
- (add_net "")
- (add_net +5V)
(add_net GND)
- (add_net VCC)
)
- (module SIL-10 (layer F.Cu) (tedit 5080DEE6) (tstamp 5080DE37)
- (at 231.14 133.35 270)
+ (module Connect:SIL-10 (layer F.Cu) (tedit 0) (tstamp 584FAB93)
+ (at 185.42 133.35 270)
(descr "Connecteur 10 pins")
(tags "CONN DEV")
- (path /5080DBF4)
- (fp_text reference J2 (at -13.97 0 360) (layer F.SilkS)
+ (path /5080DB5C)
+ (fp_text reference J1 (at -6.35 -2.54 270) (layer F.SilkS)
(effects (font (size 1.72974 1.08712) (thickness 0.3048)))
)
- (fp_text value TI_BOOSTER_40_J2 (at 6.35 -2.54 270) (layer F.SilkS)
+ (fp_text value TI_BOOSTER_40_J1 (at 6.35 -2.54 270) (layer F.SilkS)
(effects (font (size 1.524 1.016) (thickness 0.3048)))
)
(fp_line (start -12.7 1.27) (end -12.7 -1.27) (layer F.SilkS) (width 0.3048))
@@ -120,93 +113,53 @@
(fp_line (start 12.7 -1.27) (end 12.7 1.27) (layer F.SilkS) (width 0.3048))
(fp_line (start 12.7 1.27) (end -12.7 1.27) (layer F.SilkS) (width 0.3048))
(fp_line (start -10.16 1.27) (end -10.16 -1.27) (layer F.SilkS) (width 0.3048))
- (pad 1 thru_hole rect (at -11.43 0 270) (size 1.397 1.397) (drill 0.8128)
- (layers *.Cu *.Mask F.SilkS)
- (net 2 GND)
- )
- (pad 2 thru_hole circle (at -8.89 0 270) (size 1.397 1.397) (drill 0.8128)
- (layers *.Cu *.Mask F.SilkS)
- )
- (pad 3 thru_hole circle (at -6.35 0 270) (size 1.397 1.397) (drill 0.8128)
- (layers *.Cu *.Mask F.SilkS)
- )
- (pad 4 thru_hole circle (at -3.81 0 270) (size 1.397 1.397) (drill 0.8128)
- (layers *.Cu *.Mask F.SilkS)
- )
- (pad 5 thru_hole circle (at -1.27 0 270) (size 1.397 1.397) (drill 0.8128)
- (layers *.Cu *.Mask F.SilkS)
- )
- (pad 6 thru_hole circle (at 1.27 0 270) (size 1.397 1.397) (drill 0.8128)
- (layers *.Cu *.Mask F.SilkS)
- )
- (pad 7 thru_hole circle (at 3.81 0 270) (size 1.397 1.397) (drill 0.8128)
- (layers *.Cu *.Mask F.SilkS)
- )
- (pad 8 thru_hole circle (at 6.35 0 270) (size 1.397 1.397) (drill 0.8128)
- (layers *.Cu *.Mask F.SilkS)
- )
- (pad 9 thru_hole circle (at 8.89 0 270) (size 1.397 1.397) (drill 0.8128)
- (layers *.Cu *.Mask F.SilkS)
- )
- (pad 10 thru_hole circle (at 11.43 0 270) (size 1.397 1.397) (drill 0.8128)
- (layers *.Cu *.Mask F.SilkS)
- )
+ (pad 1 thru_hole rect (at -11.43 0 270) (size 1.397 1.397) (drill 0.8128) (layers *.Cu *.Mask F.SilkS))
+ (pad 2 thru_hole circle (at -8.89 0 270) (size 1.397 1.397) (drill 0.8128) (layers *.Cu *.Mask F.SilkS))
+ (pad 3 thru_hole circle (at -6.35 0 270) (size 1.397 1.397) (drill 0.8128) (layers *.Cu *.Mask F.SilkS))
+ (pad 4 thru_hole circle (at -3.81 0 270) (size 1.397 1.397) (drill 0.8128) (layers *.Cu *.Mask F.SilkS))
+ (pad 5 thru_hole circle (at -1.27 0 270) (size 1.397 1.397) (drill 0.8128) (layers *.Cu *.Mask F.SilkS))
+ (pad 6 thru_hole circle (at 1.27 0 270) (size 1.397 1.397) (drill 0.8128) (layers *.Cu *.Mask F.SilkS))
+ (pad 7 thru_hole circle (at 3.81 0 270) (size 1.397 1.397) (drill 0.8128) (layers *.Cu *.Mask F.SilkS))
+ (pad 8 thru_hole circle (at 6.35 0 270) (size 1.397 1.397) (drill 0.8128) (layers *.Cu *.Mask F.SilkS))
+ (pad 9 thru_hole circle (at 8.89 0 270) (size 1.397 1.397) (drill 0.8128) (layers *.Cu *.Mask F.SilkS))
+ (pad 10 thru_hole circle (at 11.43 0 270) (size 1.397 1.397) (drill 0.8128) (layers *.Cu *.Mask F.SilkS))
)
- (module SIL-10 (layer F.Cu) (tedit 5080DEED) (tstamp 5080DE4A)
- (at 228.6 133.35 270)
+ (module Connect:SIL-10 (layer F.Cu) (tedit 0) (tstamp 584FABA0)
+ (at 231.14 133.35 270)
(descr "Connecteur 10 pins")
(tags "CONN DEV")
- (path /5080DC12)
- (fp_text reference J4 (at -13.97 0 360) (layer F.SilkS)
+ (path /5080DBF4)
+ (fp_text reference J2 (at -6.35 -2.54 270) (layer F.SilkS)
(effects (font (size 1.72974 1.08712) (thickness 0.3048)))
)
- (fp_text value TI_BOOSTER_40_J4 (at 6.35 -2.54 270) (layer F.SilkS)
+ (fp_text value TI_BOOSTER_40_J2 (at 6.35 -2.54 270) (layer F.SilkS)
(effects (font (size 1.524 1.016) (thickness 0.3048)))
)
- (fp_line (start -12.7 1.27) (end -12.7 -1.27) (layer F.SilkS) (width 0.3048))
- (fp_line (start -12.7 -1.27) (end 12.7 -1.27) (layer F.SilkS) (width 0.3048))
- (fp_line (start 12.7 -1.27) (end 12.7 1.27) (layer F.SilkS) (width 0.3048))
- (fp_line (start 12.7 1.27) (end -12.7 1.27) (layer F.SilkS) (width 0.3048))
(fp_line (start -10.16 1.27) (end -10.16 -1.27) (layer F.SilkS) (width 0.3048))
- (pad 1 thru_hole rect (at -11.43 0 270) (size 1.397 1.397) (drill 0.8128)
- (layers *.Cu *.Mask F.SilkS)
- )
- (pad 2 thru_hole circle (at -8.89 0 270) (size 1.397 1.397) (drill 0.8128)
- (layers *.Cu *.Mask F.SilkS)
- )
- (pad 3 thru_hole circle (at -6.35 0 270) (size 1.397 1.397) (drill 0.8128)
- (layers *.Cu *.Mask F.SilkS)
- )
- (pad 4 thru_hole circle (at -3.81 0 270) (size 1.397 1.397) (drill 0.8128)
- (layers *.Cu *.Mask F.SilkS)
- )
- (pad 5 thru_hole circle (at -1.27 0 270) (size 1.397 1.397) (drill 0.8128)
- (layers *.Cu *.Mask F.SilkS)
- )
- (pad 6 thru_hole circle (at 1.27 0 270) (size 1.397 1.397) (drill 0.8128)
- (layers *.Cu *.Mask F.SilkS)
- )
- (pad 7 thru_hole circle (at 3.81 0 270) (size 1.397 1.397) (drill 0.8128)
- (layers *.Cu *.Mask F.SilkS)
- )
- (pad 8 thru_hole circle (at 6.35 0 270) (size 1.397 1.397) (drill 0.8128)
- (layers *.Cu *.Mask F.SilkS)
- )
- (pad 9 thru_hole circle (at 8.89 0 270) (size 1.397 1.397) (drill 0.8128)
- (layers *.Cu *.Mask F.SilkS)
- )
- (pad 10 thru_hole circle (at 11.43 0 270) (size 1.397 1.397) (drill 0.8128)
- (layers *.Cu *.Mask F.SilkS)
- )
+ (fp_line (start 12.7 1.27) (end -12.7 1.27) (layer F.SilkS) (width 0.3048))
+ (fp_line (start 12.7 -1.27) (end 12.7 1.27) (layer F.SilkS) (width 0.3048))
+ (fp_line (start -12.7 -1.27) (end 12.7 -1.27) (layer F.SilkS) (width 0.3048))
+ (fp_line (start -12.7 1.27) (end -12.7 -1.27) (layer F.SilkS) (width 0.3048))
+ (pad 10 thru_hole circle (at 11.43 0 270) (size 1.397 1.397) (drill 0.8128) (layers *.Cu *.Mask F.SilkS))
+ (pad 9 thru_hole circle (at 8.89 0 270) (size 1.397 1.397) (drill 0.8128) (layers *.Cu *.Mask F.SilkS))
+ (pad 8 thru_hole circle (at 6.35 0 270) (size 1.397 1.397) (drill 0.8128) (layers *.Cu *.Mask F.SilkS))
+ (pad 7 thru_hole circle (at 3.81 0 270) (size 1.397 1.397) (drill 0.8128) (layers *.Cu *.Mask F.SilkS))
+ (pad 6 thru_hole circle (at 1.27 0 270) (size 1.397 1.397) (drill 0.8128) (layers *.Cu *.Mask F.SilkS))
+ (pad 5 thru_hole circle (at -1.27 0 270) (size 1.397 1.397) (drill 0.8128) (layers *.Cu *.Mask F.SilkS))
+ (pad 4 thru_hole circle (at -3.81 0 270) (size 1.397 1.397) (drill 0.8128) (layers *.Cu *.Mask F.SilkS))
+ (pad 3 thru_hole circle (at -6.35 0 270) (size 1.397 1.397) (drill 0.8128) (layers *.Cu *.Mask F.SilkS))
+ (pad 2 thru_hole circle (at -8.89 0 270) (size 1.397 1.397) (drill 0.8128) (layers *.Cu *.Mask F.SilkS))
+ (pad 1 thru_hole rect (at -11.43 0 270) (size 1.397 1.397) (drill 0.8128) (layers *.Cu *.Mask F.SilkS)
+ (net 1 GND))
)
- (module SIL-10 (layer F.Cu) (tedit 5080DEE0) (tstamp 5080AB71)
+ (module Connect:SIL-10 (layer F.Cu) (tedit 0) (tstamp 584FABAD)
(at 187.96 133.35 270)
(descr "Connecteur 10 pins")
(tags "CONN DEV")
(path /5080DC03)
- (fp_text reference J3 (at -13.97 0 360) (layer F.SilkS)
+ (fp_text reference J3 (at -6.35 -2.54 270) (layer F.SilkS)
(effects (font (size 1.72974 1.08712) (thickness 0.3048)))
)
(fp_text value TI_BOOSTER_40_J3 (at 6.35 -2.54 270) (layer F.SilkS)
@@ -217,91 +170,49 @@
(fp_line (start 12.7 -1.27) (end 12.7 1.27) (layer F.SilkS) (width 0.3048))
(fp_line (start 12.7 1.27) (end -12.7 1.27) (layer F.SilkS) (width 0.3048))
(fp_line (start -10.16 1.27) (end -10.16 -1.27) (layer F.SilkS) (width 0.3048))
- (pad 1 thru_hole rect (at -11.43 0 270) (size 1.397 1.397) (drill 0.8128)
- (layers *.Cu *.Mask F.SilkS)
- (net 1 +5V)
- )
- (pad 2 thru_hole circle (at -8.89 0 270) (size 1.397 1.397) (drill 0.8128)
- (layers *.Cu *.Mask F.SilkS)
- (net 2 GND)
- )
- (pad 3 thru_hole circle (at -6.35 0 270) (size 1.397 1.397) (drill 0.8128)
- (layers *.Cu *.Mask F.SilkS)
- )
- (pad 4 thru_hole circle (at -3.81 0 270) (size 1.397 1.397) (drill 0.8128)
- (layers *.Cu *.Mask F.SilkS)
- )
- (pad 5 thru_hole circle (at -1.27 0 270) (size 1.397 1.397) (drill 0.8128)
- (layers *.Cu *.Mask F.SilkS)
- )
- (pad 6 thru_hole circle (at 1.27 0 270) (size 1.397 1.397) (drill 0.8128)
- (layers *.Cu *.Mask F.SilkS)
- )
- (pad 7 thru_hole circle (at 3.81 0 270) (size 1.397 1.397) (drill 0.8128)
- (layers *.Cu *.Mask F.SilkS)
- )
- (pad 8 thru_hole circle (at 6.35 0 270) (size 1.397 1.397) (drill 0.8128)
- (layers *.Cu *.Mask F.SilkS)
- )
- (pad 9 thru_hole circle (at 8.89 0 270) (size 1.397 1.397) (drill 0.8128)
- (layers *.Cu *.Mask F.SilkS)
- )
- (pad 10 thru_hole circle (at 11.43 0 270) (size 1.397 1.397) (drill 0.8128)
- (layers *.Cu *.Mask F.SilkS)
- )
+ (pad 1 thru_hole rect (at -11.43 0 270) (size 1.397 1.397) (drill 0.8128) (layers *.Cu *.Mask F.SilkS))
+ (pad 2 thru_hole circle (at -8.89 0 270) (size 1.397 1.397) (drill 0.8128) (layers *.Cu *.Mask F.SilkS)
+ (net 1 GND))
+ (pad 3 thru_hole circle (at -6.35 0 270) (size 1.397 1.397) (drill 0.8128) (layers *.Cu *.Mask F.SilkS))
+ (pad 4 thru_hole circle (at -3.81 0 270) (size 1.397 1.397) (drill 0.8128) (layers *.Cu *.Mask F.SilkS))
+ (pad 5 thru_hole circle (at -1.27 0 270) (size 1.397 1.397) (drill 0.8128) (layers *.Cu *.Mask F.SilkS))
+ (pad 6 thru_hole circle (at 1.27 0 270) (size 1.397 1.397) (drill 0.8128) (layers *.Cu *.Mask F.SilkS))
+ (pad 7 thru_hole circle (at 3.81 0 270) (size 1.397 1.397) (drill 0.8128) (layers *.Cu *.Mask F.SilkS))
+ (pad 8 thru_hole circle (at 6.35 0 270) (size 1.397 1.397) (drill 0.8128) (layers *.Cu *.Mask F.SilkS))
+ (pad 9 thru_hole circle (at 8.89 0 270) (size 1.397 1.397) (drill 0.8128) (layers *.Cu *.Mask F.SilkS))
+ (pad 10 thru_hole circle (at 11.43 0 270) (size 1.397 1.397) (drill 0.8128) (layers *.Cu *.Mask F.SilkS))
)
- (module SIL-10 (layer F.Cu) (tedit 5080DEDC) (tstamp 5080AB8D)
- (at 185.42 133.35 270)
+ (module Connect:SIL-10 (layer F.Cu) (tedit 0) (tstamp 584FABBA)
+ (at 228.6 133.35 270)
(descr "Connecteur 10 pins")
(tags "CONN DEV")
- (path /5080DB5C)
- (fp_text reference J1 (at -13.97 0 360) (layer F.SilkS)
+ (path /5080DC12)
+ (fp_text reference J4 (at -6.35 -2.54 270) (layer F.SilkS)
(effects (font (size 1.72974 1.08712) (thickness 0.3048)))
)
- (fp_text value TI_BOOSTER_40_J1 (at 6.35 -2.54 270) (layer F.SilkS)
+ (fp_text value TI_BOOSTER_40_J4 (at 6.35 -2.54 270) (layer F.SilkS)
(effects (font (size 1.524 1.016) (thickness 0.3048)))
)
- (fp_line (start -12.7 1.27) (end -12.7 -1.27) (layer F.SilkS) (width 0.3048))
- (fp_line (start -12.7 -1.27) (end 12.7 -1.27) (layer F.SilkS) (width 0.3048))
- (fp_line (start 12.7 -1.27) (end 12.7 1.27) (layer F.SilkS) (width 0.3048))
- (fp_line (start 12.7 1.27) (end -12.7 1.27) (layer F.SilkS) (width 0.3048))
(fp_line (start -10.16 1.27) (end -10.16 -1.27) (layer F.SilkS) (width 0.3048))
- (pad 1 thru_hole rect (at -11.43 0 270) (size 1.397 1.397) (drill 0.8128)
- (layers *.Cu *.Mask F.SilkS)
- (net 3 VCC)
- )
- (pad 2 thru_hole circle (at -8.89 0 270) (size 1.397 1.397) (drill 0.8128)
- (layers *.Cu *.Mask F.SilkS)
- )
- (pad 3 thru_hole circle (at -6.35 0 270) (size 1.397 1.397) (drill 0.8128)
- (layers *.Cu *.Mask F.SilkS)
- )
- (pad 4 thru_hole circle (at -3.81 0 270) (size 1.397 1.397) (drill 0.8128)
- (layers *.Cu *.Mask F.SilkS)
- )
- (pad 5 thru_hole circle (at -1.27 0 270) (size 1.397 1.397) (drill 0.8128)
- (layers *.Cu *.Mask F.SilkS)
- )
- (pad 6 thru_hole circle (at 1.27 0 270) (size 1.397 1.397) (drill 0.8128)
- (layers *.Cu *.Mask F.SilkS)
- )
- (pad 7 thru_hole circle (at 3.81 0 270) (size 1.397 1.397) (drill 0.8128)
- (layers *.Cu *.Mask F.SilkS)
- )
- (pad 8 thru_hole circle (at 6.35 0 270) (size 1.397 1.397) (drill 0.8128)
- (layers *.Cu *.Mask F.SilkS)
- )
- (pad 9 thru_hole circle (at 8.89 0 270) (size 1.397 1.397) (drill 0.8128)
- (layers *.Cu *.Mask F.SilkS)
- )
- (pad 10 thru_hole circle (at 11.43 0 270) (size 1.397 1.397) (drill 0.8128)
- (layers *.Cu *.Mask F.SilkS)
- )
+ (fp_line (start 12.7 1.27) (end -12.7 1.27) (layer F.SilkS) (width 0.3048))
+ (fp_line (start 12.7 -1.27) (end 12.7 1.27) (layer F.SilkS) (width 0.3048))
+ (fp_line (start -12.7 -1.27) (end 12.7 -1.27) (layer F.SilkS) (width 0.3048))
+ (fp_line (start -12.7 1.27) (end -12.7 -1.27) (layer F.SilkS) (width 0.3048))
+ (pad 10 thru_hole circle (at 11.43 0 270) (size 1.397 1.397) (drill 0.8128) (layers *.Cu *.Mask F.SilkS))
+ (pad 9 thru_hole circle (at 8.89 0 270) (size 1.397 1.397) (drill 0.8128) (layers *.Cu *.Mask F.SilkS))
+ (pad 8 thru_hole circle (at 6.35 0 270) (size 1.397 1.397) (drill 0.8128) (layers *.Cu *.Mask F.SilkS))
+ (pad 7 thru_hole circle (at 3.81 0 270) (size 1.397 1.397) (drill 0.8128) (layers *.Cu *.Mask F.SilkS))
+ (pad 6 thru_hole circle (at 1.27 0 270) (size 1.397 1.397) (drill 0.8128) (layers *.Cu *.Mask F.SilkS))
+ (pad 5 thru_hole circle (at -1.27 0 270) (size 1.397 1.397) (drill 0.8128) (layers *.Cu *.Mask F.SilkS))
+ (pad 4 thru_hole circle (at -3.81 0 270) (size 1.397 1.397) (drill 0.8128) (layers *.Cu *.Mask F.SilkS))
+ (pad 3 thru_hole circle (at -6.35 0 270) (size 1.397 1.397) (drill 0.8128) (layers *.Cu *.Mask F.SilkS))
+ (pad 2 thru_hole circle (at -8.89 0 270) (size 1.397 1.397) (drill 0.8128) (layers *.Cu *.Mask F.SilkS))
+ (pad 1 thru_hole rect (at -11.43 0 270) (size 1.397 1.397) (drill 0.8128) (layers *.Cu *.Mask F.SilkS))
)
(dimension 34.29 (width 0.25) (layer Dwgs.User)
- (gr_text "1.3500 in" (at 176.800001 130.175 270) (layer Dwgs.User)
+ (gr_text "1.3500 in" (at 176.800001 130.175 270) (layer Dwgs.User) (tstamp 584FAB60)
(effects (font (size 1 1) (thickness 0.25)))
)
(feature1 (pts (xy 182.88 147.32) (xy 175.800001 147.32)))
@@ -313,7 +224,7 @@
(arrow2b (pts (xy 177.800001 113.03) (xy 178.386421 114.156503)))
)
(dimension 8.89 (width 0.25) (layer Dwgs.User)
- (gr_text "0.3500 in" (at 238.49 117.475 90) (layer Dwgs.User)
+ (gr_text "0.3500 in" (at 238.49 117.475 90) (layer Dwgs.User) (tstamp 584FAB61)
(effects (font (size 1 1) (thickness 0.25)))
)
(feature1 (pts (xy 231.14 113.03) (xy 239.49 113.03)))
@@ -326,7 +237,7 @@
)
(gr_line (start 233.68 147.32) (end 182.88 147.32) (angle 90) (layer Edge.Cuts) (width 0.15))
(dimension 50.8 (width 0.25) (layer Dwgs.User)
- (gr_text "2.0000 in" (at 208.28 105.680002) (layer Dwgs.User)
+ (gr_text "2.0000 in" (at 208.28 105.680002) (layer Dwgs.User) (tstamp 584FAB62)
(effects (font (size 1 1) (thickness 0.25)))
)
(feature1 (pts (xy 233.68 113.03) (xy 233.68 104.680002)))
diff --git a/template/ti-stellaris-boosterpack40_min/boosterpack40_min.net b/template/ti-stellaris-boosterpack40_min/boosterpack40_min.net
index cdd85cc..26dbdbe 100644
--- a/template/ti-stellaris-boosterpack40_min/boosterpack40_min.net
+++ b/template/ti-stellaris-boosterpack40_min/boosterpack40_min.net
@@ -1,58 +1,185 @@
-# EESchema Netlist Version 1.1 created Thu 18 Oct 2012 10:10:38 PM PDT
-(
- ( /5080DB5C $noname J1 TI_BOOSTER_40_J1 {Lib=TI_BOOSTER_40_J1}
- ( 1 VCC )
- ( 2 ? )
- ( 3 ? )
- ( 4 ? )
- ( 5 ? )
- ( 6 ? )
- ( 7 ? )
- ( 8 ? )
- ( 9 ? )
- ( 10 ? )
- )
- ( /5080DBF4 $noname J2 TI_BOOSTER_40_J2 {Lib=TI_BOOSTER_40_J2}
- ( 1 GND )
- ( 2 ? )
- ( 3 ? )
- ( 4 ? )
- ( 5 ? )
- ( 6 ? )
- ( 7 ? )
- ( 8 ? )
- ( 9 ? )
- ( 10 ? )
- )
- ( /5080DC03 $noname J3 TI_BOOSTER_40_J3 {Lib=TI_BOOSTER_40_J3}
- ( 1 +5V )
- ( 2 GND )
- ( 3 ? )
- ( 4 ? )
- ( 5 ? )
- ( 6 ? )
- ( 7 ? )
- ( 8 ? )
- ( 9 ? )
- ( 10 ? )
- )
- ( /5080DC12 $noname J4 TI_BOOSTER_40_J4 {Lib=TI_BOOSTER_40_J4}
- ( 1 ? )
- ( 2 ? )
- ( 3 ? )
- ( 4 ? )
- ( 5 ? )
- ( 6 ? )
- ( 7 ? )
- ( 8 ? )
- ( 9 ? )
- ( 10 ? )
- )
-)
-*
-{ Pin List by Nets
-Net 2 "GND" "GND"
- J3 2
- J2 1
-}
-#End
+(export (version D)
+ (design
+ (source E:\kicad-git\kicad_git_libs\template\ti-stellaris-boosterpack40_min\boosterpack40_min.sch)
+ (date "13/12/2016 09:03:28")
+ (tool "Eeschema (2016-12-12 revision b1e37ae)-master")
+ (sheet (number 1) (name /) (tstamps /)
+ (title_block
+ (title)
+ (company)
+ (rev)
+ (date "19 oct 2012")
+ (source boosterpack40_min.sch)
+ (comment (number 1) (value ""))
+ (comment (number 2) (value ""))
+ (comment (number 3) (value ""))
+ (comment (number 4) (value "")))))
+ (components
+ (comp (ref J1)
+ (value TI_BOOSTER_40_J1)
+ (footprint Connect:SIL-10)
+ (libsource (lib boosterpack) (part Ti_Booster_40_J1))
+ (sheetpath (names /) (tstamps /))
+ (tstamp 5080DB5C))
+ (comp (ref J2)
+ (value TI_BOOSTER_40_J2)
+ (footprint Connect:SIL-10)
+ (libsource (lib boosterpack) (part Ti_Booster_40_J2))
+ (sheetpath (names /) (tstamps /))
+ (tstamp 5080DBF4))
+ (comp (ref J3)
+ (value TI_BOOSTER_40_J3)
+ (footprint Connect:SIL-10)
+ (libsource (lib boosterpack) (part Ti_Booster_40_J3))
+ (sheetpath (names /) (tstamps /))
+ (tstamp 5080DC03))
+ (comp (ref J4)
+ (value TI_BOOSTER_40_J4)
+ (footprint Connect:SIL-10)
+ (libsource (lib boosterpack) (part Ti_Booster_40_J4))
+ (sheetpath (names /) (tstamps /))
+ (tstamp 5080DC12)))
+ (libparts
+ (libpart (lib boosterpack) (part Ti_Booster_40_J1)
+ (fields
+ (field (name Reference) J)
+ (field (name Value) Ti_Booster_40_J1))
+ (pins
+ (pin (num 1) (name 1.01/Vcc) (type power_in))
+ (pin (num 2) (name 1.02/PB5) (type BiDi))
+ (pin (num 3) (name 1.03/PB0/Rxd) (type BiDi))
+ (pin (num 4) (name 1.04/PB1/TxD) (type BiDi))
+ (pin (num 5) (name 1.05/PE4) (type BiDi))
+ (pin (num 6) (name 1.06/PE5) (type BiDi))
+ (pin (num 7) (name 1.07/PB4) (type BiDi))
+ (pin (num 8) (name 1.08/PA5) (type BiDi))
+ (pin (num 9) (name 1.09/PA6) (type BiDi))
+ (pin (num 10) (name 1.10/PA7) (type BiDi))))
+ (libpart (lib boosterpack) (part Ti_Booster_40_J2)
+ (fields
+ (field (name Reference) J)
+ (field (name Value) Ti_Booster_40_J2))
+ (pins
+ (pin (num 1) (name 2.01/GND) (type power_in))
+ (pin (num 2) (name 2.02/PB2) (type BiDi))
+ (pin (num 3) (name 2.03/PE0) (type BiDi))
+ (pin (num 4) (name 2.04/PF0) (type BiDi))
+ (pin (num 5) (name 2.05/RESET) (type BiDi))
+ (pin (num 6) (name 2.06/PB7) (type BiDi))
+ (pin (num 7) (name 2.07/PB6) (type BiDi))
+ (pin (num 8) (name 2.08/PA4) (type BiDi))
+ (pin (num 9) (name 2.09/PA3) (type BiDi))
+ (pin (num 10) (name 2.10/PA2) (type BiDi))))
+ (libpart (lib boosterpack) (part Ti_Booster_40_J3)
+ (fields
+ (field (name Reference) J)
+ (field (name Value) Ti_Booster_40_J3))
+ (pins
+ (pin (num 1) (name 3.01/+5V) (type power_in))
+ (pin (num 2) (name 3.02/GND) (type BiDi))
+ (pin (num 3) (name 3.03/PD0) (type BiDi))
+ (pin (num 4) (name 3.04/PD1) (type BiDi))
+ (pin (num 5) (name 3.05/PD2) (type BiDi))
+ (pin (num 6) (name 3.06/PD3) (type BiDi))
+ (pin (num 7) (name 3.07/PE1) (type BiDi))
+ (pin (num 8) (name 3.08/PE2) (type BiDi))
+ (pin (num 9) (name 3.09/PE3) (type BiDi))
+ (pin (num 10) (name 3.10/PF1) (type BiDi))))
+ (libpart (lib boosterpack) (part Ti_Booster_40_J4)
+ (fields
+ (field (name Reference) J)
+ (field (name Value) Ti_Booster_40_J4))
+ (pins
+ (pin (num 1) (name 4.01/PF2) (type power_in))
+ (pin (num 2) (name 4.02/PF3) (type BiDi))
+ (pin (num 3) (name 4.03/PB3) (type BiDi))
+ (pin (num 4) (name 4.04/PC4) (type BiDi))
+ (pin (num 5) (name 4.05/PC5) (type BiDi))
+ (pin (num 6) (name 4.06/PC6) (type BiDi))
+ (pin (num 7) (name 4.07/PC7) (type BiDi))
+ (pin (num 8) (name 4.08/PD6) (type BiDi))
+ (pin (num 9) (name 4.09/PD7) (type BiDi))
+ (pin (num 10) (name 4.10/PF4) (type BiDi)))))
+ (libraries
+ (library (logical boosterpack)
+ (uri E:\kicad-git\kicad_git_libs\template\ti-stellaris-boosterpack40_min\boosterpack.lib)))
+ (nets
+ (net (code 1) (name "Net-(J4-Pad3)")
+ (node (ref J4) (pin 3)))
+ (net (code 2) (name GND)
+ (node (ref J3) (pin 2))
+ (node (ref J2) (pin 1)))
+ (net (code 3) (name "Net-(J3-Pad3)")
+ (node (ref J3) (pin 3)))
+ (net (code 4) (name "Net-(J3-Pad4)")
+ (node (ref J3) (pin 4)))
+ (net (code 5) (name "Net-(J3-Pad5)")
+ (node (ref J3) (pin 5)))
+ (net (code 6) (name "Net-(J3-Pad6)")
+ (node (ref J3) (pin 6)))
+ (net (code 7) (name "Net-(J3-Pad7)")
+ (node (ref J3) (pin 7)))
+ (net (code 8) (name "Net-(J3-Pad8)")
+ (node (ref J3) (pin 8)))
+ (net (code 9) (name "Net-(J3-Pad9)")
+ (node (ref J3) (pin 9)))
+ (net (code 10) (name "Net-(J3-Pad10)")
+ (node (ref J3) (pin 10)))
+ (net (code 11) (name "Net-(J4-Pad1)")
+ (node (ref J4) (pin 1)))
+ (net (code 12) (name "Net-(J4-Pad2)")
+ (node (ref J4) (pin 2)))
+ (net (code 13) (name +5V)
+ (node (ref J3) (pin 1)))
+ (net (code 14) (name "Net-(J4-Pad4)")
+ (node (ref J4) (pin 4)))
+ (net (code 15) (name "Net-(J4-Pad5)")
+ (node (ref J4) (pin 5)))
+ (net (code 16) (name "Net-(J4-Pad6)")
+ (node (ref J4) (pin 6)))
+ (net (code 17) (name "Net-(J4-Pad7)")
+ (node (ref J4) (pin 7)))
+ (net (code 18) (name "Net-(J4-Pad8)")
+ (node (ref J4) (pin 8)))
+ (net (code 19) (name "Net-(J4-Pad9)")
+ (node (ref J4) (pin 9)))
+ (net (code 20) (name "Net-(J4-Pad10)")
+ (node (ref J4) (pin 10)))
+ (net (code 21) (name "Net-(J1-Pad9)")
+ (node (ref J1) (pin 9)))
+ (net (code 22) (name VCC)
+ (node (ref J1) (pin 1)))
+ (net (code 23) (name "Net-(J1-Pad2)")
+ (node (ref J1) (pin 2)))
+ (net (code 24) (name "Net-(J1-Pad3)")
+ (node (ref J1) (pin 3)))
+ (net (code 25) (name "Net-(J1-Pad4)")
+ (node (ref J1) (pin 4)))
+ (net (code 26) (name "Net-(J1-Pad5)")
+ (node (ref J1) (pin 5)))
+ (net (code 27) (name "Net-(J1-Pad6)")
+ (node (ref J1) (pin 6)))
+ (net (code 28) (name "Net-(J1-Pad7)")
+ (node (ref J1) (pin 7)))
+ (net (code 29) (name "Net-(J1-Pad8)")
+ (node (ref J1) (pin 8)))
+ (net (code 30) (name "Net-(J1-Pad10)")
+ (node (ref J1) (pin 10)))
+ (net (code 31) (name "Net-(J2-Pad2)")
+ (node (ref J2) (pin 2)))
+ (net (code 32) (name "Net-(J2-Pad3)")
+ (node (ref J2) (pin 3)))
+ (net (code 33) (name "Net-(J2-Pad4)")
+ (node (ref J2) (pin 4)))
+ (net (code 34) (name "Net-(J2-Pad5)")
+ (node (ref J2) (pin 5)))
+ (net (code 35) (name "Net-(J2-Pad6)")
+ (node (ref J2) (pin 6)))
+ (net (code 36) (name "Net-(J2-Pad7)")
+ (node (ref J2) (pin 7)))
+ (net (code 37) (name "Net-(J2-Pad8)")
+ (node (ref J2) (pin 8)))
+ (net (code 38) (name "Net-(J2-Pad9)")
+ (node (ref J2) (pin 9)))
+ (net (code 39) (name "Net-(J2-Pad10)")
+ (node (ref J2) (pin 10)))))
\ No newline at end of file
diff --git a/template/ti-stellaris-boosterpack40_min/boosterpack40_min.pro b/template/ti-stellaris-boosterpack40_min/boosterpack40_min.pro
index 118f8ba..776a6a6 100644
--- a/template/ti-stellaris-boosterpack40_min/boosterpack40_min.pro
+++ b/template/ti-stellaris-boosterpack40_min/boosterpack40_min.pro
@@ -1,46 +1,6 @@
-update=Thu 18 Oct 2012 10:08:50 PM PDT
+update=13/12/2016 08:59:10
version=1
last_client=kicad
-[eeschema]
-version=1
-LibDir=
-NetFmtName=
-RptD_X=0
-RptD_Y=100
-RptLab=1
-LabSize=60
-[eeschema/libraries]
-LibName1=boosterpack
-LibName2=power
-LibName3=device
-LibName4=transistors
-LibName5=conn
-LibName6=linear
-LibName7=regul
-LibName8=74xx
-LibName9=cmos4000
-LibName10=adc-dac
-LibName11=memory
-LibName12=xilinx
-LibName13=special
-LibName14=microcontrollers
-LibName15=dsp
-LibName16=microchip
-LibName17=analog_switches
-LibName18=motorola
-LibName19=texas
-LibName20=intel
-LibName21=audio
-LibName22=interface
-LibName23=digital-audio
-LibName24=philips
-LibName25=display
-LibName26=cypress
-LibName27=siliconi
-LibName28=opto
-LibName29=atmel
-LibName30=contrib
-LibName31=valves
[cvpcb]
version=1
NetIExt=net
@@ -78,3 +38,37 @@ LibName11=pga_sockets
LibName12=valves
[general]
version=1
+[eeschema]
+version=1
+LibDir=
+[eeschema/libraries]
+LibName1=boosterpack
+LibName2=power
+LibName3=device
+LibName4=transistors
+LibName5=conn
+LibName6=linear
+LibName7=regul
+LibName8=74xx
+LibName9=cmos4000
+LibName10=adc-dac
+LibName11=memory
+LibName12=xilinx
+LibName13=microcontrollers
+LibName14=dsp
+LibName15=microchip
+LibName16=analog_switches
+LibName17=motorola
+LibName18=texas
+LibName19=intel
+LibName20=audio
+LibName21=interface
+LibName22=digital-audio
+LibName23=philips
+LibName24=display
+LibName25=cypress
+LibName26=siliconi
+LibName27=opto
+LibName28=atmel
+LibName29=contrib
+LibName30=valves
diff --git a/template/ti-stellaris-boosterpack40_min/boosterpack40_min.sch b/template/ti-stellaris-boosterpack40_min/boosterpack40_min.sch
index 0877de7..e9a1c79 100644
--- a/template/ti-stellaris-boosterpack40_min/boosterpack40_min.sch
+++ b/template/ti-stellaris-boosterpack40_min/boosterpack40_min.sch
@@ -1,4 +1,4 @@
-EESchema Schematic File Version 2 date Thu 18 Oct 2012 10:11:13 PM PDT
+EESchema Schematic File Version 2
LIBS:boosterpack
LIBS:power
LIBS:device
@@ -11,7 +11,6 @@ LIBS:cmos4000
LIBS:adc-dac
LIBS:memory
LIBS:xilinx
-LIBS:special
LIBS:microcontrollers
LIBS:dsp
LIBS:microchip
@@ -31,7 +30,7 @@ LIBS:atmel
LIBS:contrib
LIBS:valves
LIBS:boosterpack40_min-cache
-EELAYER 27 0
+EELAYER 26 0
EELAYER END
$Descr A4 11693 8268
encoding utf-8
@@ -48,73 +47,89 @@ $EndDescr
$Comp
L GND #PWR01
U 1 1 5080AA99
-P 9150 2450
-F 0 "#PWR01" H 9150 2450 30 0001 C CNN
-F 1 "GND" H 9150 2380 30 0001 C CNN
- 1 9150 2450
+P 9150 2300
+F 0 "#PWR01" H 9150 2050 50 0001 C CNN
+F 1 "GND" H 9150 2150 50 0000 C CNN
+F 2 "" H 9150 2300 50 0000 C CNN
+F 3 "" H 9150 2300 50 0000 C CNN
+ 1 9150 2300
0 1 1 0
$EndComp
$Comp
L VCC #PWR02
U 1 1 5080AA9F
-P 9150 900
-F 0 "#PWR02" H 9150 1000 30 0001 C CNN
-F 1 "VCC" H 9150 1000 30 0000 C CNN
- 1 9150 900
- 0 -1 -1 0
+P 9150 750
+F 0 "#PWR02" H 9150 600 50 0001 C CNN
+F 1 "VCC" H 9150 900 50 0000 C CNN
+F 2 "" H 9150 750 50 0000 C CNN
+F 3 "" H 9150 750 50 0000 C CNN
+ 1 9150 750
+ 1 0 0 -1
$EndComp
$Comp
-L TI_BOOSTER_40_J1 J1
+L Ti_Booster_40_J1 J1
U 1 1 5080DB5C
-P 9750 1350
-F 0 "J1" H 9700 2000 60 0000 C CNN
-F 1 "TI_BOOSTER_40_J1" H 9750 700 60 0000 C CNN
- 1 9750 1350
+P 9750 1200
+F 0 "J1" H 9700 1850 60 0000 C CNN
+F 1 "TI_BOOSTER_40_J1" H 9750 550 60 0000 C CNN
+F 2 "Connect:SIL-10" V 10200 1200 60 0000 C CNN
+F 3 "" H 9750 1200 60 0001 C CNN
+ 1 9750 1200
1 0 0 -1
$EndComp
$Comp
-L TI_BOOSTER_40_J2 J2
+L Ti_Booster_40_J2 J2
U 1 1 5080DBF4
-P 9750 2900
-F 0 "J2" H 9700 3550 60 0000 C CNN
-F 1 "TI_BOOSTER_40_J2" H 9750 2250 60 0000 C CNN
- 1 9750 2900
+P 9750 2750
+F 0 "J2" H 9700 3400 60 0000 C CNN
+F 1 "TI_BOOSTER_40_J2" H 9750 2100 60 0000 C CNN
+F 2 "Connect:SIL-10" V 10200 2750 60 0000 C CNN
+F 3 "" H 9750 2750 60 0001 C CNN
+ 1 9750 2750
1 0 0 -1
$EndComp
$Comp
-L TI_BOOSTER_40_J3 J3
+L Ti_Booster_40_J3 J3
U 1 1 5080DC03
-P 9750 4450
-F 0 "J3" H 9700 5100 60 0000 C CNN
-F 1 "TI_BOOSTER_40_J3" H 9750 3800 60 0000 C CNN
- 1 9750 4450
+P 9750 4300
+F 0 "J3" H 9700 4950 60 0000 C CNN
+F 1 "TI_BOOSTER_40_J3" H 9750 3650 60 0000 C CNN
+F 2 "Connect:SIL-10" V 10200 4300 60 0000 C CNN
+F 3 "" H 9750 4300 60 0001 C CNN
+ 1 9750 4300
1 0 0 -1
$EndComp
$Comp
-L TI_BOOSTER_40_J4 J4
+L Ti_Booster_40_J4 J4
U 1 1 5080DC12
-P 9750 6000
-F 0 "J4" H 9700 6650 60 0000 C CNN
-F 1 "TI_BOOSTER_40_J4" H 9750 5350 60 0000 C CNN
- 1 9750 6000
+P 9750 5850
+F 0 "J4" H 9700 6500 60 0000 C CNN
+F 1 "TI_BOOSTER_40_J4" H 9750 5200 60 0000 C CNN
+F 2 "Connect:SIL-10" V 10200 5850 60 0000 C CNN
+F 3 "" H 9750 5850 60 0001 C CNN
+ 1 9750 5850
1 0 0 -1
$EndComp
$Comp
L GND #PWR03
U 1 1 5080DC79
-P 9150 4100
-F 0 "#PWR03" H 9150 4100 30 0001 C CNN
-F 1 "GND" H 9150 4030 30 0001 C CNN
- 1 9150 4100
+P 9150 3950
+F 0 "#PWR03" H 9150 3700 50 0001 C CNN
+F 1 "GND" H 9150 3800 50 0000 C CNN
+F 2 "" H 9150 3950 50 0000 C CNN
+F 3 "" H 9150 3950 50 0000 C CNN
+ 1 9150 3950
0 1 1 0
$EndComp
$Comp
L +5V #PWR04
U 1 1 5080DC8B
-P 9150 4000
-F 0 "#PWR04" H 9150 4090 20 0001 C CNN
-F 1 "+5V" H 9150 4090 30 0000 C CNN
- 1 9150 4000
- 0 -1 -1 0
+P 9150 3850
+F 0 "#PWR04" H 9150 3700 50 0001 C CNN
+F 1 "+5V" H 9150 3990 50 0000 C CNN
+F 2 "" H 9150 3850 50 0000 C CNN
+F 3 "" H 9150 3850 50 0000 C CNN
+ 1 9150 3850
+ 1 0 0 -1
$EndComp
$EndSCHEMATC
diff --git a/template/ti-stellaris-boosterpack40_min/fp-lib-table b/template/ti-stellaris-boosterpack40_min/fp-lib-table
new file mode 100644
index 0000000..3af510b
--- /dev/null
+++ b/template/ti-stellaris-boosterpack40_min/fp-lib-table
@@ -0,0 +1,2 @@
+(fp_lib_table
+)
References
