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Re: [PATCH] CPolyLine -> SHAPE_POLY_SET refactor

 

Do the patches apply cleanly? It is possible that they need a slight rebase
since the latest changes on the GAL zone.

Let me check it.

2017-03-23 9:19 GMT+01:00 Maciej Sumiński <maciej.suminski@xxxxxxx>:

> Finally I had some time to test the branch and I could not find any
> problems, hence I would like to merge it. Let me know if there are any
> objections.
>
> @Nick:
> Could you give more details? I placed keepout zones and refilled zones
> for all demo boards, and every time I get exactly the same zones (diffed
> two .kicad_pcb files).
>
> Regards,
> Orson
>
> On 02/18/2017 08:13 PM, Nick Østergaard wrote:
> > I have noticed that Alejandro's branch does not have a clearance
> > distance to a keepout zone, which the old filling algorithm has.
> >
> > I am not sure what is really desired, but this could potentially break
> > old designs, although I like the new way where the zone goes to the
> > keepout edge.
> >
> > 2017-02-17 20:24 GMT+01:00 jp charras <jp.charras@xxxxxxxxxx>:
> >> Le 17/02/2017 à 19:41, Alejandro Garcia Montoro a écrit :
> >>> Hi!
> >>>
> >>> The errors were caused by some asserts that contained functions that
> needed to be called... My bad.
> >>> Now the asserts are gone and the errors are handled via out_of_range
> exceptions (they were related
> >>> with possible illegal memory access),
> >>>
> >>> JP, I finally saw the zone filling error in the release build!
> >>>
> >>> Nick and JP, if you can pull and test the branch again and see if the
> errors you saw are fixed, that
> >>> would be great. Thank you.
> >>>
> >>> Best,
> >>> Alejandro
> >>
> >>
> >> At first glance, the issues I previously saw are gone.
> >> Thanks.
> >>
> >>
> >> --
> >> Jean-Pierre CHARRAS
> >>
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>
>
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