kicad-developers team mailing list archive

[Tomasz Wlostowski <tomasz.wlostowski@xxxxxxx>]

On 26.04.2017 20:23, jp charras wrote:
> Le 25/04/2017 à 17:23, Tomasz Wlostowski a écrit :
>>
>> Hi all,
>>
>> I've pushed the branch [1] containing a rewrite of the pcbnew's
>> connectivity algorithm. By this algorithm, I mean:
>> - computing the ratsnest and checking if all connections are complete
>> - propagating net codes from the pads to the tracks/vias
>> - removing unconnected copper islands in zones
> 
> Hi Tomasz,
> 
> I just tested it (not deeply)
> 
> I did not noticed strange things.
> However I ran into an issue when running the DRC:
> the tracks test (clearance test) is very slow:
> Calculation time is x20 to x25
> 
> On a large board (16 layers, 12000 track segments, 2400 pads) the current test takes 5 s.
> The new connectivity algorithm takes 2 minutes.
> 
> just FYI.
Hi Jean-Pierre,

Many thanks for your effort! Would you be able to send me this board so
that I could trace the source of this performance regression?

Cheers,
Tom