kicad-developers team mailing list archive

[Simon Küppers <simon.kueppers@xxxxxx>]

Hi everyone,
as promised I started working on the via fence generator plugin for
KiCad.

The idea behind the plugin is that you can somehow select a trace in the
pcbnew program and run the plugin so that you get vias all around the
trace to shield it from other parts of your circuit boards. This
technique is often used in RF design with grounded coplanar waveguide
(GCPW) or substrate integrated waveguide (SIW) type of transmission lines.

Now I am very new to KiCad itself and thusfar I only worked on the
generation of the correct positions to place the vias. I have not yet
worked on the integration into KiCad, because I still have some
questions regarding that.

Now down to business. In my repo at
https://github.com/skuep/kicad-plugins
you can find via-fence-generator.py. At this point in time, it is not
integrated into KiCad. Right now it functions only as a test suite that
you can simply execute with any Python 2 interpreter.

The required libraries are pyclipper and math. For the test suite also
numpy and matplotlib are required in order to plot some stuff in a 3D
window. Those libraries will not be required for the actual via
placement, since it is not so straight forward to get those installed
easily on a windows system.

As I have found out today, it is not as easy as I have thought to make
via fences along tracks and still pass the DRC.
My first thought was to use pyclipper to offset the track to the left
and to the right, so you get new tracks that are a constant distance to
the original track. Then the vias should be equally spaced on those
generated offsetted traces. The problem with that is, that if you have
acute angles in your original track (ok, it is unlikely but still!) and
place the vias at a constant distance along the path, vias at the
"inside" corner get way too close together.

But I think I have found a really neat solution that already gives much
better result than I have ever had in Altium Designer. What I did is,
that I find kinks in the offsetted paths and place fixed vias at these
positions. Then I am basically left with a lot of path space between
those fixed vias, which I then fill with a constantly spaced distance
along the path.

Ah, one tricky thing I had to figure out was, how to actually get two
separated offsetted paths from the "expanded" polygon that pyclipper
generates. I think you can all spot it in the python code, it is fairly
well documented.

You can see an example image here
https://github.com/skuep/kicad-plugins/blob/master/via-fence-generator.png

You can try it out with your own settings and see if it breaks.

For the integration into KiCad i thought there might be a way to select
traces in pcbnew. As I could not figure out how to do so, I suppose
there is no way to select tracks or line segments in pcbnew?
Another way (the Altium way) would be, to enter a Net name into a dialog
and the entire net would be via-fenced. I am not sure if this is
practical, but it might be the way we should start to integrate it.

There is also the question where to get the values for viaOffset and
viaPitch for the algorithm. Should we pull these values somewhere from
the design rules? maybe make them dependent on the net class? I would
rather be able to override them using some sort of dialog.

In RF PCB design there is something called a substrate integrated
waveguide. You can see it here
https://www.microwaves101.com/encyclopedias/substrate-integrated-waveguide
It basically is Top Copper, Bottom Copper and just two "walls" of vias.
There is no way to generate this automatically in any PCB CAD package
known to me. Where I work, we deal with frequencies above 100 GHz and
here SIW works much better, so we use them a lot. It would be really
really cool, if the via fence generator could support them.

One way I could imagine this is the following:
We use a user defined layer (you can see, we need a lot more of user
defined layers...) and draw a track where the SIW is to be implemented.
Then we select the track (again, is that even possible?) or use all
tracks on the user defined layer as input to the via-fence generator. It
would then simply generate two walls of via with very well known offset
and pitch.

Ok that is it for now, tell me what you think about it. Maybe I should
(have) post/ed it over in the forums.. hm? ;-)

Best Regards
Simon