We have a fairly complex board that needs to be done yesterday. We've
been experimenting with simultaneous editing of the pcb with moderate
success.
We are using git. Each person works in a different area of the board,
and we merge the results periodically.
Because of the time crunch, we are only focusing on what works in this
process, and staying away from edits that do not work. Moving footprints
and laying tracks works fine.
A couple things I've noticed that could improve things:
net indexes of nets are not stable. Maybe eeschema/netlist.cpp:369 Maybe
we could wait until we get close to running out of integers before we do
this?
module order gets changed in some edits (Not sure but probably "fix
module file details and update modules in pcb" type edits). Ordering
modules by reference would fix this.
We are getting enough benefit that we'll keep refining the technique.
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