kicad-developers team mailing list archive

[Heikki Pulkkinen <hei6mail@xxxxxxxxx>]

Zones filling new record with new connectivity algo with A64-Olinuxino
board. 13s.

On Wed, Nov 22, 2017 at 12:55 PM, Heikki Pulkkinen <hei6mail@xxxxxxxxx>
wrote:

> Hi,
>
> As an interest. I tested now with that A64-Olinuxino board.
>
> Result is:
>
> Old algo with parallel zone filling 8s. That 2 times fill algo.
> New algo with parallel zone filling 20s. Only fill can be done parallel,
> not insulated area cleaning. Filling take approx 2s.
> Current master branch 37s.
>
> And my machine is core2duo E6750, 8G.
>
>
> Heikki
>
>
>
>
> On Sun, Nov 19, 2017 at 6:31 PM, Tomasz Wlostowski <
> tomasz.wlostowski@xxxxxxx> wrote:
>
>> On 19/11/17 16:18, Heikki Pulkkinen wrote:
>> > Hi,
>> >
>> > You can dowload it from:
>> >
>> > https://forum.kicad.info/t/testbench-board-for-kicad/1127
>> >
>> > I do some more test, and found that new algo would be very fast with my
>> > parallell zone filling algo, but it get stuck after filled all 128 pours
>> > below 10 seconds and started to removing insulated areas. Other boards
>> > just works fine. Maybe it is too good to be true to get results like
>> that.
>>
>> It's a board that I codesigned a long time ago (the White Rabbit Switch
>> v3.0) and crudely converted from Altium to Kicad as a performance test.
>> It's a very pathological test case, including split power planes
>> converted to many polygons with extremely complex outlines and lots of
>> tracks not centered on pads/vias (which Altium frequently does).
>>
>> It takes approx 3 mins to refill all zones on my machine ( i7-4700MQ, 16
>> GB RAM).
>>
>> For comparison, two rather complex designs done from scratch in Kicad
>> take much less time to refill.
>> - A64-Olinuxino : 17 s
>> - cible_ccd (JP's project) : 21 s
>>
>> Heikki, I'm interested in your parallel zone filling algorithm. Do you
>> have it in your Github?
>>
>> Tom
>> >
>> > Rgards
>> >
>> > Heikki
>> >
>> >
>> >
>> > On Sun, Nov 19, 2017 at 4:39 PM, Tomasz Wlostowski
>> > <tomasz.wlostowski@xxxxxxx <mailto:tomasz.wlostowski@xxxxxxx>> wrote:
>> >
>> >     On 19/11/17 15:35, Heikki Pulkkinen wrote:
>> >     > Hi,
>> >     >
>> >     >
>> >     > Sorry to tell that, but it seems that new connectivity algorithm
>> is slow
>> >     > with bigger boards. Doing some tests I noticed that  new algo is
>> >     > speeding recalculating ratsnest, but it costs manual routing and
>> >     > dragging performance. This video shows how big difference is. And
>> that
>> >     > board is just nothing big.
>> >     >
>> >     > Zones filling, that was really big difference. Old algo below 3
>> mins.
>> >     > New one almost 17  minutes. Old algo, has my parallelism algo in
>> zone
>> >     > filling, but it is doing it twice, with 2 core processor, and
>> most of
>> >     > the time it is calculating ratsnest before and after filling.
>> >     >
>> >     >
>> >     >
>> >     Heikki,
>> >
>> >     Can you send us (privately) the board that shows the drops in
>> >     performance? I'd greatly like to optimize it, with your help if
>> >     possible!
>> >
>> >     Best,
>> >     Tom
>> >
>> >     PS. What's the CPU/RAM of your PC?
>> >
>> >
>> >
>> >     > Regards
>> >     >
>> >     > Heikki
>> >     >
>> >     >
>> >     > https://youtu.be/JS57hRyzmdg
>> >     >
>> >     >
>> >     >
>> >     >
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>>
>