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Message #32238
Re: Zone filling
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To:
Heikki Pulkkinen <hei6mail@xxxxxxxxx>
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From:
Maciej Sumiński <maciej.suminski@xxxxxxx>
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Date:
Wed, 6 Dec 2017 14:10:16 +0100
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KiCad Developers <kicad-developers@xxxxxxxxxxxxxxxxxxx>
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Hi Heikki,
I might have not understood the question, would you please rephrase it?
I assumed you are asking why your code has not been merged and Tom's has
been accepted.
Regards,
Orson
On 12/06/2017 11:45 AM, Heikki Pulkkinen wrote:
> Hi Maciej
>
> You did not answer my question, and those are only excuses.
>
> Regards
>
> Heikki
>
>
> On Wed, Dec 6, 2017 at 12:12 PM, Maciej Sumiński <maciej.suminski@xxxxxxx>
> wrote:
>
>> Hi Heikki,
>>
>> Your branch contains a lot of code that is not in the official
>> repository and should not be merged (different connectivity algorithm,
>> alternative way for via stitching interleaved with numerous #ifdef).
>> There is no easy way to apply your changes to the master branch, as they
>> have diverged too much. We could not simply copy viastitching_pcbnew.cpp
>> to the master branch and have fast zone filling algorithm. What did you
>> expect us to do in such case?
>>
>> Regards,
>> Orson
>>
>> On 12/06/2017 10:47 AM, Heikki Pulkkinen wrote:
>>> Hi,
>>>
>>> I tested that new filling, and there is no improvement against with my
>>> parallel filling algo witch idea Tomasz copied.
>>>
>>> olinuxino A64, my 13s, new 12s.
>>> WRS, my 1min 43s, new 1min 44s.
>>>
>>> What is the meaning of rules?
>>>
>>>
>>> Regards
>>>
>>>
>>> Heikki
>>>
>>>
>>>
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>>
>>
>>
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>>
>
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