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Message #33749
Re: [PATCH] Don't draw invisible pins in component chooser
Yes, we can only throw an error if a wire connects to only invisible pins
at a given location.
I will add this to my queue since I am already planning on some reworks to
ERC code after the 5.0 release.
Thanks,
Jon
On Wed, Feb 7, 2018 at 8:36 AM, Maciej Sumiński <maciej.suminski@xxxxxxx>
wrote:
> The ERC check sounds sensible. I know that invisible pins are also used
> to place many pins in a single spot, so you can connect multiple pins
> with just one wire (think of e.g. ground connections). We may need to
> take this case into account.
>
> Cheers,
> Orson
>
>
> On 02/07/2018 02:32 PM, Jon Evans wrote:
> > We could hold this until after 5.0 and either add an ERC check, or
> better
> > yet make it so that you can't actually make connections to invisible
> pins?
> >
> > -Jon
> >
> > On Feb 7, 2018 08:29, "Maciej Sumiński" <maciej.suminski@xxxxxxx> wrote:
> >
> >> Hi Wayne,
> >>
> >> No, I have not reviewed the patch. I had some doubts about potential
> >> problems caused by invisible pins creating hidden connections. If user
> >> is neither aware of their presence when selecting a symbol, nor will
> >> notice them after they are placed on a schematic sheet then he may end
> >> up accidentally connecting them to some wires. IIRC we do not have an
> >> ERC test to check against such case, so I was not sure if it is a safe
> >> change.
> >>
> >> Cheers,
> >> Orson
> >>
> >> On 02/07/2018 02:21 PM, Wayne Stambaugh wrote:
> >>> Orson,
> >>>
> >>> Did you ever respond to Jon about this? I guess the question is
> whether
> >>> or not to show invisible pins in the component chooser.
> >>>
> >>> Cheers,
> >>>
> >>> Wayne
> >>>
> >>> On 1/15/2018 9:31 PM, Jon Evans wrote:
> >>>> Hi Orson, patch is attached again, hopefully it goes through this
> time.
> >>>>
> >>>> Thanks,
> >>>> Jon
> >>>>
> >>>> On Mon, Jan 15, 2018 at 4:24 AM, Rene Pöschl <poeschlr@xxxxxxxxx
> >>>> <mailto:poeschlr@xxxxxxxxx>> wrote:
> >>>>
> >>>> On 15/01/18 10:00, Maciej Sumiński wrote:
> >>>>
> >>>> Perhaps we should have an ERC rule
> >>>> that warns about invisible pins being connected to a wire, any
> >>>> thoughts?
> >>>>
> >>>>
> >>>> Invisible pins are used for three distinct applications.
> >>>>
> >>>> The first one is to remove clutter by hiding pins that should not
> be
> >>>> connected. ERC will complain if you connect such pins if they have
> >> the
> >>>> electrical type "Not connected".
> >>>>
> >>>> The second application is to create "power labels". A invisible
> >> power
> >>>> input pin is handled as a global label. These pins are meant to be
> >>>> connected.
> >>>>
> >>>> The third application is again to remove clutter by stacking pins.
> >> Here
> >>>> you have one visible pin and several other invisible pins at the
> >> same
> >>>> location. (Normally all these pins have the same name and
> electrical
> >>>> type. With the exception of power input pins, power output pins
> and
> >>>> output pins.)
> >>>> Such pins are again meant to be connected.
> >>>>
> >>>> This means a ERC rule that complains about connecting hidden pins
> >> will
> >>>> create too many false positives. Having a lot of false positives
> >> means
> >>>> users will start to ignore ERC output.
> >>>>
> >>>> It might be a good idea to have a symbol checker that complains if
> >>>> invisible pins are used differently than i described above.
> >>>> In other words: complain for invisible pins if they are not part
> of
> >> a
> >>>> stack or of types NC or power input.
> >>>>
> >>>>
> >>>>
> >>>>
> >>>> _______________________________________________
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> >>>>
> >>>>
> >>>>
> >>>>
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> >>>
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> >>>
> >>
> >>
> >>
> >> _______________________________________________
> >> Mailing list: https://launchpad.net/~kicad-developers
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> >>
> >>
> >
>
>
>
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