kicad-developers team mailing list archive

[jp charras <jp.charras@xxxxxxxxxx>]

Le 07/03/2018 à 14:02, Wayne Stambaugh a écrit :
> On 3/7/2018 7:44 AM, Tomasz Wlostowski wrote:
>> On 07/03/18 12:10, Russell Oliver wrote:
>>> Forgive my ignorance but why would storing the clearance for each track
>>> segment (if required to by design intent) conflict with a sophisticated
>>> design rule management system? 
>>
>> For example: what would happen to the clearance of the segment/via if it
>> has been modified by the P&S shove? What clearance should be taken if
>> new segments are generated by the P&S optimizer from multiple original
>> segments with different manually-set clearances?
>>
>> I'm not totally opposed to hauptmech's change, I just think it's too
>> early to merge it. We should discuss such ideas before writing code. My
>> goal for V6 DRC is to be able to define clearance rules for at least:
>> - per-net & per-netclass
>> - per-layer
>> - user-defined board areas.
>>
>> The latter two features IMHO will be more powerful than manually
>> overriding each segments' or via's clearance.
>>
>> Tom
>>
> 
> If there are other requirements, we should clearly define them before
> writing any new clearance code.  It will save us a lot of grief in the
> long run.
> 
> Wayne

Sure!
At least one other requirement is known: having a clearance value for external layers, and an other
value for internal layers.
There are also a few known other requirements (related to edge cuts and margin layer).


-- 
Jean-Pierre CHARRAS