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Message #34816
Re: Board Edge clearance problem
I guess this is about https://bugs.launchpad.net/kicad/+bug/1753904
2018-03-08 14:27 GMT+01:00 Strontium <strntydog@xxxxxxxxx>:
> On 07/03/18 18:25, Tomasz Wlostowski wrote:
>
>> On 07/03/18 06:34, Strontium wrote:
>>
>>> My second "show stopper" bug for me, using V5 RC2
>>>
>>> I also reported this in the bug tracker, again sorry for the double up.
>>>
>>> I was trying to layout a board, but Kicad is refusing to let me lay
>>> tracks or vias in close proximity to the board edge. Its highlighting
>>> the edge, and ignoring any command to drop the via or track segment.
>>>
>>> Two questions:
>>
>> - what's the default track clearance in your design?
>> - could you send us (in private) the board file?
>>
>> Tom
>>
>> Hi Tom,
>
> I just was preparing to send the board, and tested again, and it seems in
> todays update of the nightly PPA the behaviour has changed. Its no longer
> doing what I reported. So, it would appear that its problem solved.
>
> If you still need me to send the board, let me know. My clearance is
> 0.1524, for everything. And my edge cut is 0.1mm.
>
> Steven
>
>
>
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