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Message #35618
Re: Fwd: Re: What are the smallest values for pad paste and mask clearances? Why can't polygon pads not use negative mask clearance?
Le 28/04/2018 à 10:08, Eeli Kaikkonen a écrit :
> It still looks to me that the original problem wasn't understood, and I wasn't able to make it
> clear. A Solder Mask Defined footprint means that the solder mask opening is smaller than the
> underlying copper area. It may also be differently shaped than the underlying copper pad. Also the
> paste area may be differently shaped than the copper or solder mask. In these cases it should be
> possible to define the mask and paste areas exactly, without adding or removing anything. The
> logical way of doing it, if KiCad had took it into consideration, would be to draw the pad shape and
> set the clearances to 0, and the pad would always keep the exact dimensions. But now, because 0 is a
> special case and means "add here some other value" the pad dimensions - we are talking about
> non-copper pads - will change unpredictably. This works for normal Non Solder Mask Defined pads with
> copper, but not for pads which are mask only or paste only.
>
> The only possible solution ATM is to give very small clearance values so that the original size of a
> mask-only pad is for example 0.3x0.45mm and the efficient value will be 0.300001x0.450001mm. If the
> clearances are left to 0 they can be anything, depending on the project's values, and the footprint
> doesn't work anymore. Remember that modern Solder Mask Defined footprints are mostly very small and
> tolerances are small. You can't add or remove 0.05mm without it going wrong.
I perfectly understood what you are saying.
But I do not agree with you.
but if "You can't add or remove 0.05mm without it going wrong" it means the final board can be wrong.
Just because the solder mask opening areas can be not at the place you are expecting, due to
registration issues.
I am thinking you are not taking in account this problem.
If you are thinking this problem does not exist, just set the solder mask margin to 0
>
> See for example http://www.ti.com/lit/ug/slra003d/slra003d.pdf
>
> Eeli Kaikkonen
>
> 2018-04-28 10:28 GMT+03:00 jp charras <jp.charras@xxxxxxxxxx <mailto:jp.charras@xxxxxxxxxx>>:
>
> Some info about these masks:
>
> For custom shaped pads, building a solder mask shape with a negative margin can create issues
> (unpredictable shape for non convex polygons).
> So it is not allowed.
>
> Margin in solder mask layers is needed because there are always registration issues between the
> copper layers and the solder mask layer.
>
> Therefore, because the X and Y registration position error, you need a actual mask size bigger than
> the area defined by a pad, to be sure the actual solder mask does not cover the pad (the hole in
> mask always covers the pad area).
> X/Y max error depends on your board house, so this is the reason to have the registration tolerance
> defined for the whole board (unless you know your board house, you cannot reliably use a defined
> tolerance: it could be too small or too large)
>
> I am guessing there are also similar registration problems for the solder mask, but I don't know
> them.
>
> --
> Jean-Pierre CHARRAS
>
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--
Jean-Pierre CHARRAS
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