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Re: Bug 1754130

 

I agree that we should preserve as much information as possible.  So for
net classes that would be clearance, track width, via diameter, via
drill, uvia diameter, uvia drill, and all associated nets.  Everything
else will have to wait until our constraint system is in place.  If the
patch handles that, then it's something that would be worth looking at.

Cheers,

Wayne

On 1/10/2019 11:26 AM, Maciej Suminski wrote:
> Hi Mark,
> 
> I do not remember exactly how net classes work in Eagle, but if you can
> specify there anything that is supported by KiCad (track width, via
> size, etc.) then it makes sense to handle at least that part. We can
> implement the remaining settings as soon as the DRC receives the planned
> upgrade.
> 
> Cheers,
> Orson
> 
> On 1/10/19 3:56 PM, Wayne Stambaugh wrote:
>> Hi Mark,
>>
>> Thanks for the information.  Part of version 6 development is to design
>> a better constraint system which netclass to netclass clearance will
>> most likely be included.  At that point, importing this form Eagle will
>> make sense assuming your assessment is correct.  This obviously requires
>> a file format change which which would violate the project policy of not
>> making file format changes during a stable version series.  I will
>> change the bug report milestone to v6 unless someone else can think of a
>> reason to not change it.
>>
>> Cheers,
>>
>> Wayne
>>
>> On 1/10/2019 1:42 AM, mdoesbur@xxxxxxxxx wrote:
>>> I just had a look at the pending buglist and saw  #1754130 Eagle import
>>> ignores net class and net class settings.
>>>
>>> I have a patch for that, but the reason I did not post it, is because
>>> it is pretty useless (for me at least). Kicad does not support setting
>>> netclass to netclass clearances, but eagle does. Also the netnames are
>>> changed at the first conversion from schematic to PCB.
>>>
>>> If there still interest in this patch, I can (clean it up and) post it.
>>>
>>> regards,
>>>
>>> Mark.
>>>
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>>
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> 
> 
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