kicad-developers team mailing list archive

["Frank Severinsen" <frank@xxxxxxxxxxxxxxxxxxxxxxxx>]

Hi Guys

I'm currently attempting to add a smarter way of doing via stitching/fill.
My plan is to make a new zone style, which will add vias in a preselected grid, wherever DRC allows to.
(related bug reports here: <https://bugs.launchpad.net/kicad/+bug/1754001> & <https://bugs.launchpad.net/kicad/+bug/1754001> )
More on this when it might seem likely I'll ever finish it.

Since I'm quite new at this, I'm trying to break it in to smaller pieces.
First thing is to have the hasDRCViolation( VIA* aVia ) function handle the minimum hole to hole distance set in DRC settings.

I have attached a patch which should add this functionality.

Any advice, critique etc is more than welcome.

PS:
When using clang-format on the entire file, it more or less changed every line in one way or another.

should this be committed as well or is git clutter worse than codingstyle issues?
kindest regards

Frank Severinsen

From 4870ecae05c55f192aa14df3cd88864ff8dd10fa Mon Sep 17 00:00:00 2001
From: Frank Severinsen <Frank.severinsen@xxxxxxxxx>
Date: Tue, 21 May 2019 00:28:03 +0200
Subject: [PATCH] Added Minimum hole to hole distance checking in via placing
MIME-Version: 1.0
Content-Type: multipart/mixed; boundary="------------2.20.1"

This is a multi-part message in MIME format.
--------------2.20.1
Content-Type: text/plain; charset=UTF-8; format=fixed
Content-Transfer-Encoding: 8bit

---
 pcbnew/tools/drawing_tool.cpp | 42 ++++++++++++++++++++++++-----------
 1 file changed, 29 insertions(+), 13 deletions(-)


--------------2.20.1
Content-Type: text/x-patch; name="0001-Added-Minimum-hole-to-hole-distance-checking-in-via-.patch"
Content-Transfer-Encoding: 8bit
Content-Disposition: attachment; filename="0001-Added-Minimum-hole-to-hole-distance-checking-in-via-.patch"

diff --git a/pcbnew/tools/drawing_tool.cpp b/pcbnew/tools/drawing_tool.cpp
index b7f4f8345..e9a845535 100644
--- a/pcbnew/tools/drawing_tool.cpp
+++ b/pcbnew/tools/drawing_tool.cpp
@@ -750,7 +750,7 @@ int DRAWING_TOOL::DrawGraphicPolygon( const TOOL_EVENT& aEvent )
     SCOPED_DRAW_MODE scopedDrawMode( m_mode, MODE::GRAPHIC_POLYGON );
 
     m_frame->SetToolID( m_editModules ? ID_MODEDIT_POLYGON_TOOL : ID_PCB_ADD_POLYGON_BUTT,
-                        wxCURSOR_PENCIL, _( "Add graphic polygon" ) );
+            wxCURSOR_PENCIL, _( "Add graphic polygon" ) );
 
     return drawZone( false, ZONE_MODE::GRAPHIC_POLYGON );
 }
@@ -1531,13 +1531,13 @@ int DRAWING_TOOL::DrawVia( const TOOL_EVENT& aEvent )
             {
                 BOARD_ITEM* item = static_cast<BOARD_ITEM*>( it.first );
 
-                if( !(item->GetLayerSet() & lset ).any() )
+                if( !( item->GetLayerSet() & lset ).any() )
                     continue;
 
                 if( auto track = dyn_cast<TRACK*>( item ) )
                 {
                     if( TestSegmentHit( aVia->GetPosition(), track->GetStart(), track->GetEnd(),
-                                        ( track->GetWidth() + aVia->GetWidth() ) / 2 ) )
+                                ( track->GetWidth() + aVia->GetWidth() ) / 2 ) )
                         possible_tracks.push_back( track );
                 }
             }
@@ -1572,6 +1572,9 @@ int DRAWING_TOOL::DrawVia( const TOOL_EVENT& aEvent )
 
             view->Query( bbox, items );
 
+            int holeToHoleMin = m_frame->GetBoard()->GetDesignSettings().m_HoleToHoleMin;
+
+
             for( auto it : items )
             {
                 BOARD_ITEM* item = static_cast<BOARD_ITEM*>( it.first );
@@ -1594,7 +1597,16 @@ int DRAWING_TOOL::DrawVia( const TOOL_EVENT& aEvent )
                     }
                 }
 
-                if( auto mod = dyn_cast<MODULE*>( item ) )
+                if( auto via = dynamic_cast<VIA*>( item ) )
+                {
+                    if( KiROUND( GetLineLength( aVia->GetPosition(), via->GetPosition() ) )
+                            < aVia->GetDrillValue() / 2 + via->GetDrillValue() / 2 + holeToHoleMin )
+                    {
+                        return true;
+                    }
+                }
+
+                if( auto mod = dynamic_cast<MODULE*>( item ) )
                 {
                     for( auto pad : mod->Pads() )
                     {
@@ -1608,14 +1620,22 @@ int DRAWING_TOOL::DrawVia( const TOOL_EVENT& aEvent )
                             net = pad->GetNetCode();
                             clearance = pad->GetClearance();
                         }
+                        if( pad->GetDrillSize().x
+                                && pad->GetDrillShape() == PAD_DRILL_SHAPE_CIRCLE )
+                        {
+                            if( KiROUND( GetLineLength( aVia->GetPosition(), pad->GetPosition() ) )
+                                    < aVia->GetDrillValue() / 2 + pad->GetDrillSize().x / 2
+                                              + holeToHoleMin )
+                            {
+                                return true;
+                            }
+                        }
                     }
                 }
             }
-
             return false;
         }
 
-
         int findStitchedZoneNet( VIA* aVia )
         {
             const auto  pos     = aVia->GetPosition();
@@ -1788,15 +1808,14 @@ int DRAWING_TOOL::DrawVia( const TOOL_EVENT& aEvent )
 
     frame()->SetToolID( ID_PCB_DRAW_VIA_BUTT, wxCURSOR_PENCIL, _( "Add vias" ) );
 
-    doInteractiveItemPlacement( &placer, _( "Place via" ),
-            IPO_REPEAT | IPO_SINGLE_CLICK | IPO_ROTATE | IPO_FLIP );
+    doInteractiveItemPlacement(
+            &placer, _( "Place via" ), IPO_REPEAT | IPO_SINGLE_CLICK | IPO_ROTATE | IPO_FLIP );
 
     frame()->SetToolID( ID_NO_TOOL_SELECTED, wxCURSOR_DEFAULT, wxEmptyString );
 
     return 0;
 }
 
-
 void DRAWING_TOOL::setTransitions()
 {
     Go( &DRAWING_TOOL::DrawLine, PCB_ACTIONS::drawLine.MakeEvent() );
@@ -1814,20 +1833,18 @@ void DRAWING_TOOL::setTransitions()
     Go( &DRAWING_TOOL::SetAnchor, PCB_ACTIONS::setAnchor.MakeEvent() );
 }
 
-
 int DRAWING_TOOL::getSegmentWidth( PCB_LAYER_ID aLayer ) const
 {
     assert( m_board );
     return m_board->GetDesignSettings().GetLineThickness( aLayer );
 }
 
-
 PCB_LAYER_ID DRAWING_TOOL::getDrawingLayer() const
 {
     PCB_LAYER_ID layer = m_frame->GetActiveLayer();
 
     if( ( GetDrawingMode() == MODE::DIMENSION || GetDrawingMode() == MODE::GRAPHIC_POLYGON )
-        && IsCopperLayer( layer ) )
+            && IsCopperLayer( layer ) )
     {
         if( layer == F_Cu )
             layer = F_SilkS;
@@ -1842,5 +1859,4 @@ PCB_LAYER_ID DRAWING_TOOL::getDrawingLayer() const
     return layer;
 }
 
-
 const unsigned int DRAWING_TOOL::WIDTH_STEP = Millimeter2iu( 0.1 );

--------------2.20.1--