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Re: [PATCH] Eeschema: simulator: use dotted traces for current and phase.

 

This is probably introducing major feature creep, but it would be nice to
develop a dialog that allows setting the per-trace characteristics (such as
color, line type, line width, etc) that this could go in. Where we put the
accessors to it, I am not sure (it would be great if we could link it with
the legend fields). Then we can add in more configuration options there as
we implement them.

-Ian

On Thu, Nov 21, 2019 at 5:26 PM Wayne Stambaugh <stambaughw@xxxxxxxxx>
wrote:

> Hi Jonatan,
>
> I just tested this and it seems to work as expected although I'm
> thinking it might be a good idea to make this a configuration option
> rather than the only behavior.  Users might not find this desirable.
> Anyone else have any thoughts on this?  For future reference, when you
> are going to make behavioral changes to KiCad, please ping the dev
> mailing list first for feedback.  I would have made the option
> suggestion before you began coding.
>
> Cheers,
>
> Wayne
>
> On 11/19/19 11:30 AM, Jonatan Liljedahl wrote:
> > This patch makes it easier to visually keep apart traces for current
> > vs voltage and phase vs magnitude, by using dotted line style for
> > current and phase traces.
> >
> > To get the dotted style drawn correctly, I had to switch from drawing
> > each trace line segment individually to creating an array and then
> > using DrawLines() on it, so that the whole trace is one continuous
> > line.
> >
> >
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