linaro-pm-wg team mailing list archive

[Amit Kucheria <amit.kucheria@xxxxxxxxxxxxx>]

Blueprint changed by Amit Kucheria:

Whiteboard changed:
  Status:
  In Progress
+ 
+ Focus has moved to first getting various cpuidle implementations into
+ mainline before trying to optimise them.
  
  Work Items:
  [vishwanath-bs] cpuidle: Problem statement wrt to instrumentation to automate calculation of latencies: DONE
  [vishwanath-bs] cpuidle: Add  tracepoint instrumentation for automated calculation of idile-state latency: DONE
  [vishwanath-bs] cpuidle: Clean up assembly code for ARM context save and restore for OMAP3: DONE
  [vishwanath-bs] cpuidle: Post the patches to opensource for review and rework based on comments: DONE
  
  [vishwanath-bs] cpuidle: add power trace events in appropriate places and measure latencies for all C states on OMAP3: DONE
- [vishwanath-bs] cpuidle: Upstream OMAP3 latency changes: BLOCKED
+ [vishwanath-bs] cpuidle: Upstream OMAP3 latency changes: DONE
  [vishwanath-bs] cpuidle: Clean up assembly code for ARM context save and restore for OMAP4 (to be done in OMAP4 TI internal tree as OMAP4 cpuidle code is not upstreamed yet): DONE
  [vishwanath-bs] cpuidle: add power trace events in appropriate places and measure latencies for all C states on OMAP4 (to be done in OMAP4 TI internal tree as OMAP4 cpuidle code is not upstreamed yet): DONE
  [vincent-guittot] cpuidle: Investigate on trace point hooks for CPU Idle latencies on ST-Ericsson SOCs: POSTPONED
  [vincent-guittot] cpuidle: Implement  and measure cpuidle laencies using trace points on ST-Ericsson SOCs: POSTPONED
  [vishwanath-bs] cpuidle: Follow up with implementations on ST-Ericsson and Freescale SOCs and make sure they are in line with aligned approach: POSTPONED

-- 
Framework to measure latency for various cpuidle states for ARM
https://blueprints.launchpad.net/linaro-pm-wg/+spec/cpuidle-latency-infrastructure