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Message #05683
Re: Some questions about the Aarch64 CI
On Mon, 25 Nov 2019 11:32:07 +0200
Marko Mäkelä <marko.makela@xxxxxxxxxxx> wrote:
> I also found a claim that POWER8 supports unaligned access,
This is correct (for the normal cacheable memory (i.e. not device IO mapped - so not applicable to mariadb))
> and I seem
> to remember that the latest version of the SPARC introduced support
> for that as well. (IA-32 and AMD64 have always supported unaligned
> access, except for some SIMD operations.)
>
> Last, I believe that we could get some performance benefits if
> include/byte_order_generic.h was rewritten in a suitable way. Ideally,
> include/byte_order_generic_x86_64.h would be replaced with a portable
> version of both, and compilers could simply perform the optimizations.
> I have been told that replacing the + in the macros with | could
> already be a good start. I would welcome patches in this area.
I've never managed to get the time to look at these however a non-aligned version for non-common arches seems a better way to model this.
> Related note: Maybe a year ago, I was positively surprised to learn
> that the InnoDB monster function mach_read_from_4() is being
> translated into a single 80486 BSWAP instruction, or an AMD64 MOVBE
> instruction.
Yes, compilers are getting pretty good as are libc implementations of occasionally re-invented code (threads, mutexes, copy functions etc.).
Daniel Black
IBM Power systems
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