sslug-teknik team mailing list archive
-
sslug-teknik team
-
Mailing list archive
-
Message #09084
Re: soundblaster
# $Id: pnpdump.c,v 1.16 1998/10/09 22:19:06 fox Exp $
# This is free software, see the sources for details.
# This software has NO WARRANTY, use at your OWN RISK
#
# For details of this file format, see isapnp.conf(5)
#
# For latest information on isapnp and pnpdump see:
# http://www.roestock.demon.co.uk/isapnptools/
#
# Compiler flags: -DREALTIME -DNEEDSETSCHEDULER
#
# Trying port address 0203
# Trying port address 020b
# Trying port address 0213
# Board 1 has serial identifier 92 00 03 eb 2a 9d 00 8c 0e
# (DEBUG)
(READPORT 0x0213)
(ISOLATE PRESERVE)
(IDENTIFY *)
(VERBOSITY 2)
(CONFLICT (IO FATAL)(IRQ FATAL)(DMA FATAL)(MEM FATAL)) # or WARNING
# Card 1: (serial identifier b1 12 5e db d9 e4 00 8c 0e)
# Vendor Id CTL00e4, Serial Number 308206553, checksum 0xB1.
# Version 1.0, Vendor version 1.0
# ANSI string -->Creative SB AWE64 PnP<--
# Vendor defined tag: 73 02 45 20
#
# Logical device id CTL0045
# Device supports vendor reserved register @ 0x39
# Device supports vendor reserved register @ 0x3a
# Device supports vendor reserved register @ 0x3e
#
# Edit the entries below to uncomment out the configuration required.
# Note that only the first value of any range is given, this may be changed if required
# Don't forget to uncomment the activate (ACT Y) when happy
(CONFIGURE CTL00e4/308206553 (LD 0
# ANSI string -->Audio<--
# Multiple choice time, choose one only !
# Start dependent functions: priority preferred
# IRQ 5.
# High true, edge sensitive interrupt (by default)
# (INT 0 (IRQ 5 (MODE +E)))
# First DMA channel 1.
# 8 bit DMA only
# Logical device is not a bus master
# DMA may execute in count by byte mode
# DMA may not execute in count by word mode
# DMA channel speed in compatible mode
# (DMA 0 (CHANNEL 1))
# Next DMA channel 5.
# 16 bit DMA only
# Logical device is not a bus master
# DMA may not execute in count by byte mode
# DMA may execute in count by word mode
# DMA channel speed in compatible mode
# (DMA 1 (CHANNEL 5))
# Logical device decodes 16 bit IO address lines
# Minimum IO base address 0x0220
# Maximum IO base address 0x0220
# IO base alignment 1 bytes
# Number of IO addresses required: 16
# (IO 0 (SIZE 16) (BASE 0x0220))
# Logical device decodes 16 bit IO address lines
# Minimum IO base address 0x0330
# Maximum IO base address 0x0330
# IO base alignment 1 bytes
# Number of IO addresses required: 2
# (IO 1 (SIZE 2) (BASE 0x0330))
# Logical device decodes 16 bit IO address lines
# Minimum IO base address 0x0388
# Maximum IO base address 0x0388
# IO base alignment 1 bytes
# Number of IO addresses required: 4
# (IO 2 (SIZE 4) (BASE 0x0388))
# Start dependent functions: priority acceptable
# IRQ 5, 7, 9 or 10.
# High true, edge sensitive interrupt (by default)
(INT 0 (IRQ 7 (MODE +E)))
# First DMA channel 0, 1 or 3.
# 8 bit DMA only
# Logical device is not a bus master
# DMA may execute in count by byte mode
# DMA may not execute in count by word mode
# DMA channel speed in compatible mode
(DMA 0 (CHANNEL 0))
# Next DMA channel 5, 6 or 7.
# 16 bit DMA only
# Logical device is not a bus master
# DMA may not execute in count by byte mode
# DMA may execute in count by word mode
# DMA channel speed in compatible mode
(DMA 1 (CHANNEL 5))
# Logical device decodes 16 bit IO address lines
# Minimum IO base address 0x0220
# Maximum IO base address 0x0280
# IO base alignment 32 bytes
# Number of IO addresses required: 16
(IO 0 (SIZE 16) (BASE 0x0220))
# Logical device decodes 16 bit IO address lines
# Minimum IO base address 0x0300
# Maximum IO base address 0x0330
# IO base alignment 48 bytes
# Number of IO addresses required: 2
(IO 1 (SIZE 2) (BASE 0x0300))
# Logical device decodes 16 bit IO address lines
# Minimum IO base address 0x0388
# Maximum IO base address 0x0388
# IO base alignment 1 bytes
# Number of IO addresses required: 4
(IO 2 (SIZE 4) (BASE 0x0388))
# Start dependent functions: priority acceptable
# IRQ 5, 7, 9 or 10.
# High true, edge sensitive interrupt (by default)
# (INT 0 (IRQ 5 (MODE +E)))
# First DMA channel 0, 1 or 3.
# 8 bit DMA only
# Logical device is not a bus master
# DMA may execute in count by byte mode
# DMA may not execute in count by word mode
# DMA channel speed in compatible mode
# (DMA 0 (CHANNEL 0))
# Next DMA channel 5, 6 or 7.
# 16 bit DMA only
# Logical device is not a bus master
# DMA may not execute in count by byte mode
# DMA may execute in count by word mode
# DMA channel speed in compatible mode
# (DMA 1 (CHANNEL 5))
# Logical device decodes 16 bit IO address lines
# Minimum IO base address 0x0220
# Maximum IO base address 0x0280
# IO base alignment 32 bytes
# Number of IO addresses required: 16
# (IO 0 (SIZE 16) (BASE 0x0220))
# Logical device decodes 16 bit IO address lines
# Minimum IO base address 0x0300
# Maximum IO base address 0x0330
# IO base alignment 48 bytes
# Number of IO addresses required: 2
# (IO 1 (SIZE 2) (BASE 0x0300))
# Start dependent functions: priority acceptable
# IRQ 5, 7, 9 or 10.
# High true, edge sensitive interrupt (by default)
# (INT 0 (IRQ 5 (MODE +E)))
# First DMA channel 0, 1 or 3.
# 8 bit DMA only
# Logical device is not a bus master
# DMA may execute in count by byte mode
# DMA may not execute in count by word mode
# DMA channel speed in compatible mode
# (DMA 0 (CHANNEL 0))
# Next DMA channel 5, 6 or 7.
# 16 bit DMA only
# Logical device is not a bus master
# DMA may not execute in count by byte mode
# DMA may execute in count by word mode
# DMA channel speed in compatible mode
# (DMA 1 (CHANNEL 5))
# Logical device decodes 16 bit IO address lines
# Minimum IO base address 0x0220
# Maximum IO base address 0x0280
# IO base alignment 32 bytes
# Number of IO addresses required: 16
# (IO 0 (SIZE 16) (BASE 0x0220))
# Start dependent functions: priority acceptable
# IRQ 5, 7, 9 or 10.
# High true, edge sensitive interrupt (by default)
# (INT 0 (IRQ 5 (MODE +E)))
# First DMA channel 0, 1 or 3.
# 8 bit DMA only
# Logical device is not a bus master
# DMA may execute in count by byte mode
# DMA may not execute in count by word mode
# DMA channel speed in compatible mode
# (DMA 0 (CHANNEL 0))
# Logical device decodes 16 bit IO address lines
# Minimum IO base address 0x0220
# Maximum IO base address 0x0280
# IO base alignment 32 bytes
# Number of IO addresses required: 16
# (IO 0 (SIZE 16) (BASE 0x0220))
# Logical device decodes 16 bit IO address lines
# Minimum IO base address 0x0300
# Maximum IO base address 0x0330
# IO base alignment 48 bytes
# Number of IO addresses required: 2
# (IO 1 (SIZE 2) (BASE 0x0300))
# Logical device decodes 16 bit IO address lines
# Minimum IO base address 0x0388
# Maximum IO base address 0x0388
# IO base alignment 1 bytes
# Number of IO addresses required: 4
# (IO 2 (SIZE 4) (BASE 0x0388))
# Start dependent functions: priority acceptable
# IRQ 5, 7, 9 or 10.
# High true, edge sensitive interrupt (by default)
# (INT 0 (IRQ 5 (MODE +E)))
# First DMA channel 0, 1 or 3.
# 8 bit DMA only
# Logical device is not a bus master
# DMA may execute in count by byte mode
# DMA may not execute in count by word mode
# DMA channel speed in compatible mode
# (DMA 0 (CHANNEL 0))
# Logical device decodes 16 bit IO address lines
# Minimum IO base address 0x0220
# Maximum IO base address 0x0280
# IO base alignment 32 bytes
# Number of IO addresses required: 16
# (IO 0 (SIZE 16) (BASE 0x0220))
# Logical device decodes 16 bit IO address lines
# Minimum IO base address 0x0300
# Maximum IO base address 0x0330
# IO base alignment 48 bytes
# Number of IO addresses required: 2
# (IO 1 (SIZE 2) (BASE 0x0300))
# Start dependent functions: priority acceptable
# IRQ 5, 7, 9 or 10.
# High true, edge sensitive interrupt (by default)
# (INT 0 (IRQ 5 (MODE +E)))
# First DMA channel 0, 1 or 3.
# 8 bit DMA only
# Logical device is not a bus master
# DMA may execute in count by byte mode
# DMA may not execute in count by word mode
# DMA channel speed in compatible mode
# (DMA 0 (CHANNEL 0))
# Logical device decodes 16 bit IO address lines
# Minimum IO base address 0x0220
# Maximum IO base address 0x0280
# IO base alignment 32 bytes
# Number of IO addresses required: 16
# (IO 0 (SIZE 16) (BASE 0x0220))
# Start dependent functions: priority functional
# IRQ 5, 7, 9 or 10.
# High true, edge sensitive interrupt (by default)
# (INT 0 (IRQ 5 (MODE +E)))
# First DMA channel 0, 1 or 3.
# 8 bit DMA only
# Logical device is not a bus master
# DMA may execute in count by byte mode
# DMA may not execute in count by word mode
# DMA channel speed in compatible mode
# (DMA 0 (CHANNEL 0))
# Next DMA channel 5, 6 or 7.
# 16 bit DMA only
# Logical device is not a bus master
# DMA may not execute in count by byte mode
# DMA may execute in count by word mode
# DMA channel speed in compatible mode
# (DMA 1 (CHANNEL 5))
# Logical device decodes 16 bit IO address lines
# Minimum IO base address 0x0220
# Maximum IO base address 0x0280
# IO base alignment 32 bytes
# Number of IO addresses required: 16
# (IO 0 (SIZE 16) (BASE 0x0220))
# Logical device decodes 16 bit IO address lines
# Minimum IO base address 0x0300
# Maximum IO base address 0x0330
# IO base alignment 16 bytes
# Number of IO addresses required: 2
# (IO 1 (SIZE 2) (BASE 0x0300))
# Logical device decodes 16 bit IO address lines
# Minimum IO base address 0x0388
# Maximum IO base address 0x0394
# IO base alignment 4 bytes
# Number of IO addresses required: 4
# (IO 2 (SIZE 4) (BASE 0x0388))
(NAME "CTL00e4/308206553[0]{Audio }")
# End dependent functions
(ACT Y)
))
#
# Logical device id CTL7002
# Device supports vendor reserved register @ 0x39
# Device supports vendor reserved register @ 0x3a
# Device supports vendor reserved register @ 0x3e
#
# Edit the entries below to uncomment out the configuration required.
# Note that only the first value of any range is given, this may be changed if required
# Don't forget to uncomment the activate (ACT Y) when happy
(CONFIGURE CTL00e4/308206553 (LD 1
# Compatible device id PNPb02f
# ANSI string -->Game<--
# Multiple choice time, choose one only !
# Start dependent functions: priority preferred
# Logical device decodes 16 bit IO address lines
# Minimum IO base address 0x0200
# Maximum IO base address 0x0200
# IO base alignment 1 bytes
# Number of IO addresses required: 8
(IO 0 (SIZE 8) (BASE 0x0200))
# Start dependent functions: priority acceptable
# Logical device decodes 16 bit IO address lines
# Minimum IO base address 0x0200
# Maximum IO base address 0x0208
# IO base alignment 8 bytes
# Number of IO addresses required: 8
# (IO 0 (SIZE 8) (BASE 0x0200))
(NAME "CTL00e4/308206553[1]{Game }")
# End dependent functions
(ACT Y)
))
#
# Logical device id CTL0022
# Device supports vendor reserved register @ 0x39
# Device supports vendor reserved register @ 0x3a
# Device supports vendor reserved register @ 0x3e
#
# Edit the entries below to uncomment out the configuration required.
# Note that only the first value of any range is given, this may be changed if required
# Don't forget to uncomment the activate (ACT Y) when happy
(CONFIGURE CTL00e4/308206553 (LD 2
# ANSI string -->WaveTable<--
# Multiple choice time, choose one only !
# Start dependent functions: priority preferred
# Logical device decodes 16 bit IO address lines
# Minimum IO base address 0x0620
# Maximum IO base address 0x0620
# IO base alignment 1 bytes
# Number of IO addresses required: 4
(IO 0 (BASE 0x0620)) (IO 1 (BASE 0x0A20)) (IO 2 (BASE 0x0E20))
# Start dependent functions: priority acceptable
# Logical device decodes 16 bit IO address lines
# Minimum IO base address 0x0620
# Maximum IO base address 0x0680
# IO base alignment 32 bytes
# Number of IO addresses required: 4
# (IO 0 (SIZE 4) (BASE 0x0620))
(NAME "CTL00e4/308206553[2]{WaveTable }")
# End dependent functions
# Vendor defined tag: 75 01 69 46 35 55
(ACT Y)
))
# End tag... Checksum 0x00 (OK)
# Card 1: (serial identifier 92 00 03 eb 2a 9d 00 8c 0e)
# Vendor Id CTL009d, Serial Number 256810, checksum 0x92.
# Version 1.0, Vendor version 2.0
# ANSI string -->Creative SB AWE64 PnP<--
#
# Logical device id CTL0042
# Device supports vendor reserved register @ 0x38
# Device supports vendor reserved register @ 0x39
# Device supports vendor reserved register @ 0x3d
# Device supports vendor reserved register @ 0x3e
#
# Edit the entries below to uncomment out the configuration required.
# Note that only the first value of any range is given, this may be changed if required
# Don't forget to uncomment the activate (ACT Y) when happy
(CONFIGURE CTL009d/256810 (LD 0
# ANSI string -->Audio<--
# Multiple choice time, choose one only !
# Start dependent functions: priority preferred
# IRQ 5.
# High true, edge sensitive interrupt (by default)
# (INT 0 (IRQ 5 (MODE +E)))
# First DMA channel 1.
# 8 bit DMA only
# Logical device is not a bus master
# DMA may execute in count by byte mode
# DMA may not execute in count by word mode
# DMA channel speed in compatible mode
# (DMA 0 (CHANNEL 1))
# Next DMA channel 5.
# 16 bit DMA only
# Logical device is not a bus master
# DMA may not execute in count by byte mode
# DMA may execute in count by word mode
# DMA channel speed in compatible mode
# (DMA 1 (CHANNEL 5))
# Logical device decodes 16 bit IO address lines
# Minimum IO base address 0x0220
# Maximum IO base address 0x0220
# IO base alignment 1 bytes
# Number of IO addresses required: 16
# (IO 0 (SIZE 16) (BASE 0x0220))
# Logical device decodes 16 bit IO address lines
# Minimum IO base address 0x0330
# Maximum IO base address 0x0330
# IO base alignment 1 bytes
# Number of IO addresses required: 2
# (IO 1 (SIZE 2) (BASE 0x0330))
# Logical device decodes 16 bit IO address lines
# Minimum IO base address 0x0388
# Maximum IO base address 0x0388
# IO base alignment 1 bytes
# Number of IO addresses required: 4
# (IO 2 (SIZE 4) (BASE 0x0388))
# Start dependent functions: priority acceptable
# IRQ 5, 7, 9 or 10.
# High true, edge sensitive interrupt (by default)
(INT 0 (IRQ 7 (MODE +E)))
# First DMA channel 0, 1 or 3.
# 8 bit DMA only
# Logical device is not a bus master
# DMA may execute in count by byte mode
# DMA may not execute in count by word mode
# DMA channel speed in compatible mode
(DMA 0 (CHANNEL 0))
# Next DMA channel 5, 6 or 7.
# 16 bit DMA only
# Logical device is not a bus master
# DMA may not execute in count by byte mode
# DMA may execute in count by word mode
# DMA channel speed in compatible mode
(DMA 1 (CHANNEL 5))
# Logical device decodes 16 bit IO address lines
# Minimum IO base address 0x0220
# Maximum IO base address 0x0280
# IO base alignment 32 bytes
# Number of IO addresses required: 16
(IO 0 (SIZE 16) (BASE 0x0220))
# Logical device decodes 16 bit IO address lines
# Minimum IO base address 0x0300
# Maximum IO base address 0x0330
# IO base alignment 48 bytes
# Number of IO addresses required: 2
(IO 1 (SIZE 2) (BASE 0x0300))
# Logical device decodes 16 bit IO address lines
# Minimum IO base address 0x0388
# Maximum IO base address 0x0388
# IO base alignment 1 bytes
# Number of IO addresses required: 4
(IO 2 (SIZE 4) (BASE 0x0388))
# Start dependent functions: priority acceptable
# IRQ 5, 7, 9 or 10.
# High true, edge sensitive interrupt (by default)
# (INT 0 (IRQ 5 (MODE +E)))
# First DMA channel 0, 1 or 3.
# 8 bit DMA only
# Logical device is not a bus master
# DMA may execute in count by byte mode
# DMA may not execute in count by word mode
# DMA channel speed in compatible mode
# (DMA 0 (CHANNEL 0))
# Next DMA channel 5, 6 or 7.
# 16 bit DMA only
# Logical device is not a bus master
# DMA may not execute in count by byte mode
# DMA may execute in count by word mode
# DMA channel speed in compatible mode
# (DMA 1 (CHANNEL 5))
# Logical device decodes 16 bit IO address lines
# Minimum IO base address 0x0220
# Maximum IO base address 0x0280
# IO base alignment 32 bytes
# Number of IO addresses required: 16
# (IO 0 (SIZE 16) (BASE 0x0220))
# Logical device decodes 16 bit IO address lines
# Minimum IO base address 0x0300
# Maximum IO base address 0x0330
# IO base alignment 48 bytes
# Number of IO addresses required: 2
# (IO 1 (SIZE 2) (BASE 0x0300))
# Start dependent functions: priority acceptable
# IRQ 5, 7, 9 or 10.
# High true, edge sensitive interrupt (by default)
# (INT 0 (IRQ 5 (MODE +E)))
# First DMA channel 0, 1 or 3.
# 8 bit DMA only
# Logical device is not a bus master
# DMA may execute in count by byte mode
# DMA may not execute in count by word mode
# DMA channel speed in compatible mode
# (DMA 0 (CHANNEL 0))
# Next DMA channel 5, 6 or 7.
# 16 bit DMA only
# Logical device is not a bus master
# DMA may not execute in count by byte mode
# DMA may execute in count by word mode
# DMA channel speed in compatible mode
# (DMA 1 (CHANNEL 5))
# Logical device decodes 16 bit IO address lines
# Minimum IO base address 0x0220
# Maximum IO base address 0x0280
# IO base alignment 32 bytes
# Number of IO addresses required: 16
# (IO 0 (SIZE 16) (BASE 0x0220))
# Start dependent functions: priority acceptable
# IRQ 5, 7, 9 or 10.
# High true, edge sensitive interrupt (by default)
# (INT 0 (IRQ 5 (MODE +E)))
# First DMA channel 0, 1 or 3.
# 8 bit DMA only
# Logical device is not a bus master
# DMA may execute in count by byte mode
# DMA may not execute in count by word mode
# DMA channel speed in compatible mode
# (DMA 0 (CHANNEL 0))
# Logical device decodes 16 bit IO address lines
# Minimum IO base address 0x0220
# Maximum IO base address 0x0280
# IO base alignment 32 bytes
# Number of IO addresses required: 16
# (IO 0 (SIZE 16) (BASE 0x0220))
# Logical device decodes 16 bit IO address lines
# Minimum IO base address 0x0300
# Maximum IO base address 0x0330
# IO base alignment 48 bytes
# Number of IO addresses required: 2
# (IO 1 (SIZE 2) (BASE 0x0300))
# Logical device decodes 16 bit IO address lines
# Minimum IO base address 0x0388
# Maximum IO base address 0x0388
# IO base alignment 1 bytes
# Number of IO addresses required: 4
# (IO 2 (SIZE 4) (BASE 0x0388))
# Start dependent functions: priority acceptable
# IRQ 5, 7, 9 or 10.
# High true, edge sensitive interrupt (by default)
# (INT 0 (IRQ 5 (MODE +E)))
# First DMA channel 0, 1 or 3.
# 8 bit DMA only
# Logical device is not a bus master
# DMA may execute in count by byte mode
# DMA may not execute in count by word mode
# DMA channel speed in compatible mode
# (DMA 0 (CHANNEL 0))
# Logical device decodes 16 bit IO address lines
# Minimum IO base address 0x0220
# Maximum IO base address 0x0280
# IO base alignment 32 bytes
# Number of IO addresses required: 16
# (IO 0 (SIZE 16) (BASE 0x0220))
# Logical device decodes 16 bit IO address lines
# Minimum IO base address 0x0300
# Maximum IO base address 0x0330
# IO base alignment 48 bytes
# Number of IO addresses required: 2
# (IO 1 (SIZE 2) (BASE 0x0300))
# Start dependent functions: priority acceptable
# IRQ 5, 7, 9 or 10.
# High true, edge sensitive interrupt (by default)
# (INT 0 (IRQ 5 (MODE +E)))
# First DMA channel 0, 1 or 3.
# 8 bit DMA only
# Logical device is not a bus master
# DMA may execute in count by byte mode
# DMA may not execute in count by word mode
# DMA channel speed in compatible mode
# (DMA 0 (CHANNEL 0))
# Logical device decodes 16 bit IO address lines
# Minimum IO base address 0x0220
# Maximum IO base address 0x0280
# IO base alignment 32 bytes
# Number of IO addresses required: 16
# (IO 0 (SIZE 16) (BASE 0x0220))
# Start dependent functions: priority functional
# IRQ 5, 7, 9 or 10.
# High true, edge sensitive interrupt (by default)
# (INT 0 (IRQ 5 (MODE +E)))
# First DMA channel 0, 1 or 3.
# 8 bit DMA only
# Logical device is not a bus master
# DMA may execute in count by byte mode
# DMA may not execute in count by word mode
# DMA channel speed in compatible mode
# (DMA 0 (CHANNEL 0))
# Next DMA channel 5, 6 or 7.
# 16 bit DMA only
# Logical device is not a bus master
# DMA may not execute in count by byte mode
# DMA may execute in count by word mode
# DMA channel speed in compatible mode
# (DMA 1 (CHANNEL 5))
# Logical device decodes 16 bit IO address lines
# Minimum IO base address 0x0220
# Maximum IO base address 0x0280
# IO base alignment 32 bytes
# Number of IO addresses required: 16
# (IO 0 (SIZE 16) (BASE 0x0220))
# Logical device decodes 16 bit IO address lines
# Minimum IO base address 0x0300
# Maximum IO base address 0x0330
# IO base alignment 16 bytes
# Number of IO addresses required: 2
# (IO 1 (SIZE 2) (BASE 0x0300))
# Logical device decodes 16 bit IO address lines
# Minimum IO base address 0x0388
# Maximum IO base address 0x0394
# IO base alignment 4 bytes
# Number of IO addresses required: 4
# (IO 2 (SIZE 4) (BASE 0x0388))
(NAME "CTL009d/256810[0]{Audio }")
# End dependent functions
(ACT Y)
))
#
# Logical device id CTL7002
# Device supports vendor reserved register @ 0x38
# Device supports vendor reserved register @ 0x39
# Device supports vendor reserved register @ 0x3d
# Device supports vendor reserved register @ 0x3e
#
# Edit the entries below to uncomment out the configuration required.
# Note that only the first value of any range is given, this may be changed if required
# Don't forget to uncomment the activate (ACT Y) when happy
(CONFIGURE CTL009d/256810 (LD 1
# Compatible device id PNPb02f
# ANSI string -->Game<--
# Multiple choice time, choose one only !
# Start dependent functions: priority preferred
# Logical device decodes 16 bit IO address lines
# Minimum IO base address 0x0200
# Maximum IO base address 0x0200
# IO base alignment 1 bytes
# Number of IO addresses required: 8
(IO 0 (SIZE 8) (BASE 0x0200))
# Start dependent functions: priority acceptable
# Logical device decodes 16 bit IO address lines
# Minimum IO base address 0x0200
# Maximum IO base address 0x0208
# IO base alignment 8 bytes
# Number of IO addresses required: 8
# (IO 0 (SIZE 8) (BASE 0x0200))
(NAME "CTL009d/256810[1]{Game }")
# End dependent functions
(ACT Y)
))
#
# Logical device id CTL0022
# Device supports vendor reserved register @ 0x38
# Device supports vendor reserved register @ 0x39
# Device supports vendor reserved register @ 0x3d
# Device supports vendor reserved register @ 0x3e
#
# Edit the entries below to uncomment out the configuration required.
# Note that only the first value of any range is given, this may be changed if required
# Don't forget to uncomment the activate (ACT Y) when happy
(CONFIGURE CTL009d/256810 (LD 2
# ANSI string -->WaveTable<--
# Multiple choice time, choose one only !
# Start dependent functions: priority preferred
# Logical device decodes 16 bit IO address lines
# Minimum IO base address 0x0620
# Maximum IO base address 0x0620
# IO base alignment 1 bytes
# Number of IO addresses required: 4
(IO 0 (BASE 0x0620)) (IO 1 (BASE 0x0A20)) (IO 2 (BASE 0x0E20))
# Start dependent functions: priority acceptable
# Logical device decodes 16 bit IO address lines
# Minimum IO base address 0x0620
# Maximum IO base address 0x0680
# IO base alignment 32 bytes
# Number of IO addresses required: 4
# (IO 0 (SIZE 4) (BASE 0x0620))
(NAME "CTL009d/256810[2]{WaveTable }")
# End dependent functions
(ACT Y)
))
#
# Logical device id CTL2011
# Device supports vendor reserved register @ 0x38
# Device supports vendor reserved register @ 0x39
# Device supports vendor reserved register @ 0x3d
# Device supports vendor reserved register @ 0x3e
#
# Edit the entries below to uncomment out the configuration required.
# Note that only the first value of any range is given, this may be changed if required
# Don't forget to uncomment the activate (ACT Y) when happy
(CONFIGURE CTL009d/256810 (LD 3
# Compatible device id PNP0600
# ANSI string -->IDE<--
#
# Multiple choice time, choose one only !
#
# Start dependent functions: priority preferred
# IRQ 10.
# High true, edge sensitive interrupt (by default)
# (INT 0 (IRQ 10 (MODE +E)))
# Logical device decodes 16 bit IO address lines
# Minimum IO base address 0x0168
# Maximum IO base address 0x0168
# IO base alignment 1 bytes
# Number of IO addresses required: 8
# (IO 0 (SIZE 8) (BASE 0x0168))
# Logical device decodes 16 bit IO address lines
# Minimum IO base address 0x036e
# Maximum IO base address 0x036e
# IO base alignment 1 bytes
# Number of IO addresses required: 2
# (IO 1 (SIZE 2) (BASE 0x036e))
#
# Start dependent functions: priority acceptable
# IRQ 11.
# High true, edge sensitive interrupt (by default)
# (INT 0 (IRQ 11 (MODE +E)))
# Logical device decodes 16 bit IO address lines
# Minimum IO base address 0x01e8
# Maximum IO base address 0x01e8
# IO base alignment 1 bytes
# Number of IO addresses required: 8
# (IO 0 (SIZE 8) (BASE 0x01e8))
# Logical device decodes 16 bit IO address lines
# Minimum IO base address 0x03ee
# Maximum IO base address 0x03ee
# IO base alignment 1 bytes
# Number of IO addresses required: 2
# (IO 1 (SIZE 2) (BASE 0x03ee))
#
# Start dependent functions: priority acceptable
# IRQ 10, 11, 12 or 15.
# High true, edge sensitive interrupt (by default)
# (INT 0 (IRQ 10 (MODE +E)))
# Logical device decodes 16 bit IO address lines
# Minimum IO base address 0x0180
# Maximum IO base address 0x01b8
# IO base alignment 8 bytes
# Number of IO addresses required: 8
# (IO 0 (SIZE 8) (BASE 0x0180))
# Logical device decodes 16 bit IO address lines
# Minimum IO base address 0x0306
# Maximum IO base address 0x033e
# IO base alignment 8 bytes
# Number of IO addresses required: 2
# (IO 1 (SIZE 2) (BASE 0x0306))
#
# Start dependent functions: priority functional
# IRQ 15.
# High true, edge sensitive interrupt (by default)
# (INT 0 (IRQ 15 (MODE +E)))
# Logical device decodes 16 bit IO address lines
# Minimum IO base address 0x0170
# Maximum IO base address 0x0170
# IO base alignment 1 bytes
# Number of IO addresses required: 8
# (IO 0 (SIZE 8) (BASE 0x0170))
# Logical device decodes 16 bit IO address lines
# Minimum IO base address 0x0376
# Maximum IO base address 0x0376
# IO base alignment 1 bytes
# Number of IO addresses required: 1
# (IO 1 (SIZE 1) (BASE 0x0376))
# (NAME "CTL009d/256810[3]{IDE }")
#
# End dependent functions
# (ACT Y)
))
# Returns all cards to the "Wait for Key" state
(WAITFORKEY)
References
