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Message #00002
[PATCH] comments: replace c++ comments with c89
From: Du Huanpeng <u74147@xxxxxxxxx>
checked line bye line and the output image is the some
with origianl.
these files below are changed:
driver/tef_em1d/clk/src/em1d512_iic.c
driver/tef_em1d/clk/src/em1d512_spi.c
driver/tef_em1d/clk/src/rtc.c
driver/tef_em1d/kbpd/src/kbpd.h
driver/tef_em1d/kbpd/src/key.c
driver/tef_em1d/lowkbpd/src/hwkbpd.c
driver/tef_em1d/screen/src/common.c
driver/tef_em1d/screen/src/em1d512.c
include/device/em1d512_iic.h
include/device/screen.h
include/tk/sysdepend/tef_em1d/asm_depend.h
monitor/cmdsvc/src/armv6/break.c
monitor/cmdsvc/src/armv6/chkaddr.c
monitor/cmdsvc/src/armv6/disassemble.c
monitor/cmdsvc/src/armv6/register.c
monitor/cmdsvc/src/armv6/step.c
monitor/cmdsvc/src/command.c
monitor/cmdsvc/src/console.c
monitor/cmdsvc/src/load.c
monitor/cmdsvc/src/memory.c
monitor/driver/flash/src/cfi_16x1.c
monitor/driver/flash/src/reset-em1d.c
monitor/driver/sio/src/ns16550.c
monitor/hwdepend/tef_em1d/src/config.c
monitor/hwdepend/tef_em1d/src/cpuctrl.c
monitor/hwdepend/tef_em1d/src/setup_em1d512.h
monitor/hwdepend/tef_em1d/src/system.c
monitor/hwdepend/tef_em1d/src/waitusec.c
Signed-off-by: Du Huanpeng <u74147@xxxxxxxxx>
---
.../driver/tef_em1d/clk/src/em1d512_iic.c | 12 +-
.../driver/tef_em1d/clk/src/em1d512_spi.c | 12 +-
tkernel_source/driver/tef_em1d/clk/src/rtc.c | 10 +-
tkernel_source/driver/tef_em1d/kbpd/src/kbpd.h | 2 +-
tkernel_source/driver/tef_em1d/kbpd/src/key.c | 2 +-
.../driver/tef_em1d/lowkbpd/src/hwkbpd.c | 42 +--
tkernel_source/driver/tef_em1d/screen/src/common.c | 18 +-
.../driver/tef_em1d/screen/src/em1d512.c | 56 ++--
tkernel_source/include/device/em1d512_iic.h | 12 +-
tkernel_source/include/device/screen.h | 2 +-
.../include/tk/sysdepend/tef_em1d/asm_depend.h | 30 +-
tkernel_source/monitor/cmdsvc/src/armv6/break.c | 226 ++++++-------
tkernel_source/monitor/cmdsvc/src/armv6/chkaddr.c | 62 ++--
.../monitor/cmdsvc/src/armv6/disassemble.c | 8 +-
tkernel_source/monitor/cmdsvc/src/armv6/register.c | 244 +++++++-------
tkernel_source/monitor/cmdsvc/src/armv6/step.c | 308 ++++++++---------
tkernel_source/monitor/cmdsvc/src/command.c | 366 ++++++++++-----------
tkernel_source/monitor/cmdsvc/src/console.c | 30 +-
tkernel_source/monitor/cmdsvc/src/load.c | 140 ++++----
tkernel_source/monitor/cmdsvc/src/memory.c | 24 +-
tkernel_source/monitor/driver/flash/src/cfi_16x1.c | 32 +-
.../monitor/driver/flash/src/reset-em1d.c | 6 +-
tkernel_source/monitor/driver/sio/src/ns16550.c | 8 +-
.../monitor/hwdepend/tef_em1d/src/config.c | 168 +++++-----
.../monitor/hwdepend/tef_em1d/src/cpuctrl.c | 2 +-
.../monitor/hwdepend/tef_em1d/src/setup_em1d512.h | 20 +-
.../monitor/hwdepend/tef_em1d/src/system.c | 84 ++---
.../monitor/hwdepend/tef_em1d/src/waitusec.c | 22 +-
28 files changed, 976 insertions(+), 972 deletions(-)
diff --git a/tkernel_source/driver/tef_em1d/clk/src/em1d512_iic.c b/tkernel_source/driver/tef_em1d/clk/src/em1d512_iic.c
index c7fabcf..4df5be2 100644
--- a/tkernel_source/driver/tef_em1d/clk/src/em1d512_iic.c
+++ b/tkernel_source/driver/tef_em1d/clk/src/em1d512_iic.c
@@ -68,7 +68,7 @@ LOCAL const UW IICVec[IICMAX] = {IV_IRQ(33), IV_IRQ(39)};
#define IICF_STCEN (1 << 1)
#define IICF_IICRSV (1 << 0)
-#define TIMEOUT 1000000 // microsec
+#define TIMEOUT 1000000 /* microsec */
/* wait for register status */
LOCAL ER wait_state(UW addr, UW mask, UW value)
@@ -237,10 +237,10 @@ EXPORT ER IICXfer(W ch, UH *cmddata, W words)
IICTskID[ch] = tk_get_tid();
/* initialization */
- out_w(IIC_IICC(ch), 0); // halt entire operation
- out_w(IIC_IICCL(ch), IICCL_SMC | IICCL_DFC); // high-speed mode + filter
- out_w(IIC_IICF(ch), IICF_STCEN | IICF_IICRSV); // force transmission
- out_w(IIC_IICC(ch), IICC_IICE | IICC_WTIM); // IIC operation, 9 bits mode
+ out_w(IIC_IICC(ch), 0); /* halt entire operation */
+ out_w(IIC_IICCL(ch), IICCL_SMC | IICCL_DFC); /* high-speed mode + filter */
+ out_w(IIC_IICF(ch), IICF_STCEN | IICF_IICRSV); /* force transmission */
+ out_w(IIC_IICC(ch), IICC_IICE | IICC_WTIM); /* IIC operation, 9 bits mode */
tk_can_wup(TSK_SELF);
/* wait for bus free (since there is one master, the bus should be free, but just in case.) */
@@ -276,7 +276,7 @@ EXPORT ER IICXfer(W ch, UH *cmddata, W words)
er = E_OK;
fin1:
- out_w(IIC_IICC(ch), 0); // halt entire operation
+ out_w(IIC_IICC(ch), 0); /* halt entire operation */
Unlock(&IICLock[ch]);
fin0:
return er;
diff --git a/tkernel_source/driver/tef_em1d/clk/src/em1d512_spi.c b/tkernel_source/driver/tef_em1d/clk/src/em1d512_spi.c
index bf271f3..32ddd22 100644
--- a/tkernel_source/driver/tef_em1d/clk/src/em1d512_spi.c
+++ b/tkernel_source/driver/tef_em1d/clk/src/em1d512_spi.c
@@ -48,7 +48,7 @@ LOCAL const UW SPIMode[SPIMAX] = {0x2700, 0x0700, 0x2700};
#define SPn_CONTROL2(n) (SPIBase[n] + 0x0034)
#define SPn_TIECS(n) (SPIBase[n] + 0x0038)
-#define TIMEOUT 10 // msec
+#define TIMEOUT 10 /* msec */
/* interrupt handler */
LOCAL void spi_inthdr(INTVEC vec)
@@ -76,17 +76,17 @@ LOCAL ER wait_int(void)
LOCAL void spi_init(W ch)
{
out_w(SPn_MODE(ch), SPIMode[ch]);
- out_w(SPn_TIECS(ch), 0x000f); // CS: control by SPn_POL
+ out_w(SPn_TIECS(ch), 0x000f); /* CS: control by SPn_POL */
out_w(SPn_POL(ch), SPIPol[ch]);
- out_w(SPn_ENCLR(ch), ~0); // interrupt disable
+ out_w(SPn_ENCLR(ch), ~0); /* interrupt disable */
- out_w(SPn_CONTROL(ch), 0x0100); // starting reset
+ out_w(SPn_CONTROL(ch), 0x0100); /* starting reset */
WaitUsec(10);
- out_w(SPn_CONTROL(ch), 0x0000); // releasing reset
+ out_w(SPn_CONTROL(ch), 0x0000); /* releasing reset */
out_w(SPn_CONTROL2(ch), 0x0000);
out_w(SPn_FFCLR(ch), ~0);
- out_w(SPn_ENSET(ch), 0x0004); // interrupt enable
+ out_w(SPn_ENSET(ch), 0x0004); /* interrupt enable */
return;
}
diff --git a/tkernel_source/driver/tef_em1d/clk/src/rtc.c b/tkernel_source/driver/tef_em1d/clk/src/rtc.c
index 45aa1eb..0dc09dc 100644
--- a/tkernel_source/driver/tef_em1d/clk/src/rtc.c
+++ b/tkernel_source/driver/tef_em1d/clk/src/rtc.c
@@ -38,7 +38,7 @@
#define RETRY 4
/* SPI channel used by RTC */
-#define SPICH_RTC 2 // SP0:CS2
+#define SPICH_RTC 2 /* SP0:CS2 */
/* binary <-> BCD conversion */
#define BCDtoBIN(v) (((v) >> 4) * 10 + ((v) & 0xF))
@@ -104,7 +104,7 @@ EXPORT ER cdSetDateTime(void *date_tim)
rtcWrite(rxSEC, dt.d_sec);
rtcWrite(rxMIN, dt.d_min);
rtcWrite(rxHOUR, dt.d_hour);
- rtcWrite(rxWEEK, 0x01); // we do not use day of the week
+ rtcWrite(rxWEEK, 0x01); /* we do not use day of the week */
rtcWrite(rxDAY, dt.d_day);
rtcWrite(rxMONTH, dt.d_month);
rtcWrite(rxYEAR, dt.d_year);
@@ -132,9 +132,9 @@ EXPORT ER cdGetDateTime(void *date_tim)
sec = rtcRead(rxSEC);
} while (sec != dt.d_sec); /* make sure data is read consistently in a whole second */
- dt.d_wday = 0; // not supported (0 - pretend it is sunday)
- dt.d_days = 0; // not used
- dt.d_week = 0; // not used
+ dt.d_wday = 0; /* not supported (0 - pretend it is sunday) */
+ dt.d_days = 0; /* not used */
+ dt.d_week = 0; /* not used */
dt.d_year = BCDtoBIN(dt.d_year) + 100; /* 00-99 -> 2000-2099 */
dt.d_month = BCDtoBIN(dt.d_month);
diff --git a/tkernel_source/driver/tef_em1d/kbpd/src/kbpd.h b/tkernel_source/driver/tef_em1d/kbpd/src/kbpd.h
index dac3f17..0d9d6d9 100644
--- a/tkernel_source/driver/tef_em1d/kbpd/src/kbpd.h
+++ b/tkernel_source/driver/tef_em1d/kbpd/src/kbpd.h
@@ -417,4 +417,4 @@ IMPORT void kpFinishStateMachine( void );
IMPORT void kpReleaseKey( KeyState *ks );
IMPORT BOOL kpExecStateMachine( InnerEvent *evt, ReceiveData *msg );
IMPORT ER kpKeyAndButtonForceUp( void );
-#endif //IMPORT_DEFINE
+#endif /*IMPORT_DEFINE */
diff --git a/tkernel_source/driver/tef_em1d/kbpd/src/key.c b/tkernel_source/driver/tef_em1d/kbpd/src/key.c
index e89189f..bf6f43d 100644
--- a/tkernel_source/driver/tef_em1d/kbpd/src/key.c
+++ b/tkernel_source/driver/tef_em1d/kbpd/src/key.c
@@ -57,7 +57,7 @@ LOCAL void makeShiftKeyEvent( InnerEvent *evt, InnEvtType type,
}
}
-#if 0 // unused function
+#if 0 /* unused function */
/*
* generate shift key error event
*/
diff --git a/tkernel_source/driver/tef_em1d/lowkbpd/src/hwkbpd.c b/tkernel_source/driver/tef_em1d/lowkbpd/src/hwkbpd.c
index 6dbc2f9..c41b676 100644
--- a/tkernel_source/driver/tef_em1d/lowkbpd/src/hwkbpd.c
+++ b/tkernel_source/driver/tef_em1d/lowkbpd/src/hwkbpd.c
@@ -30,7 +30,7 @@ LOCAL ID FlgID; /* flag for event notification */
#define TpFlg (1 << 0)
#define SwFlg (1 << 1)
-// ---------------------------------------------------------------------------
+/* --------------------------------------------------------------------------- */
/* tablet parameter (coordinate normalizaton parameter, etc.) */
typedef struct {
W x_bias;
@@ -242,21 +242,21 @@ LOCAL void tp_task(void)
W i;
UINT flg;
LOCAL const UB tpsetup[] = {
- 10, 0xff, // IRQ_MASK_A (mask all)
- 11, 0xbf, // IRQ_MASK_B M_PEN_DOWN
- 12, 0xff, // IRQ_MASK_C (mask all)
- 13, 0xff, // IRQ_MASK_D (mask all)
- 5, 0xff, // EVENT_A (clear all)
- 6, 0xff, // EVENT_B (clear all)
- 7, 0xff, // EVENT_C (clear all)
- 8, 0xff, // EVENT_D (clear all)
- 22, 0x09, // GPIO3:TSIYN, GPIO2:GPI,Active low
- 23, 0x00, // GPIO5:TSIXN, GPIO4:TSIYP
- 24, 0x00, // GPIO7:TSIREF, GPIO6:TSIXP
- 105, 0xc3, // TSI_CONT_A 4slot, PEN_DET_EN, AUTO_TSI_EN
- 106, 0x80, // TSI_CONT_B X+/X-,Y+/Y-,Y+/X-
- 82, 0x40, // 1ms interval
- 0, 0x00, // (terminate)
+ 10, 0xff, /* IRQ_MASK_A (mask all) */
+ 11, 0xbf, /* IRQ_MASK_B M_PEN_DOWN */
+ 12, 0xff, /* IRQ_MASK_C (mask all) */
+ 13, 0xff, /* IRQ_MASK_D (mask all) */
+ 5, 0xff, /* EVENT_A (clear all) */
+ 6, 0xff, /* EVENT_B (clear all) */
+ 7, 0xff, /* EVENT_C (clear all) */
+ 8, 0xff, /* EVENT_D (clear all) */
+ 22, 0x09, /* GPIO3:TSIYN, GPIO2:GPI,Active low */
+ 23, 0x00, /* GPIO5:TSIXN, GPIO4:TSIYP */
+ 24, 0x00, /* GPIO7:TSIREF, GPIO6:TSIXP */
+ 105, 0xc3, /* TSI_CONT_A 4slot, PEN_DET_EN, AUTO_TSI_EN */
+ 106, 0x80, /* TSI_CONT_B X+/X-,Y+/Y-,Y+/X- */
+ 82, 0x40, /* 1ms interval */
+ 0, 0x00, /* (terminate) */
};
/* DA9052 TSI initialization */
@@ -272,7 +272,7 @@ LOCAL void tp_task(void)
/* wait for TP interrupt */
tk_wai_flg(FlgID, TpFlg, TWF_ANDW | TWF_BITCLR, &flg, TMO_FEVR);
- // interrupt is prohibited inside the TP intterupt handler
+ /* interrupt is prohibited inside the TP intterupt handler */
/* polling is done while pen touch state */
while (1) {
@@ -374,7 +374,7 @@ fin0:
return er;
}
-// ---------------------------------------------------------------------------
+/* --------------------------------------------------------------------------- */
LOCAL UB PrevSwMsg = 0; /* area to store previous SW message */
LOCAL UB PrevSwSts = 0; /* area to store previous SW readout */
LOCAL FastLock HwLock_sw; /* for exclusive access control purposes */
@@ -461,8 +461,8 @@ LOCAL void swscan(void)
sw = in_w(GIO_I(GIO_L));
/* mask and shift unnecessary bits */
- sw &= 0x000000d0; // P7,P6,P4
- sw >>= 4; // bit0: P4
+ sw &= 0x000000d0; /* P7,P6,P4 */
+ sw >>= 4; /* bit0: P4 */
/* if the state is different from the previously read state, send a message */
if (sw != PrevSwSts) {
@@ -558,7 +558,7 @@ fin0:
return er;
}
-// ---------------------------------------------------------------------------
+/* --------------------------------------------------------------------------- */
/* process received data */
EXPORT void hwProc(InMsg *msg)
{
diff --git a/tkernel_source/driver/tef_em1d/screen/src/common.c b/tkernel_source/driver/tef_em1d/screen/src/common.c
index b5df385..72e3816 100644
--- a/tkernel_source/driver/tef_em1d/screen/src/common.c
+++ b/tkernel_source/driver/tef_em1d/screen/src/common.c
@@ -350,18 +350,18 @@ EXPORT ER getSCRSPEC(DEV_SPEC *spec)
*/
EXPORT W setModeStr(W mode, TC *str, W pos, W x, W y, W bpp, TC *desc)
{
-#define MODESTR_SIZE 16 // the number specified by VIDEOMODE needs to fit in this area
+#define MODESTR_SIZE 16 /* the number specified by VIDEOMODE needs to fit in this area */
#define TK_MULT 0x215f
#define putTC(x, y, z) (x)[(y)] = (z)
W n;
- // "mxxxxXyyyy:cccc ... " (TC)
- // m: video mode number
- // x: X width (1-4 columns)
- // y: Y height (1-4 rows)
- // c: number of colors
- // ' ' (space) : padding
+ /* "mxxxxXyyyy:cccc ... " (TC)
+ m: video mode number
+ x: X width (1-4 columns)
+ y: Y height (1-4 rows)
+ c: number of colors
+ ' ' (space) : padding */
/* if str = NULL, the length of the resulting string is returned */
if (str == NULL) goto fin0;
@@ -379,7 +379,7 @@ EXPORT W setModeStr(W mode, TC *str, W pos, W x, W y, W bpp, TC *desc)
if (x >= 10) putTC(str, n++, TK_0 + (x / 10) % 10);
putTC(str, n++, TK_0 + x % 10);
- putTC(str, n++, TK_MULT); // (multiplication symbol in TC)
+ putTC(str, n++, TK_MULT); /* (multiplication symbol in TC) */
/* Y size */
if (y >= 1000) putTC(str, n++, TK_0 + (y / 1000) % 10);
@@ -387,7 +387,7 @@ EXPORT W setModeStr(W mode, TC *str, W pos, W x, W y, W bpp, TC *desc)
if (y >= 10) putTC(str, n++, TK_0 + (y / 10) % 10);
putTC(str, n++, TK_0 + y % 10);
- putTC(str, n++, TK_COLN); // : (TC)
+ putTC(str, n++, TK_COLN); /* : (TC) */
/* number of colors */
if (bpp == 4) {
diff --git a/tkernel_source/driver/tef_em1d/screen/src/em1d512.c b/tkernel_source/driver/tef_em1d/screen/src/em1d512.c
index 16bf5ce..ea24ff6 100644
--- a/tkernel_source/driver/tef_em1d/screen/src/em1d512.c
+++ b/tkernel_source/driver/tef_em1d/screen/src/em1d512.c
@@ -66,9 +66,9 @@
/* definition of LCD panel (including controller-dependent part) */
typedef struct {
- W paneltype; // panel type (if negative, this applies to all the panels)
- UW pll2ctrl0; // to configure PLL2 clock frequency
- UW divlcdlclk; // LCD_LCLK division
+ W paneltype; /* panel type (if negative, this applies to all the panels) */
+ UW pll2ctrl0; /* to configure PLL2 clock frequency */
+ UW divlcdlclk; /* LCD_LCLK division */
UH hde;
UH hrs;
@@ -83,14 +83,14 @@ typedef struct {
} LCDdefs;
-#define SUPPORT_MODEMAP 00020000000 // supported mode map
+#define SUPPORT_MODEMAP 00020000000 /* supported mode map */
#define DEFAULT_REQMODE DMeWVGAx16
/* LCD parameter */
LOCAL const LCDdefs LCDparm[] = {
{
- // 800x480@@60Hz, 31.5kHz hsync (pixclk=33.3MHz)
- -1, 0x61, 0x51, // 401.408MHz / 12
+ /* 800x480@@60Hz, 31.5kHz hsync (pixclk=33.3MHz) */
+ -1, 0x61, 0x51, /* 401.408MHz / 12 */
800, 840, 968, 1056, 480, 491, 493, 525, -1, -1
},
};
@@ -117,29 +117,29 @@ LOCAL W WriteDA9052(W reg, W dat)
LOCAL void LCDpower(BOOL power)
{
LOCAL const UB on_cmd[] = {
- 54, 0x5a, // VLDO5: 2.5V/enable *max 3.3V*
- 70, 0x27, // BOOST(2MHz, LED1/2 enable, controller enable)
- 71, 0x4f, // LED_CONT(LED1/2 current sink/ramp enable)
- 73, 0xe1, // LED1_CONF(12034microA)
- 74, 0xe1, // LED2_CONF(12034microA)
- 76, 0xbf, // LED1_CONT(PWM/100%)
- 77, 0xbf, // LED2_CONT(PWM/100%)
- 0, 0x00, // (terminate)
+ 54, 0x5a, /* VLDO5: 2.5V/enable *max 3.3V* */
+ 70, 0x27, /* BOOST(2MHz, LED1/2 enable, controller enable) */
+ 71, 0x4f, /* LED_CONT(LED1/2 current sink/ramp enable) */
+ 73, 0xe1, /* LED1_CONF(12034microA) */
+ 74, 0xe1, /* LED2_CONF(12034microA) */
+ 76, 0xbf, /* LED1_CONT(PWM/100%) */
+ 77, 0xbf, /* LED2_CONT(PWM/100%) */
+ 0, 0x00, /* (terminate) */
};
LOCAL const UB off_cmd[] = {
- 77, 0x00, // LED2_CONT(default, off)
- 76, 0x00, // LED1_CONT(default, off)
- 74, 0x00, // LED2_CONF(default, 50microA)
- 73, 0x00, // LED1_CONF(default, 50microA)
- 71, 0x40, // LED_CONT(default)
- 70, 0x20, // BOOST(default)
- 54, 0x1a, // VLDO5: 2.5V/disable
- 0, 0x00, // (terminate)
+ 77, 0x00, /* LED2_CONT(default, off) */
+ 76, 0x00, /* LED1_CONT(default, off) */
+ 74, 0x00, /* LED2_CONF(default, 50microA) */
+ 73, 0x00, /* LED1_CONF(default, 50microA) */
+ 71, 0x40, /* LED_CONT(default) */
+ 70, 0x20, /* BOOST(default) */
+ 54, 0x1a, /* VLDO5: 2.5V/disable */
+ 0, 0x00, /* (terminate) */
};
const UB *cmd;
if (!power) {
- *GIO_OH(GIO_HH) = 0x00040000; // DISP='0'
+ *GIO_OH(GIO_HH) = 0x00040000; /* DISP='0' */
tk_dly_tsk(10);
}
@@ -151,7 +151,7 @@ LOCAL void LCDpower(BOOL power)
tk_dly_tsk(10);
if (power) {
- *GIO_OH(GIO_HH) = 0x00040004; // DISP='1'
+ *GIO_OH(GIO_HH) = 0x00040004; /* DISP='1' */
tk_dly_tsk(10);
}
@@ -234,14 +234,14 @@ LOCAL void em1_setmode(W flg)
pll_setup(lcd->pll2ctrl0, lcd->divlcdlclk);
/* set up parameters */
- *BUSSEL = 1; // MEMC-LCDC mode
+ *BUSSEL = 1; /* MEMC-LCDC mode */
*QOS = 0;
*CONTROL= ((lcd->hsync < 0) ? 4 : 0) |
((lcd->vsync < 0) ? 2 : 0);
- *BACKCOLOR = 0; // background is black (#000000)
+ *BACKCOLOR = 0; /* background is black (#000000) */
*AREAADR = (UW)Vinf.framebuf_addr;
*HOFFSET = Vinf.framebuf_rowb;
- *IFORMAT = 1; // RGB565
+ *IFORMAT = 1; /* RGB565 */
*HAREA = lcd->hde;
*HEDGE1 = lcd->hrs - lcd->hde;
*HEDGE2 = lcd->hre - lcd->hde;
@@ -250,7 +250,7 @@ LOCAL void em1_setmode(W flg)
*VEDGE1 = lcd->vrs - lcd->vde;
*VEDGE2 = lcd->vre - lcd->vde;
*VTOTAL = lcd->vtot;
- *INTENCLR = ~0; // all interrupts are disabled
+ *INTENCLR = ~0; /* all interrupts are disabled */
/* clear VRAM content */
if (flg) MEMSET(Vinf.f_addr, 0, Vinf.framebuf_total);
diff --git a/tkernel_source/include/device/em1d512_iic.h b/tkernel_source/include/device/em1d512_iic.h
index cf0ab76..bd8e0bd 100644
--- a/tkernel_source/include/device/em1d512_iic.h
+++ b/tkernel_source/include/device/em1d512_iic.h
@@ -126,12 +126,12 @@ IMPORT ER em1d512_iicxfer(W ch, UH *cmddat, W words);
IMPORT ER em1d512_spixfer(W cs, UB *xmit, UB *recv, W len);
/* [END SYSCALLS] */
-#define IIC_START (1 << 15) // send START condition
-#define IIC_STOP (1 << 14) // send STOP condition
-#define IIC_SEND (1 << 13) // send data
-#define IIC_RECV (1 << 12) // receive data
-#define IIC_TOPDATA (1 << 11) // beginning of sent/received data
-#define IIC_LASTDATA (1 << 10) // end of sent/received data
+#define IIC_START (1 << 15) /* send START condition */
+#define IIC_STOP (1 << 14) /* send STOP condition */
+#define IIC_SEND (1 << 13) /* send data */
+#define IIC_RECV (1 << 12) /* receive data */
+#define IIC_TOPDATA (1 << 11) /* beginning of sent/received data */
+#define IIC_LASTDATA (1 << 10) /* end of sent/received data */
/* Initailize service functions */
IMPORT ER em1d512_iicspi_svc(BOOL start);
diff --git a/tkernel_source/include/device/screen.h b/tkernel_source/include/device/screen.h
index 9d29a05..5d8ce39 100644
--- a/tkernel_source/include/device/screen.h
+++ b/tkernel_source/include/device/screen.h
@@ -53,7 +53,7 @@ typedef enum {
DN_SCRXSPEC0 = -500, /* DEV_SPEC (R) */
} ScrDataNo;
-// we use the range from -755 to - 500
+/* we use the range from -755 to - 500 */
#define DN_SCRXSPEC(n) (DN_SCRXSPEC0 - ((n) & 0xff))
/*
diff --git a/tkernel_source/include/tk/sysdepend/tef_em1d/asm_depend.h b/tkernel_source/include/tk/sysdepend/tef_em1d/asm_depend.h
index 9a525f7..1a16679 100644
--- a/tkernel_source/include/tk/sysdepend/tef_em1d/asm_depend.h
+++ b/tkernel_source/include/tk/sysdepend/tef_em1d/asm_depend.h
@@ -84,8 +84,8 @@
mrs ip, cpsr
and ip, ip, #PSR_M(31)
cmp ip, #PSR_IRQ
- ldmeqfd sp!, {r3, ip} // for IRQ
- ldmnefd sp!, {ip} // for other cases
+ ldmeqfd sp!, {r3, ip} /* for IRQ */
+ ldmnefd sp!, {ip} /* for other cases */
rfefd sp!
.endm
@@ -99,7 +99,7 @@
*/
.macro ENTER_SVC_MODE
.arm
- cps #PSR_SVC // enter SVC mode
+ cps #PSR_SVC /* enter SVC mode */
.endm
/*
@@ -117,9 +117,9 @@
*/
.macro TK_RET_INT mode
.arm
- mov ip, lr // ip = lr_svc
- cpsid IMASK, #\mode // return to the original exception
- stmfd sp!, {ip} // save lr_svc
+ mov ip, lr /* ip = lr_svc */
+ cpsid IMASK, #\mode /* return to the original exception */
+ stmfd sp!, {ip} /* save lr_svc */
svc SWI_RETINT
.endm
@@ -139,9 +139,9 @@
*/
.macro TK_RET_INT_FIQ mode
.arm
- mov r3, lr // r3 = lr_svc
- cpsid IMASK, #\mode // return to the original exception
- swp r3, r3, [sp] // save lr_svc, and restore r3
+ mov r3, lr /* r3 = lr_svc */
+ cpsid IMASK, #\mode /* return to the original exception */
+ swp r3, r3, [sp] /* save lr_svc, and restore r3 */
svc SWI_RETINT
.endm
@@ -158,19 +158,19 @@
.macro TEXHDR_ENTRY texhdr
.arm
- swp lr, lr, [sp] // save lr , lr = texcd
- stmfd sp!, {r0-r4, ip} // save other registers
+ swp lr, lr, [sp] /* save lr , lr = texcd */
+ stmfd sp!, {r0-r4, ip} /* save other registers */
mov r4, sp
- bic sp, sp, #8-1 // align (module 8 bytes) of sp
+ bic sp, sp, #8-1 /* align (module 8 bytes) of sp */
ldr ip, =\texhdr
mov r0, lr
- blx ip // call texhdr(texcd)
+ blx ip /* call texhdr(texcd) */
mov sp, r4
- ldmfd sp!, {r0-r4, ip, lr} // restore registers
- svc SWI_RETTEX // return from task exception handler
+ ldmfd sp!, {r0-r4, ip, lr} /* restore registers */
+ svc SWI_RETTEX /* return from task exception handler */
.endm
/* ------------------------------------------------------------------------ */
diff --git a/tkernel_source/monitor/cmdsvc/src/armv6/break.c b/tkernel_source/monitor/cmdsvc/src/armv6/break.c
index 42440b1..fc1bed7 100644
--- a/tkernel_source/monitor/cmdsvc/src/armv6/break.c
+++ b/tkernel_source/monitor/cmdsvc/src/armv6/break.c
@@ -21,7 +21,7 @@
#include "../cmdsvc.h"
#include <sys/sysinfo.h>
-// SW breakpoint code (BKPT instruction)
+/* SW breakpoint code (BKPT instruction) */
#define BREAK_ARM 0xE1200070
#define BREAK_THUMB 0xBE000000
@@ -29,74 +29,74 @@
breakpoint data
*/
typedef struct {
- UW addr; // break address
- UW code; // saved data
- UW atr; // break attribute
- H sz; //code size (2 or 4)
- UB cmd[L_BPCMD]; // executed command
+ UW addr; /* break address */
+ UW code; /* saved data */
+ UW atr; /* break attribute */
+ H sz; /* code size (2 or 4) */
+ UB cmd[L_BPCMD]; /* executed command */
} BRKPT;
-#define MAX_SBP (8) // maximum number of SW breakpoint
+#define MAX_SBP (8) /* maximum number of SW breakpoint */
#define MAX_IBP (0)
#define MAX_OBP (0)
#define MAX_BRKPT (MAX_SBP + MAX_IBP + MAX_OBP)
-LOCAL BRKPT brkPt[MAX_BRKPT + 1]; // breakpoint data
- // the last is temorary break
+LOCAL BRKPT brkPt[MAX_BRKPT + 1]; /* breakpoint data */
+ /* the last is temorary break */
/*
step point data
* used for trace and temporary step processing
*/
typedef struct {
- UW addr; //step address
- UW code; // step save data
- UW pc; // address of replaced instruction
- UW inst; // replaced instruction
- UW regval; // replaced register value
- H reg; // replaced register number
- H sz; // code size ( 2 / 4)
+ UW addr; /* step address */
+ UW code; /* step save data */
+ UW pc; /* address of replaced instruction */
+ UW inst; /* replaced instruction */
+ UW regval; /* replaced register value */
+ H reg; /* replaced register number */
+ H sz; /* code size ( 2 / 4) */
} STEPPT;
-LOCAL STEPPT stepPt; // step point data
+LOCAL STEPPT stepPt; /* step point data */
/*
break attribute
*/
-#define BA_S 0x1000 //software break
-#define BA_I 0x2000 // instruction break
-#define BA_O 0x4000 //operand break
-#define BA_SET 0x8000 //software break released flag
-#define BA_PRE 0x0100 // break before execution
-#define BA_R 0x0200 // break on read
-#define BA_W 0x0400 // break on write
-#define BA_RW 0x0600 // break on read/write
-#define BA_TMP 0x0800 // temporary break
+#define BA_S 0x1000 /* software break */
+#define BA_I 0x2000 /* instruction break */
+#define BA_O 0x4000 /* operand break */
+#define BA_SET 0x8000 /* software break released flag */
+#define BA_PRE 0x0100 /* break before execution */
+#define BA_R 0x0200 /* break on read */
+#define BA_W 0x0400 /* break on write */
+#define BA_RW 0x0600 /* break on read/write */
+#define BA_TMP 0x0800 /* temporary break */
#define MAX_BPATR 1
LOCAL const struct {
- UB name[4]; // attribute name
- UW atr; // attribute code
+ UB name[4]; /* attribute name */
+ UW atr; /* attribute code */
} brkAtr[MAX_BPATR] = {
- {"S ", 0x00000000 | BA_S | BA_PRE}, // software break
+ {"S ", 0x00000000 | BA_S | BA_PRE}, /* software break */
};
/*
trace data
*/
-LOCAL W traceMode; // trace mode
-LOCAL W traceStep; // number of trace steps
-LOCAL W stepFlg; // temporary step execution flag
+LOCAL W traceMode; /* trace mode */
+LOCAL W traceStep; /* number of trace steps */
+LOCAL W stepFlg; /* temporary step execution flag */
LOCAL union {
UB b[8];
- UW w[2]; // to align on word boundary
- } sbpCode; // SW break instructions (two)
+ UW w[2]; /* to align on word boundary */
+ } sbpCode; /* SW break instructions (two) */
/*
CP14 register manipulation
*/
-// no debug comprocessor
+/* no debug comprocessor */
LOCAL void setDSCR(UW val) {return;}
LOCAL UW getDSCR(void) {return 0;}
LOCAL UW getWFAR(void) {return 0;}
@@ -122,8 +122,8 @@ LOCAL UW EnableCP14(void)
UW dscr;
dscr = getDSCR();
- dscr |= 0x00008000; // monitor debug mode on
- dscr &= ~0x00004000; // hold debug mode off
+ dscr |= 0x00008000; /* monitor debug mode on */
+ dscr &= ~0x00004000; /* hold debug mode off */
setDSCR(dscr);
/* return the success/failure of setting */
@@ -181,25 +181,25 @@ EXPORT ER setBreak(UW addr, W atr, UB *cmd, W cmdlen)
UW code;
BRKPT *bp, *p;
- if (atr == 0) atr = BA_S | BA_PRE; // default attribute
+ if (atr == 0) atr = BA_S | BA_PRE; /* default attribute */
- // unaligned address (non-W alignment) is regarded as Thumb instruction
+ /* unaligned address (non-W alignment) is regarded as Thumb instruction */
sz = (addr & 0x03) ? 2 : 4;
addr &= ~(sz - 1);
- if (atr & BA_TMP) { // temporary break is used at fixed location
+ if (atr & BA_TMP) { /* temporary break is used at fixed location */
bp = &brkPt[MAX_BRKPT];
} else {
- // find an empty slot in the table
+ /* find an empty slot in the table */
ibcnt = obcnt = sbcnt = 0;
for (bp = NULL, p = brkPt; p < &brkPt[MAX_BRKPT]; p++) {
- if (p->addr == 0) {if (bp == NULL) bp = p;} // empty
- else if (p->addr == addr) bp = p; // update
- else if (p->atr & BA_O) obcnt++; // WP
- else if (p->atr & BA_I) ibcnt++; // HW BP
- else sbcnt++; // SW BP
+ if (p->addr == 0) {if (bp == NULL) bp = p;} /* empty */
+ else if (p->addr == addr) bp = p; /* update */
+ else if (p->atr & BA_O) obcnt++; /* WP */
+ else if (p->atr & BA_I) ibcnt++; /* HW BP */
+ else sbcnt++; /* SW BP */
}
- // check for the maximum value
+ /* check for the maximum value */
if (atr & BA_O) {
if (obcnt >= MAX_OBP) return E_HBPOVR;
} else if (atr & BA_I) {
@@ -210,10 +210,10 @@ EXPORT ER setBreak(UW addr, W atr, UB *cmd, W cmdlen)
}
if (atr & BA_S) {
- // validate PC
- // if (invalidPC(addr)) return E_BPBAD;
+ /* validate PC */
+ /* if (invalidPC(addr)) return E_BPBAD; */
- //check for read and and write access rights
+ /*check for read and and write access rights */
if (readMem(addr, &code, sz, 2) != sz) return E_BPBAD;
if (writeMem(addr, &sbpCode.b[sz], sz, 2) != sz) return E_BPROM;
writeMem(addr, &code, sz, 2);
@@ -221,7 +221,7 @@ EXPORT ER setBreak(UW addr, W atr, UB *cmd, W cmdlen)
code = 0;
}
- //set breakpoint
+ /*set breakpoint */
bp->addr = addr;
bp->atr = atr | BA_SET;
bp->sz = sz;
@@ -237,7 +237,7 @@ EXPORT ER clearBreak(UW addr)
{
BRKPT *p;
- if (addr == 0) { // clear all breakpoints
+ if (addr == 0) { /* clear all breakpoints */
memset(&brkPt[0], 0, sizeof(brkPt));
return E_OK;
}
@@ -258,7 +258,7 @@ EXPORT void dspBreak(void)
for (p = brkPt; p < &brkPt[MAX_BRKPT]; p++) {
if (p->addr == 0) continue;
- // THUMB(sz == 2) is displayed using odd address
+ /* THUMB(sz == 2) is displayed using odd address */
DSP_F3(08X,(p->addr + ((p->sz & 2) >> 1)), CH,' ',
S,strBreakAtr(p->atr));
if (p->cmd[0] != '\0') {
@@ -272,16 +272,16 @@ EXPORT void dspBreak(void)
*/
EXPORT void initBreak(void)
{
- // clear all breakpoints
+ /* clear all breakpoints */
memset(&brkPt[0], 0, sizeof(brkPt));
- // clear all step points
+ /* clear all step points */
memset(&stepPt, 0, sizeof(stepPt));
- // initialize others,
+ /* initialize others, */
traceMode = traceStep = stepFlg = 0;
- // SW break instruction (undefined instruction)
+ /* SW break instruction (undefined instruction) */
sbpCode.w[0] = BREAK_THUMB;
sbpCode.w[1] = BREAK_ARM;
}
@@ -294,25 +294,25 @@ EXPORT W resetBreak(UW vec)
UW code, pc;
BRKPT *p;
- pc = getCurPCX(); // break address has been adjusted
+ pc = getCurPCX(); /* break address has been adjusted */
bpflg = 0;
/* release if monitor debug mode is used */
if (CheckCP14()) {
- // release hardware breakpoint
+ /* release hardware breakpoint */
for (i = 0; i < MAX_IBP; i++) {
setBCR(i, getBCR(i) & ~1);
}
- // release watchpoint
+ /* release watchpoint */
for (i = 0; i < MAX_OBP; i++) {
setWCR(i, getWCR(i) & ~1);
}
- // monitor debug mode is set to off later
+ /* monitor debug mode is set to off later */
}
- // release steppoints
+ /* release steppoints */
if (stepPt.addr != 0) {
n = stepPt.sz;
readMem(stepPt.addr, &code, n, 2);
@@ -320,21 +320,21 @@ EXPORT W resetBreak(UW vec)
if (pc == stepPt.addr) bpflg = 0x100;
writeMem(stepPt.addr, &stepPt.code, n, 2);
if (stepPt.pc > 0) {
- // restore the changed instruction (ARM instruction only)
+ /* restore the changed instruction (ARM instruction only) */
writeMem(stepPt.pc, &stepPt.inst, 4, 2);
- // restore the changed register
+ /* restore the changed register */
pc = getRegister(stepPt.reg);
setRegister(stepPt.reg, stepPt.regval);
}
- // set the NEXT real PC
+ /* set the NEXT real PC */
if (bpflg != 0) setCurPCX(pc);
}
}
- // in the case of trace/step execution, SW breakpoints have been released
+ /* in the case of trace/step execution, SW breakpoints have been released */
if (! (traceMode || stepFlg)) {
- // temporaly release SW/HW breakpoints (including the temporary breakpoints)
+ /* temporaly release SW/HW breakpoints (including the temporary breakpoints) */
for (p = brkPt; p <= &brkPt[MAX_BRKPT]; p++) {
if (p->addr == 0) continue;
@@ -354,13 +354,13 @@ EXPORT W resetBreak(UW vec)
} else {
p->atr &= ~BA_SET;
}
- // clear temporary breakpoint
+ /* clear temporary breakpoint */
if (p->atr & BA_TMP)
memset(p, 0, sizeof(BRKPT));
}
}
}
- return bpflg; // is PC breakpoint?
+ return bpflg; /* is PC breakpoint? */
}
/*
setting step
@@ -370,23 +370,23 @@ LOCAL void setStep(UW pc, W mode)
W n;
UW cpsr, inst;
- // ARM or THUMB
+ /* ARM or THUMB */
cpsr = getCurCPSR();
- // decode instruction and obtain the next branch target
+ /* decode instruction and obtain the next branch target */
n = getStepAddr(pc, cpsr, (mode == 2) ? 1 : 0, &stepPt.addr, &inst);
- if (n >= 0x10) { // instruction modification
- // modify instruction (ARM instruction only)
+ if (n >= 0x10) { /* instruction modification */
+ /* modify instruction (ARM instruction only) */
readMem(stepPt.pc = pc, &stepPt.inst, 4, 2);
writeMem(pc, &inst, 4, 2);
- // restore the changed register
+ /* restore the changed register */
stepPt.reg = (n >> 4) & 0x0F;
stepPt.regval = getRegister(stepPt.reg);
- // Set PC witht the content of the replace register
+ /* Set PC witht the content of the replace register */
setRegister(stepPt.reg, pc + ((cpsr & PSR_T) ? 4 : 8));
}
- //set break command
+ /*set break command */
stepPt.sz = (n &= 0x0F);
readMem(stepPt.addr, &stepPt.code, n, 2);
writeMem(stepPt.addr, &sbpCode.b[n], n, 2);
@@ -402,21 +402,21 @@ EXPORT void setupBreak(void)
pc = getCurPCX();
- // clear steppoint
+ /* clear steppoint */
memset(&stepPt, 0, sizeof(stepPt));
- if (traceMode) { // trace is executed
+ if (traceMode) { /* trace is executed */
- setStep(pc, traceMode); // set up step
+ setStep(pc, traceMode); /* set up step */
- } else { // normal execution
+ } else { /* normal execution */
- // if an unexecuted break matches the PC value
- // temporarily set up step execution, and execute one instruction only
+ /* if an unexecuted break matches the PC value */
+ /* temporarily set up step execution, and execute one instruction only */
if (stepFlg == 0) {
for (p = brkPt; p <= &brkPt[MAX_BRKPT]; p++) {
if (p->addr == pc && (p->atr & BA_PRE)) {
- setStep(pc, 0); // set up temporary step execution
+ setStep(pc, 0); /* set up temporary step execution */
stepFlg = 1;
return;
}
@@ -425,13 +425,13 @@ EXPORT void setupBreak(void)
ibcnt = obcnt = 0;
- //set breakpoint
- // - unless we turn on monitor debug mode, WCR/WVR/BCR/BVR
- // cannot be accessed
- // - depending on hardware, monitor debug mode cannot be
- // set to on
- // So try setting monitor debug mode on, and only if it is successful,
- // we try to set WCR/WVR/BCR/BVR
+ /*set breakpoint */
+ /* - unless we turn on monitor debug mode, WCR/WVR/BCR/BVR */
+ /* cannot be accessed */
+ /* - depending on hardware, monitor debug mode cannot be */
+ /* set to on */
+ /* So try setting monitor debug mode on, and only if it is successful, */
+ /* we try to set WCR/WVR/BCR/BVR */
for (p = brkPt; p <= &brkPt[MAX_BRKPT]; p++) {
if (p->addr == 0) continue;
@@ -440,7 +440,7 @@ EXPORT void setupBreak(void)
wcr = getWCR(obcnt);
wcr &= ~0x001FC1FF;
wcr |= ((p->atr & (BA_RW)) >> 9) << 3;
- switch (p->atr >> 24) { // LE only
+ switch (p->atr >> 24) { /* LE only */
case 2: wcr |= 0x060 << (p->addr & 2); break;
case 4: wcr |= 0x1e0; break;
default: /* do nothing */ break;
@@ -452,7 +452,7 @@ EXPORT void setupBreak(void)
if (!EnableCP14()) continue;
bcr = getBCR(ibcnt);
bcr &= ~0x007FC1E7;
- bcr |= (p->addr & 2) ? 0x180 : 0x060; // LE
+ bcr |= (p->addr & 2) ? 0x180 : 0x060; /* LE */
setBVR(ibcnt, p->addr & ~3);
setBCR(ibcnt, bcr | 7);
ibcnt++;
@@ -462,11 +462,11 @@ EXPORT void setupBreak(void)
}
}
- // if hardware breakpoint is not used at all
- // monitor debug mode is turned off
+ /* if hardware breakpoint is not used at all */
+ /* monitor debug mode is turned off */
if (ibcnt == 0 && obcnt == 0) DisableCP14();
}
- stepFlg = 0; // clear temporary step execution flag
+ stepFlg = 0; /* clear temporary step execution flag */
}
/*
stop tracing
@@ -482,17 +482,17 @@ EXPORT ER goTrace(W trace, UW pc, UW par)
{
W er;
- // set trace mode
- if ((traceMode = trace) == 0) { // normal execution
- // set temporary breakpoint
+ /* set trace mode */
+ if ((traceMode = trace) == 0) { /* normal execution */
+ /* set temporary breakpoint */
if (par != 0) {
er = setBreak(par, BA_S | BA_PRE | BA_TMP, NULL, 0);
if (er < E_OK) return er;
}
- } else { // trace execution
+ } else { /* trace execution */
traceStep = par;
}
- setCurPC(pc); // set execution start address
+ setCurPC(pc); /* set execution start address */
return E_OK;
}
/*
@@ -508,24 +508,24 @@ EXPORT W procBreak(W bpflg, UB **cmd)
bp = NULL;
- if (traceMode) { // trace execution
- //PC holds the next PC value (by resetBreak())
+ if (traceMode) { /* trace execution */
+ /*PC holds the next PC value (by resetBreak()) */
pc = getCurPC();
- // disassembly display (next instruction)
+ /* disassembly display (next instruction) */
disAssemble(&pc, &npc, wrkBuf);
DSP_F4(08X,pc, S,": ", S,wrkBuf, CH,'\n');
- if (-- traceStep > 0) return 0; // continue
- stopTrace(); // stop tracing
+ if (-- traceStep > 0) return 0; /* continue */
+ stopTrace(); /* stop tracing */
- } else { // breakpoint
- // During temporary step execution, then do nothing and continue
+ } else { /* breakpoint */
+ /* During temporary step execution, then do nothing and continue */
if (stepFlg) return 0;
- pc = getCurPCX(); // break address has been adjusted
+ pc = getCurPCX(); /* break address has been adjusted */
- // this is not a breakpoint set by b command
+ /* this is not a breakpoint set by b command */
if ((bpflg & 0xF0) == 0) {
DSP_F3(S,"Unknown break at H'", 08X,pc, CH,'\n');
*cmd = NULL;
@@ -543,8 +543,8 @@ EXPORT W procBreak(W bpflg, UB **cmd)
}
if ((bp->atr & BA_O) && CheckCP14()) {
- // the address of instruction that generated operand break
- // is fetched from WFAR
+ /* the address of instruction that generated operand break */
+ /* is fetched from WFAR */
wfar = getWFAR();
wfar -= (getCurCPSR() & PSR_T) ? 4 : 8;
DSP_F4(S,"Break (", S,mes, S,") at ", 08X,wfar);
@@ -554,7 +554,7 @@ EXPORT W procBreak(W bpflg, UB **cmd)
}
}
- // restore stopped instruction
+ /* restore stopped instruction */
*cmd = (bp && bp->cmd[0] != 0) ? bp->cmd : NULL;
- return 1; // wait for command
+ return 1; /* wait for command */
}
diff --git a/tkernel_source/monitor/cmdsvc/src/armv6/chkaddr.c b/tkernel_source/monitor/cmdsvc/src/armv6/chkaddr.c
index 209434b..1e88e62 100644
--- a/tkernel_source/monitor/cmdsvc/src/armv6/chkaddr.c
+++ b/tkernel_source/monitor/cmdsvc/src/armv6/chkaddr.c
@@ -20,17 +20,17 @@
#include "../cmdsvc.h"
-LOCAL UW validLA; // valid logical start address
-LOCAL UW validSz; // valid logical address size
-LOCAL UW mmuStat; // MMU state
+LOCAL UW validLA; /* valid logical start address */
+LOCAL UW validSz; /* valid logical address size */
+LOCAL UW mmuStat; /* MMU state */
/*
Initialize address check data (executed upon monitor entry)
*/
EXPORT void initChkAddr(void)
{
- validLA = validSz = 0; // clear the previous effective addresses
- mmuStat = getCP15(1, 0); // MMU state
+ validLA = validSz = 0; /* clear the previous effective addresses */
+ mmuStat = getCP15(1, 0); /* MMU state */
}
/*
Check memory address
@@ -42,51 +42,51 @@ EXPORT W chkMemAddr(UW addr, UW *pa, W len, W rw)
const MEMSEG *mp;
UW n;
- if (mmuStat & 0x1) { // MMU is enabled
- // if the prevous check range doesn't include the address,
- // if the address is a valid existing address is checked by looking at page table.
+ if (mmuStat & 0x1) { /* MMU is enabled */
+ /* if the prevous check range doesn't include the address, */
+ /* if the address is a valid existing address is checked by looking at page table. */
if (addr < validLA || addr >= validLA + validSz) {
UW pte, *ppte;
- // Depending on the valid rage of TTBR0 described in TTBCR
- // TTBR0/TTBR1(=TopPageTable) is switched
+ /* Depending on the valid rage of TTBR0 described in TTBCR */
+ /* TTBR0/TTBR1(=TopPageTable) is switched */
pte = 0xfe000000 << (7 - (getCP15(2, 2) & 0x07));
- // TTBCR
+ /* TTBCR */
ppte = (addr & pte) ? TopPageTable :
- (UW *)(getCP15(2, 0) & ~0x7f); // TTBR0
+ (UW *)(getCP15(2, 0) & ~0x7f); /* TTBR0 */
pte = ppte[addr >> 20];
validSz = 0;
switch(pte & 0x3) {
- case 0x2: // Section Entry
- pte &= 0xFFF00000; // Section Address
+ case 0x2: /* Section Entry */
+ pte &= 0xFFF00000; /* Section Address */
if (rw && AddrMatchMemArea(pte,
MSA_ROM|MSA_FROM) != NULL)
errinfo = E_ROM;
- else validSz = 0x100000; // 1 MB
+ else validSz = 0x100000; /* 1 MB */
break;
- case 0x1: // Page Table Entry
- pte &= 0xFFFFFC00; // Page Table Address
+ case 0x1: /* Page Table Entry */
+ pte &= 0xFFFFFC00; /* Page Table Address */
pte = *((UW*)(pte + ((addr >>(12-2))& 0x3FC)));
switch(pte & 0x3) {
- case 0x1: // Large Page : 16 KB x 4
- validSz = 0x10000; // 64 KB
+ case 0x1: /* Large Page : 16 KB x 4 */
+ validSz = 0x10000; /* 64 KB */
break;
- case 0x2: // Small Page : 1 KB x 4
- case 0x3: // Small Page with XN
- validSz = 0x1000; // 4 KB
+ case 0x2: /* Small Page : 1 KB x 4 */
+ case 0x3: /* Small Page with XN */
+ validSz = 0x1000; /* 4 KB */
break;
}
break;
- case 0x3: // Fine Page Table Entry
- break; // unsupported
+ case 0x3: /* Fine Page Table Entry */
+ break; /* unsupported */
}
validLA = (validSz) ? (addr & ~(validSz - 1)) : 0;
}
n = (validSz) ? (validLA + validSz - addr) : 0;
- } else { // MMU is disabled, the unmodified address is used
+ } else { /* MMU is disabled, the unmodified address is used */
mp = AddrMatchMemArea(addr, MSA_HW);
if ( mp != NULL ) {
if ( rw && (mp->attr & (MSA_ROM|MSA_FROM)) != 0 ) {
@@ -99,7 +99,7 @@ EXPORT W chkMemAddr(UW addr, UW *pa, W len, W rw)
n = 0;
}
}
- *pa = addr; // access by logical address
+ *pa = addr; /* access by logical address */
return (len > n) ? n : len;
}
/*
@@ -115,7 +115,7 @@ EXPORT W chkIOAddr(UW addr, UW *pa, W len)
mp = AddrMatchMemArea(addr, MSA_IO);
n = ( mp != NULL )? mp->end - addr: 0;
- *pa = addr; // access by logical address
+ *pa = addr; /* access by logical address */
return (len > n) ? n : len;
}
/*
@@ -124,13 +124,13 @@ EXPORT W chkIOAddr(UW addr, UW *pa, W len)
*/
EXPORT W invalidPC(UW addr)
{
- // memory range check is not performed
- // an odd address needs to be regarded as THUMB, and so nothing is done here.
+ /* memory range check is not performed */
+ /* an odd address needs to be regarded as THUMB, and so nothing is done here. */
return 0;
}
EXPORT W invalidPC2(UW addr)
{
- // memory range check is not performed
- // PC of an ARM instruction is always on WORD-boundary
+ /* memory range check is not performed */
+ /* PC of an ARM instruction is always on WORD-boundary */
return (addr & 0x03) ? -1 : 0;
}
diff --git a/tkernel_source/monitor/cmdsvc/src/armv6/disassemble.c b/tkernel_source/monitor/cmdsvc/src/armv6/disassemble.c
index 5ea92b1..5f27062 100644
--- a/tkernel_source/monitor/cmdsvc/src/armv6/disassemble.c
+++ b/tkernel_source/monitor/cmdsvc/src/armv6/disassemble.c
@@ -43,13 +43,13 @@ EXPORT ER disAssemble(UW *saddr, UW *naddr, UB *str)
W len;
UW inst, addr;
- len = (*saddr & 0x1) ? 2 : 4; // Thumb or Arm instruction
- addr = (*saddr &= ~(len - 1)); // address adjustment
+ len = (*saddr & 0x1) ? 2 : 4; /* Thumb or Arm instruction */
+ addr = (*saddr &= ~(len - 1)); /* address adjustment */
- // extract op code
+ /* extract op code */
if (readMem(addr, &inst, len, 2) != len) return E_MACV;
- // binary dump
+ /* binary dump */
if (len == 4) {
str = make_hex(str, inst >> 24);
str = make_hex(str, inst >> 16);
diff --git a/tkernel_source/monitor/cmdsvc/src/armv6/register.c b/tkernel_source/monitor/cmdsvc/src/armv6/register.c
index 3c932ce..2e24f18 100644
--- a/tkernel_source/monitor/cmdsvc/src/armv6/register.c
+++ b/tkernel_source/monitor/cmdsvc/src/armv6/register.c
@@ -52,98 +52,98 @@ EXPORT UW regStack[39 + 10 + 2];
#define L_REGNM 8
typedef struct {
- UB name[L_REGNM]; // register name
- UW id; // register ID
+ UB name[L_REGNM]; /* register name */
+ UW id; /* register ID */
} REGTAB;
-#define R_GEN 0x001000 // general register
-#define R_CTL 0x002000 // control register
-#define R_GRP 0x010000 // register group
+#define R_GEN 0x001000 /* general register */
+#define R_CTL 0x002000 /* control register */
+#define R_GRP 0x010000 /* register group */
-#define R_LF 0x080000 // forced linefeed
-#define R_GAP 0x040000 // empty line
+#define R_LF 0x080000 /* forced linefeed */
+#define R_GAP 0x040000 /* empty line */
-#define R_ONLY 0x100 // disable setup
-#define SPEC(n) (0x200 | (n)) // special
+#define R_ONLY 0x100 /* disable setup */
+#define SPEC(n) (0x200 | (n)) /* special */
-#define ixCPSR 10 // CPSR index
-#define ixPC 11 // PC index
+#define ixCPSR 10 /* CPSR index */
+#define ixPC 11 /* PC index */
#define ixUSR 12
-#define ixFIQ (19 + 1) // FIQ: SPSR,R8-R14
-#define ixIRQ (27 - 4) // IRQ: SPSR,R13,R14
-#define ixABT (30 - 4) // ABT: SPSR,R13,R14
-#define ixUND (33 - 4) // UND: SPSR,R13,R14
-#define ixSVC (36 - 4) // SVC: SPSR,R13,R14
-#define ixSP_SVC (ixSVC + 5) // SVC SP index
-
-#define ixCP15 39 // CP15 index
+#define ixFIQ (19 + 1) /* FIQ: SPSR,R8-R14 */
+#define ixIRQ (27 - 4) /* IRQ: SPSR,R13,R14 */
+#define ixABT (30 - 4) /* ABT: SPSR,R13,R14 */
+#define ixUND (33 - 4) /* UND: SPSR,R13,R14 */
+#define ixSVC (36 - 4) /* SVC: SPSR,R13,R14 */
+#define ixSP_SVC (ixSVC + 5) /* SVC SP index */
+
+#define ixCP15 39 /* CP15 index */
#define ixCP15R1 (ixCP15 + 0)
#define N_ACTREGS (16 + 7 + 7 + 8 + 7 + 10)
#define N_REGS (N_ACTREGS + 3)
LOCAL const REGTAB regTab[N_REGS] = {
- {"R0 ", R_GEN + 0x00 }, // 0
- {"R1 ", R_GEN + 0x01 }, // 1
- {"R2 ", R_GEN + 0x02 }, // 2
- {"R3 ", R_GEN + 0x03 + R_LF }, // 3
- {"R4 ", R_GEN + 0x04 }, // 4
- {"R5 ", R_GEN + 0x05 }, // 5
- {"R6 ", R_GEN + 0x06 }, // 6
- {"R7 ", R_GEN + 0x07 + R_LF }, // 7
- {"R8 ", R_GEN + SPEC(0x00) }, // 8
- {"R9 ", R_GEN + SPEC(0x01) }, // 9
- {"R10/SL ", R_GEN + SPEC(0x02) }, // 10
- {"R11/FP ", R_GEN + SPEC(0x03) + R_LF }, // 11
- {"R12/IP ", R_GEN + SPEC(0x04) }, // 12
- {"R13/SP ", R_GEN + SPEC(0x05) }, // 13
- {"R14/LR ", R_GEN + SPEC(0x06) }, // 14
- {"R15/PC ", R_GEN + ixPC + R_LF }, // 15
-
- {"R8_USR ", R_GEN + ixUSR + 0 + R_GAP }, // 16
- {"R9_USR ", R_GEN + ixUSR + 1 }, // 17
- {"R10_USR ", R_GEN + ixUSR + 2 }, // 18
- {"R11_USR ", R_GEN + ixUSR + 3 + R_LF }, // 19
- {"R12_USR ", R_GEN + ixUSR + 4 }, // 20
- {"R13_USR ", R_GEN + ixUSR + 5 }, // 21
- {"R14_USR ", R_GEN + ixUSR + 6 + R_LF }, // 22
-
- {"R8_FIQ ", R_GEN + ixFIQ + 0 }, // 23
- {"R9_FIQ ", R_GEN + ixFIQ + 1 }, // 24
- {"R10_FIQ ", R_GEN + ixFIQ + 2 }, // 25
- {"R11_FIQ ", R_GEN + ixFIQ + 3 + R_LF }, // 26
- {"R12_FIQ ", R_GEN + ixFIQ + 4 }, // 27
- {"R13_FIQ ", R_GEN + ixFIQ + 5 }, // 28
- {"R14_FIQ ", R_GEN + ixFIQ + 6 + R_LF }, // 29
-
- {"R13_IRQ ", R_GEN + ixIRQ + 5 }, // 30
- {"R14_IRQ ", R_GEN + ixIRQ + 6 }, // 31
- {"R13_SVC ", R_GEN + ixSVC + 5 }, // 32
- {"R14_SVC ", R_GEN + ixSVC + 6 + R_LF }, // 33
- {"R13_ABT ", R_GEN + ixABT + 5 }, // 34
- {"R14_ABT ", R_GEN + ixABT + 6 }, // 35
- {"R13_UND ", R_GEN + ixUND + 5 }, // 36
- {"R14_UND ", R_GEN + ixUND + 6 + R_LF }, // 37
-
- {"CPSR ", R_CTL + ixCPSR + R_GAP }, // 38
- {"SPSR ", R_CTL + SPEC(0x08) }, // 39
- {"SPSR_FIQ", R_CTL + ixFIQ - 1 }, // 40
- {"SPSR_IRQ", R_CTL + ixIRQ + 4 + R_LF }, // 41
- {"SPSR_SVC", R_CTL + ixSVC + 4 }, // 42
- {"SPSR_ABT", R_CTL + ixABT + 4 }, // 43
- {"SPSR_UND", R_CTL + ixUND + 4 + R_LF }, // 44
-
- {"SCTLR ", R_CTL + SPEC(0x0F) + 0 + R_GAP }, // 45
- {"TTBR0 ", R_CTL + ixCP15 + 1 + R_ONLY }, // 46
- {"TTBR1 ", R_CTL + ixCP15 + 2 + R_ONLY }, // 47
- {"TTBCR ", R_CTL + ixCP15 + 3 + R_ONLY + R_LF}, // 48
- {"DACR ", R_CTL + ixCP15 + 4 }, // 49
- {"DFSR ", R_CTL + ixCP15 + 5 }, // 50
- {"IFSR ", R_CTL + ixCP15 + 6 }, // 51
- {"DFAR ", R_CTL + ixCP15 + 7 + R_LF }, // 52
- {"IFAR ", R_CTL + ixCP15 + 8 }, // 53
- {"CTXIDR ", R_CTL + ixCP15 + 9 + R_LF }, // 54
+ {"R0 ", R_GEN + 0x00 }, /* 0 */
+ {"R1 ", R_GEN + 0x01 }, /* 1 */
+ {"R2 ", R_GEN + 0x02 }, /* 2 */
+ {"R3 ", R_GEN + 0x03 + R_LF }, /* 3 */
+ {"R4 ", R_GEN + 0x04 }, /* 4 */
+ {"R5 ", R_GEN + 0x05 }, /* 5 */
+ {"R6 ", R_GEN + 0x06 }, /* 6 */
+ {"R7 ", R_GEN + 0x07 + R_LF }, /* 7 */
+ {"R8 ", R_GEN + SPEC(0x00) }, /* 8 */
+ {"R9 ", R_GEN + SPEC(0x01) }, /* 9 */
+ {"R10/SL ", R_GEN + SPEC(0x02) }, /* 10 */
+ {"R11/FP ", R_GEN + SPEC(0x03) + R_LF }, /* 11 */
+ {"R12/IP ", R_GEN + SPEC(0x04) }, /* 12 */
+ {"R13/SP ", R_GEN + SPEC(0x05) }, /* 13 */
+ {"R14/LR ", R_GEN + SPEC(0x06) }, /* 14 */
+ {"R15/PC ", R_GEN + ixPC + R_LF }, /* 15 */
+
+ {"R8_USR ", R_GEN + ixUSR + 0 + R_GAP }, /* 16 */
+ {"R9_USR ", R_GEN + ixUSR + 1 }, /* 17 */
+ {"R10_USR ", R_GEN + ixUSR + 2 }, /* 18 */
+ {"R11_USR ", R_GEN + ixUSR + 3 + R_LF }, /* 19 */
+ {"R12_USR ", R_GEN + ixUSR + 4 }, /* 20 */
+ {"R13_USR ", R_GEN + ixUSR + 5 }, /* 21 */
+ {"R14_USR ", R_GEN + ixUSR + 6 + R_LF }, /* 22 */
+
+ {"R8_FIQ ", R_GEN + ixFIQ + 0 }, /* 23 */
+ {"R9_FIQ ", R_GEN + ixFIQ + 1 }, /* 24 */
+ {"R10_FIQ ", R_GEN + ixFIQ + 2 }, /* 25 */
+ {"R11_FIQ ", R_GEN + ixFIQ + 3 + R_LF }, /* 26 */
+ {"R12_FIQ ", R_GEN + ixFIQ + 4 }, /* 27 */
+ {"R13_FIQ ", R_GEN + ixFIQ + 5 }, /* 28 */
+ {"R14_FIQ ", R_GEN + ixFIQ + 6 + R_LF }, /* 29 */
+
+ {"R13_IRQ ", R_GEN + ixIRQ + 5 }, /* 30 */
+ {"R14_IRQ ", R_GEN + ixIRQ + 6 }, /* 31 */
+ {"R13_SVC ", R_GEN + ixSVC + 5 }, /* 32 */
+ {"R14_SVC ", R_GEN + ixSVC + 6 + R_LF }, /* 33 */
+ {"R13_ABT ", R_GEN + ixABT + 5 }, /* 34 */
+ {"R14_ABT ", R_GEN + ixABT + 6 }, /* 35 */
+ {"R13_UND ", R_GEN + ixUND + 5 }, /* 36 */
+ {"R14_UND ", R_GEN + ixUND + 6 + R_LF }, /* 37 */
+
+ {"CPSR ", R_CTL + ixCPSR + R_GAP }, /* 38 */
+ {"SPSR ", R_CTL + SPEC(0x08) }, /* 39 */
+ {"SPSR_FIQ", R_CTL + ixFIQ - 1 }, /* 40 */
+ {"SPSR_IRQ", R_CTL + ixIRQ + 4 + R_LF }, /* 41 */
+ {"SPSR_SVC", R_CTL + ixSVC + 4 }, /* 42 */
+ {"SPSR_ABT", R_CTL + ixABT + 4 }, /* 43 */
+ {"SPSR_UND", R_CTL + ixUND + 4 + R_LF }, /* 44 */
+
+ {"SCTLR ", R_CTL + SPEC(0x0F) + 0 + R_GAP }, /* 45 */
+ {"TTBR0 ", R_CTL + ixCP15 + 1 + R_ONLY }, /* 46 */
+ {"TTBR1 ", R_CTL + ixCP15 + 2 + R_ONLY }, /* 47 */
+ {"TTBCR ", R_CTL + ixCP15 + 3 + R_ONLY + R_LF}, /* 48 */
+ {"DACR ", R_CTL + ixCP15 + 4 }, /* 49 */
+ {"DFSR ", R_CTL + ixCP15 + 5 }, /* 50 */
+ {"IFSR ", R_CTL + ixCP15 + 6 }, /* 51 */
+ {"DFAR ", R_CTL + ixCP15 + 7 + R_LF }, /* 52 */
+ {"IFAR ", R_CTL + ixCP15 + 8 }, /* 53 */
+ {"CTXIDR ", R_CTL + ixCP15 + 9 + R_LF }, /* 54 */
{"G ", R_GRP|R_GEN },
{"C ", R_GRP|R_CTL },
@@ -162,15 +162,15 @@ EXPORT W searchRegister(UB *name, W grp)
for (p = (REGTAB*)regTab, i = 0; i < N_REGS; p++, i++) {
for (n = 0; n < L_REGNM; n++) if (p->name[n] == '/') break;
- if (n == L_REGNM) { // no separator '/' -> a single register name
+ if (n == L_REGNM) { /* no separator '/' -> a single register name */
if (memcmp(name, p->name, L_REGNM)) continue;
- } else { // has alias
- // check the name(s) after the separator
+ } else { /* has alias */
+ /* check the name(s) after the separator */
memset(bf, ' ', sizeof(bf));
memcpy(bf, p->name + (n + 1), L_REGNM - (n + 1));
a = memcmp(name, bf, L_REGNM - n);
- // check the name before the separator
+ /* check the name before the separator */
memset(bf, ' ', sizeof(bf));
memcpy(bf, p->name, n);
if (a && memcmp(name, bf, n + 1)) continue;
@@ -185,7 +185,7 @@ EXPORT W searchRegister(UB *name, W grp)
*/
LOCAL W ixCpuMode(void)
{
- // obtain mode
+ /* obtain mode */
switch(regStack[ixCPSR] & PSR_M(31)) {
case PSR_USR:
case PSR_SYS: return ixUSR;
@@ -206,31 +206,31 @@ EXPORT UW getRegister(W regno)
i = regTab[regno].id & (R_GRP | 0x3ff);
- // normal register
+ /* normal register */
if (i < SPEC(0)) return regStack[i & 0xff];
- // obtain mode
+ /* obtain mode */
ix = ixCpuMode();
- // special register
+ /* special register */
switch(i) {
- case SPEC(0x00): // R8
- case SPEC(0x01): // R9
- case SPEC(0x02): // R10
- case SPEC(0x03): // R11
- case SPEC(0x04): // R12
+ case SPEC(0x00): /* R8 */
+ case SPEC(0x01): /* R9 */
+ case SPEC(0x02): /* R10 */
+ case SPEC(0x03): /* R11 */
+ case SPEC(0x04): /* R12 */
if (ix != ixFIQ) ix = ixUSR;
- case SPEC(0x05): // R13
- case SPEC(0x06): // R14
+ case SPEC(0x05): /* R13 */
+ case SPEC(0x06): /* R14 */
return regStack[ix + i - SPEC(0)];
- case SPEC(0x08): // SPSR
- if (ix == ixUSR) return 0; // undefined
+ case SPEC(0x08): /* SPSR */
+ if (ix == ixUSR) return 0; /* undefined */
if (ix == ixFIQ) ix -= 5;
return regStack[ix + 4];
- case SPEC(0x0F): // CP15 R1
+ case SPEC(0x0F): /* CP15 R1 */
return regStack[ixCP15R1];
}
- // retur 0 on error
+ /* retur 0 on error */
return 0;
}
/*
@@ -241,34 +241,34 @@ EXPORT ER setRegister(W regno, UW val)
W i, ix;
i = regTab[regno].id & (R_GRP | 0x3ff);
- if (i & R_ONLY) return E_RONLY; // cannot be set
+ if (i & R_ONLY) return E_RONLY; /* cannot be set */
- if (i < SPEC(0)) { // normal register
+ if (i < SPEC(0)) { /* normal register */
regStack[i & 0xff] = val;
return 0;
}
- // obtain mode
+ /* obtain mode */
ix = ixCpuMode();
- // special register
+ /* special register */
switch(i) {
- case SPEC(0x00): // R8
- case SPEC(0x01): // R9
- case SPEC(0x02): // R10
- case SPEC(0x03): // R11
- case SPEC(0x04): // R12
+ case SPEC(0x00): /* R8 */
+ case SPEC(0x01): /* R9 */
+ case SPEC(0x02): /* R10 */
+ case SPEC(0x03): /* R11 */
+ case SPEC(0x04): /* R12 */
if (ix != ixFIQ) ix = ixUSR;
- case SPEC(0x05): // R13
- case SPEC(0x06): // R14
+ case SPEC(0x05): /* R13 */
+ case SPEC(0x06): /* R14 */
regStack[ix + i - SPEC(0x00)] = val;
break;
- case SPEC(0x08): // SPSR
- if (ix == ixUSR) break; // undefined
+ case SPEC(0x08): /* SPSR */
+ if (ix == ixUSR) break; /* undefined */
if (ix == ixFIQ) ix -= 5;
regStack[ix + 4] = val;
break;
- case SPEC(0x0F): // CP15 R1
+ case SPEC(0x0F): /* CP15 R1 */
regStack[ixCP15R1] &= MASK_CACHEMMU;
regStack[ixCP15R1] |= val & VALID_CACHEMMU;
break;
@@ -320,7 +320,7 @@ EXPORT UW getCurSPSR(void)
*/
EXPORT UW getCurPC(void)
{
- // set LSB = 1 for Thumb mode.
+ /* set LSB = 1 for Thumb mode. */
return regStack[ixPC] | ((regStack[ixCPSR] & PSR_T) ? 1 : 0);
}
EXPORT UW getCurPCX(void)
@@ -348,7 +348,7 @@ EXPORT UW getCP15(W reg, W opcd)
EXPORT void setCurPC(UW val)
{
if (regStack[ixPC] != val) {
- // Thumb Bit is changed according to the LSB value of PC.
+ /* Thumb Bit is changed according to the LSB value of PC. */
if (val & 0x3) regStack[ixCPSR] |= PSR_T;
else regStack[ixCPSR] &= ~PSR_T;
regStack[ixPC] = val & ~0x1;
@@ -356,7 +356,7 @@ EXPORT void setCurPC(UW val)
}
EXPORT void setCurPCX(UW val)
{
- // Thumb Bit is not changed.
+ /* Thumb Bit is not changed. */
regStack[ixPC] = val & ~0x1;
}
/*
@@ -367,15 +367,15 @@ EXPORT void setUpBoot( void *start, BootInfo *bootinfo )
bootFlag = 1; /* suppress the setting register R0 upon exit of the monitor */
regStack[ixCPSR] = PSR_I | PSR_F | PSR_SVC;
- regStack[0] = (UW)bootinfo; // R0 boot parameter
- regStack[ixPC] = (UW)start; // PC start address
- regStack[ixSP_SVC] = (UW)&__stack_bottom; // SP monitor stack
+ regStack[0] = (UW)bootinfo; /* R0 boot parameter */
+ regStack[ixPC] = (UW)start; /* PC start address */
+ regStack[ixSP_SVC] = (UW)&__stack_bottom; /* SP monitor stack */
- // MMU enabled, Cache / Write Buffer not enabled
+ /* MMU enabled, Cache / Write Buffer not enabled */
regStack[ixCP15R1] &= MASK_CACHEMMU;
regStack[ixCP15R1] |= ENB_MMUONLY;
- // system initialization processing
+ /* system initialization processing */
resetSystem(1);
}
/*
@@ -383,7 +383,7 @@ EXPORT void setUpBoot( void *start, BootInfo *bootinfo )
*/
EXPORT W isKillValid(void)
{
- // Has TRAP for KILL been define?
+ /* Has TRAP for KILL been define? */
if ( SCArea->intvec[SWI_KILLPROC] == NULL ) return -1;
return 0;
}
@@ -394,7 +394,7 @@ EXPORT W isKillValid(void)
*/
EXPORT W isTKDSValid(void)
{
- // Has TRAP for T-Kernel/DS been defined?
+ /* Has TRAP for T-Kernel/DS been defined? */
if ( SCArea->intvec[SWI_DEBUG] == NULL ) return -1;
return 0;
}
diff --git a/tkernel_source/monitor/cmdsvc/src/armv6/step.c b/tkernel_source/monitor/cmdsvc/src/armv6/step.c
index c9c8a1f..6b1310d 100644
--- a/tkernel_source/monitor/cmdsvc/src/armv6/step.c
+++ b/tkernel_source/monitor/cmdsvc/src/armv6/step.c
@@ -21,19 +21,19 @@
#include "../cmdsvc.h"
-#define aINSTSZ 4 // ARM instruction size
-#define tINSTSZ 2 // THUMB instruction size
-#define REGBIT(reg) (1 << (reg)) // register bit
-#define REGSZ 4 // register size
-#define regPC 15 // PC register
-#define regSP 13 // SP register
-
-LOCAL UW curCPSR; // cpsr
-LOCAL UW nextPC; // the next PC value
-LOCAL W nextLen; // size of the next instruction(2 or 4)
-LOCAL UW repInst; // instruction to replace
-LOCAL W repReg; // register to be replaced
-LOCAL W trcNext; // NEXT trace mode
+#define aINSTSZ 4 /* ARM instruction size */
+#define tINSTSZ 2 /* THUMB instruction size */
+#define REGBIT(reg) (1 << (reg)) /* register bit */
+#define REGSZ 4 /* register size */
+#define regPC 15 /* PC register */
+#define regSP 13 /* SP register */
+
+LOCAL UW curCPSR; /* cpsr */
+LOCAL UW nextPC; /* the next PC value */
+LOCAL W nextLen; /* size of the next instruction(2 or 4) */
+LOCAL UW repInst; /* instruction to replace */
+LOCAL W repReg; /* register to be replaced */
+LOCAL W trcNext; /* NEXT trace mode */
/*
extraction of fields of an instruction
@@ -57,7 +57,7 @@ LOCAL W getRepReg(UW reg)
W i;
for (i = 0; i < 16 && (reg & 0x1); i++, reg >>= 1);
- return i + 0x10; // register number + flag
+ return i + 0x10; /* register number + flag */
}
/*
Validate instruction execution condition
@@ -67,38 +67,38 @@ LOCAL W checkCond(W cond)
UW sr = curCPSR;
switch(cond) {
- case 0: // EQ: z
+ case 0: /* EQ: z */
if (sr & PSR_Z) return 1; break;
- case 1: // NE: !z
+ case 1: /* NE: !z */
if (!(sr & PSR_Z)) return 1; break;
- case 2: // CS: c
+ case 2: /* CS: c */
if (sr & PSR_C) return 1; break;
- case 3: // CC: !c
+ case 3: /* CC: !c */
if (!(sr & PSR_C)) return 1; break;
- case 4: // MI: n
+ case 4: /* MI: n */
if (sr & PSR_N) return 1; break;
- case 5: // PL: !n
+ case 5: /* PL: !n */
if (!(sr & PSR_N)) return 1; break;
- case 6: // VS: v
+ case 6: /* VS: v */
if (sr & PSR_V) return 1; break;
- case 7: // VC: !v
+ case 7: /* VC: !v */
if (!(sr & PSR_V)) return 1; break;
- case 8: // HI: c && !z
+ case 8: /* HI: c && !z */
if ((sr & (PSR_C | PSR_Z)) == PSR_C) return 1; break;
- case 9: // LS: !c || z
+ case 9: /* LS: !c || z */
if (!(sr& PSR_C) || (sr & PSR_Z)) return 1; break;
- case 12: // GT: !z && (n == v)
+ case 12: /* GT: !z && (n == v) */
if (sr & PSR_Z) return 0;
- case 10: // GE: n == v
+ case 10: /* GE: n == v */
sr &= PSR_N | PSR_V;
if (sr == 0 || sr == (PSR_N | PSR_V)) return 1; break;
- case 13: // LE: z || (n != v)
+ case 13: /* LE: z || (n != v) */
if (sr & PSR_Z) return 1;
- case 11: // LT: n != v
+ case 11: /* LT: n != v */
sr &= PSR_N | PSR_V;
if (sr == PSR_N || sr == PSR_V) return 1; break;
- case 14: // AL:
- case 15: // NV:
+ case 14: /* AL: */
+ case 15: /* NV: */
return 1;
}
return 0;
@@ -116,19 +116,19 @@ LOCAL void armBInst(UW inst)
{
W off;
- // BL is not handled during NEXT trace
+ /* BL is not handled during NEXT trace */
if (trcNext) {
- if (inst & 0x01000000) return; // BL
- if (inst >= 0xF0000000) return; // BLX(1)
+ if (inst & 0x01000000) return; /* BL */
+ if (inst >= 0xF0000000) return; /* BLX(1) */
}
off = (inst & 0x00FFFFFF) << 2;
- if (off & 0x02000000) off -= 0x04000000; // sign extension
+ if (off & 0x02000000) off -= 0x04000000; /* sign extension */
nextPC += aINSTSZ + off;
- if (inst >= 0xF0000000) { // BLX(1)
+ if (inst >= 0xF0000000) { /* BLX(1) */
nextPC += getInstField(0x01000000, 24) << 1;
- // adjust for Thumb mode (on two bytes boundary)
- nextLen = tINSTSZ; // THUMB mode
+ /* adjust for Thumb mode (on two bytes boundary) */
+ nextLen = tINSTSZ; /* THUMB mode */
}
}
/*
@@ -136,9 +136,9 @@ LOCAL void armBInst(UW inst)
*/
LOCAL void armBxInst(UW inst)
{
- // BL is not handled during NEXT trace
+ /* BL is not handled during NEXT trace */
if (trcNext) {
- if (inst & 0x00000020) return; // BLX(2)
+ if (inst & 0x00000020) return; /* BLX(2) */
}
inst &= 0x0000000F;
if (inst == regPC) {
@@ -146,7 +146,7 @@ LOCAL void armBxInst(UW inst)
} else {
nextPC = getRegister(inst);
}
- if (nextPC & 1) nextLen = tINSTSZ; // THUMB mode
+ if (nextPC & 1) nextLen = tINSTSZ; /* THUMB mode */
}
/*
ARM: data processing instruction rd = pc
@@ -156,34 +156,34 @@ LOCAL void armOpInst(UW inst)
W rn, rm;
UW usereg;
- // TST, TEQ, CMP, CMPN instructions are not handled
+ /* TST, TEQ, CMP, CMPN instructions are not handled */
rm = inst & 0x01E00000;
if (rm >= 0x01000000 && rm <= 0x01600000) return;
- // OP1 register
+ /* OP1 register */
rn = getInstField(0x000F0000, 16);
usereg = REGBIT(rn);
- // OP2 register
+ /* OP2 register */
if (!(inst & 0x02000000)) {
rm = getInstField(0x0000000F, 0);
usereg |= REGBIT(rm);
- if (inst & 0x00000010) // shift length register
+ if (inst & 0x00000010) /* shift length register */
usereg |= REGBIT(getInstField(0x00000F00, 8));
}
- //register to be replaced
+ /*register to be replaced */
repReg = getRepReg(usereg);
- // Dest register replacement
+ /* Dest register replacement */
setRepInst(0x0000F000, 12);
- // OP1 register replacement
+ /* OP1 register replacement */
if (rn == regPC) setRepInst(0x000F0000, 16);
- // OP2 register replacement
+ /* OP2 register replacement */
if (rm == regPC) setRepInst(0x0000000F, 0);
- // if S bit is set, we obtain the next mode from spsr.
+ /* if S bit is set, we obtain the next mode from spsr. */
if ((inst & 0x00100000) && (getCurSPSR() & PSR_T)) nextLen = tINSTSZ;
}
/*
@@ -194,27 +194,27 @@ LOCAL void armLdrInst(UW inst)
W rn, roff;
UW usereg;
- // base register
+ /* base register */
rn = getInstField(0x000F0000, 16);
usereg = REGBIT(rn);
- // OFF register
+ /* OFF register */
roff = 0;
if (inst & 0x02000000) {
roff = getInstField(0x0000000F, 0);
usereg |= REGBIT(roff);
}
- //register to be replaced
+ /*register to be replaced */
repReg = getRepReg(usereg);
- // Dest register replacement
+ /* Dest register replacement */
setRepInst(0x0000F000, 12);
- // base register replacement
+ /* base register replacement */
if (rn == regPC) setRepInst(0x000F0000, 16);
- // offset register replacement
+ /* offset register replacement */
if (roff == regPC) setRepInst(0x0000000F, 0);
}
/*
@@ -225,25 +225,25 @@ LOCAL void armLdmInst(UW inst)
W i, off;
UW baddr;
- // memory base address
+ /* memory base address */
baddr = getRegister(getInstField(0x000F0000, 16));
- // obtain PC address offset
- off = (inst & 0x01000000) ? REGSZ : 0; // preindex
+ /* obtain PC address offset */
+ off = (inst & 0x01000000) ? REGSZ : 0; /* preindex */
- if (inst & 0x00800000) { // UP
+ if (inst & 0x00800000) { /* UP */
for (i = 0; i < regPC; i++) {
if (inst & REGBIT(i)) off += REGSZ;
}
baddr += off;
- } else { // DOWN
+ } else { /* DOWN */
baddr -= off;
}
- // Extract the value set to PC
+ /* Extract the value set to PC */
readMem(baddr, &nextPC, REGSZ, 2);
- // if S bit is set, we obtain the next mode from spsr.
+ /* if S bit is set, we obtain the next mode from spsr. */
if ((inst & 0x00400000) && (getCurSPSR() & PSR_T)) nextLen = tINSTSZ;
}
/*
@@ -251,10 +251,10 @@ LOCAL void armLdmInst(UW inst)
*/
LOCAL void armMrcsInst(UW inst)
{
- // register to be replaced
+ /* register to be replaced */
repReg = getRepReg(0);
- // Dest register replacement
+ /* Dest register replacement */
setRepInst(0x0000F000, 12);
}
#if CPU_ARMv6
@@ -266,24 +266,24 @@ LOCAL void armRfeInst(UW inst)
W off;
UW baddr, saddr, paddr, spsr;
- // memory base address
+ /* memory base address */
baddr = getRegister(getInstField(0x000F0000, 16));
- // obtain PC address offset
- off = (inst & 0x01000000) ? REGSZ : 0; // preindex
+ /* obtain PC address offset */
+ off = (inst & 0x01000000) ? REGSZ : 0; /* preindex */
- if (inst & 0x00800000) { // UP
+ if (inst & 0x00800000) { /* UP */
paddr = baddr + off;
saddr = baddr + off + REGSZ;
- } else { // DOWN
+ } else { /* DOWN */
paddr = baddr - off - REGSZ;
saddr = baddr - off;
}
- // Extract the value set to PC
+ /* Extract the value set to PC */
readMem(paddr, &nextPC, REGSZ, 2);
- // obtain the next mode from the saved spsr inside stack.
+ /* obtain the next mode from the saved spsr inside stack. */
readMem(saddr, &spsr, REGSZ, 2);
if (spsr & PSR_T) nextLen = tINSTSZ;
}
@@ -297,14 +297,14 @@ LOCAL void thumbBcondInst(UW inst)
cond = getInstField(0x0F00, 8);
- // undefined instruction is not supported
+ /* undefined instruction is not supported */
if (cond == 14) return;
- // check conditions
+ /* check conditions */
if (!checkCond(cond)) return;
off = (inst & 0x00FF) << 1;
- if (off >= 0x100) off -= 0x200; // sign extension
+ if (off >= 0x100) off -= 0x200; /* sign extension */
nextPC += tINSTSZ + off;
}
/*
@@ -315,7 +315,7 @@ LOCAL void thumbBInst(UW inst)
W off;
off = (inst & 0x07FF) << 1;
- if (off >= 0x800) off -= 0x1000; // sign extension
+ if (off >= 0x800) off -= 0x1000; /* sign extension */
nextPC += tINSTSZ + off;
}
/*
@@ -323,15 +323,15 @@ LOCAL void thumbBInst(UW inst)
*/
LOCAL void thumbBxInst(UW inst)
{
- // BL is not handled during NEXT trace
- if (inst & 0x0080) { // BLX(2)
+ /* BL is not handled during NEXT trace */
+ if (inst & 0x0080) { /* BLX(2) */
if (trcNext) return;
}
inst = getInstField(0x0078, 3);
if (inst == regPC) {
nextPC += tINSTSZ;
} else {
- nextPC = getRegister(inst); // including Hi register
+ nextPC = getRegister(inst); /* including Hi register */
}
if (!(nextPC & 1)) nextLen = aINSTSZ;
}
@@ -343,16 +343,16 @@ LOCAL void thumbBlInst(UW inst)
W off;
UH inst2;
- // BL is not handled during NEXT trace
+ /* BL is not handled during NEXT trace */
if (trcNext) return;
- // Extract 2nd instruction
+ /* Extract 2nd instruction */
readMem(nextPC, &inst2, tINSTSZ, 2);
off = (inst & 0x07FF) << 12;
- if (off >= 0x400000) off -= 0x800000; // sign extension
+ if (off >= 0x400000) off -= 0x800000; /* sign extension */
nextPC += tINSTSZ + off + ((inst2 & 0x07FF) << 1);
- if (!(inst2 & 0x1000)) nextLen = aINSTSZ; // BLX(1)
+ if (!(inst2 & 0x1000)) nextLen = aINSTSZ; /* BLX(1) */
}
/*
THUMB: ADD|CMP|MOV Rd/Rn,Rm instruction rd = pc
@@ -362,17 +362,17 @@ LOCAL void thumbOp6Inst(UW inst)
UW op, dreg, mreg;
op = inst & 0x0300;
- if (op == 0x0100) return; // compare instruction
+ if (op == 0x0100) return; /* compare instruction */
dreg = getInstField(0x0007, 0);
- if (inst & 0x0080) dreg |= 0x8; // Hi register
- if (dreg != regPC) return; // not PC register
+ if (inst & 0x0080) dreg |= 0x8; /* Hi register */
+ if (dreg != regPC) return; /* not PC register */
- mreg = getInstField(0x0078, 3); // including Hi register
+ mreg = getInstField(0x0078, 3); /* including Hi register */
nextPC = getRegister(mreg) & ~(tINSTSZ - 1);
- // calculate PC
- if (op == 0x0000) nextPC += getRegister(dreg); // ADD
+ /* calculate PC */
+ if (op == 0x0000) nextPC += getRegister(dreg); /* ADD */
}
/*
THUMB: POP instruction pc
@@ -386,68 +386,72 @@ LOCAL void thumbPopInst(UW inst)
for (i = 0; i < 8; i++) {
if (inst & REGBIT(i)) sp += REGSZ;
}
- // extract PC
+ /* extract PC */
readMem(sp, &nextPC, REGSZ, 2);
}
-// Arm instruction decode table
+/* Arm instruction decode table */
typedef struct {
- UW mask; // mask
- UW code; // code
- void (*calcNextPC)(UW inst); // calculate PC
+ UW mask; /* mask */
+ UW code; /* code */
+ void (*calcNextPC)(UW inst); /* calculate PC */
} INST_T;
LOCAL const INST_T instArm[] = {
- { 0xFFFFFFFF, 0xE1A00000, noBranch}, // NOP
- { 0xFFF000F0, 0xE1200070, noBranch}, // BKPT(ARM5T)
- { 0x0FFFFFF0, 0x012FFF10, armBxInst}, // BX
- { 0xFE000000, 0xFA000000, armBInst}, // BLX(1)(ARM5T)
- { 0x0FF000F0, 0x01200030, armBxInst}, // BLX(2)(ARM5T)
- { 0x0E000000, 0x0A000000, armBInst}, // B,BL
- { 0x0F000000, 0x0F000000, noBranch}, // SWI
- { 0x0C10F000, 0x0410F000, armLdrInst}, // LDR pc
- { 0x0E108000, 0x08108000, armLdmInst}, // LDM {pc}
-// { 0x0F000010, 0x0E000000, noBranch}, // CDP
-// { 0x0E000000, 0x0C000000, noBranch}, // LDC/STC
- { 0x0F10F010, 0x0E10F010, armMrcsInst}, // MRC pc
- { 0x0FBFFFFF, 0x010FF000, armMrcsInst}, // MRS pc
-// { 0x0F0000F0, 0x00000090, noBranch}, // MULL
- { 0x0E000090, 0x00000090, noBranch}, // LDR/STR Half/SByte
-// { 0x0DB0F000, 0x0120F000, noBranch}, // MSR
-// { 0x0FB00FF0, 0x01000090, noBranch}, // SWP
- { 0x0C00F000, 0x0000F000, armOpInst}, // ADD/SUB.. rd = pc
+ { 0xFFFFFFFF, 0xE1A00000, noBranch}, /* NOP */
+ { 0xFFF000F0, 0xE1200070, noBranch}, /* BKPT(ARM5T) */
+ { 0x0FFFFFF0, 0x012FFF10, armBxInst}, /* BX */
+ { 0xFE000000, 0xFA000000, armBInst}, /* BLX(1)(ARM5T) */
+ { 0x0FF000F0, 0x01200030, armBxInst}, /* BLX(2)(ARM5T) */
+ { 0x0E000000, 0x0A000000, armBInst}, /* B,BL */
+ { 0x0F000000, 0x0F000000, noBranch}, /* SWI */
+ { 0x0C10F000, 0x0410F000, armLdrInst}, /* LDR pc */
+ { 0x0E108000, 0x08108000, armLdmInst}, /* LDM {pc} */
+/* { 0x0F000010, 0x0E000000, noBranch}, */ /* CDP */
+/* { 0x0E000000, 0x0C000000, noBranch}, */ /* LDC/STC */
+ { 0x0F10F010, 0x0E10F010, armMrcsInst}, /* MRC pc */
+ { 0x0FBFFFFF, 0x010FF000, armMrcsInst}, /* MRS pc */
+/* { 0x0F0000F0, 0x00000090, noBranch},*/ /* MULL */
+ { 0x0E000090, 0x00000090, noBranch}, /* LDR/STR Half/SByte */
+/* { 0x0DB0F000, 0x0120F000, noBranch},*/ /* MSR */
+/* { 0x0FB00FF0, 0x01000090, noBranch},*/ /* SWP */
+ { 0x0C00F000, 0x0000F000, armOpInst}, /* ADD/SUB.. rd = pc */
#if CPU_ARMv6
- { 0xFE50FFFF, 0xF8100A00, armRfeInst}, // RFE(ARMv6)
+ { 0xFE50FFFF, 0xF8100A00, armRfeInst}, /* RFE(ARMv6) */
#endif
- { 0 }
+ { 0 }
};
-// Thumb instruction decode table
+/* Thumb instruction decode table */
LOCAL const INST_T instThumb[] = {
-// { 0xF801, 0xE800, thumbBlInst}, // BLX(1)(ARM5T) 2Nd Inst
- { 0xFF00, 0xBE00, noBranch}, // BKPT(ARM5T)
- { 0xFFFF, 0x46C0, noBranch}, // NOP
- { 0xFF00, 0xDF00, noBranch}, // SWI
- { 0xF800, 0xE000, thumbBInst}, // B <label>
- { 0xF000, 0xD000, thumbBcondInst},// B<cond> <label>
- { 0xF000, 0xF000, thumbBlInst}, // BL,BLX(1)(ARM5T)
- { 0xFF80, 0x4780, thumbBxInst}, // BLX(2)(ARM5T)
- { 0xFF00, 0x4700, thumbBxInst}, // BX
-// { 0xFC00, 0x1800, noBranch}, // OP(1)ADD|SUB Rd,Rn,Rm
-// { 0xFC00, 0x1C00, noBranch}, // OP(2)ADD|SUB Rd,Rn,#imm3
-// { 0xE000, 0x2000, noBranch}, // OP(3)<OP> Rd/Rn,#imm8
-// { 0xE000, 0x0000, noBranch}, // OP(4)LSL|LSR|ASR Rd, Rn, Rn,#shift
-// { 0xFC00, 0x4000, noBranch}, // OP(5)<OP> Rd/Rn,Rm/Rs
- { 0xFC00, 0x4400, thumbOp6Inst}, // OP(6)ADD|CMP|MOV Rd/Rn,Rm
-// { 0xF000, 0xA000, noBranch}, // OP(7)ADD Rd,SP|PC,#imm8
-// { 0xFF00, 0xB000, noBranch}, // OP(8)ADD|SUB SP,SP,#imm7
-// { 0xE000, 0x6000, noBranch}, // LS(1)LDR|STR(B) Rd,[Rn,#off5]
-// { 0xF000, 0x8000, noBranch}, // LS(2)LDRH|STRH Rd,[Rn,#off5]
-// { 0xF000, 0x5000, noBranch}, // LS(3)LDR|STR(S){H|B} Rd,[Rn,Rm]
-// { 0xF800, 0x4800, noBranch}, // LS(4)LDR Rd,[PC,#off8]
-// { 0xF000, 0x9000, noBranch}, // LS(5)LDR|STR Rd,[SP,#off8]
-// { 0xF000, 0xC000, noBranch}, // LDMIA|STMIA Rn!,{<reg list>}
- { 0xFD00, 0xBD00, thumbPopInst}, // POP {<reg list,PC}>}
+ /* { 0xF801, 0xE800, thumbBlInst}, // BLX(1)(ARM5T) 2Nd Inst */
+ { 0xFF00, 0xBE00, noBranch}, /* BKPT(ARM5T) */
+ { 0xFFFF, 0x46C0, noBranch}, /* NOP */
+ { 0xFF00, 0xDF00, noBranch}, /* SWI */
+ { 0xF800, 0xE000, thumbBInst}, /* B <label> */
+ { 0xF000, 0xD000, thumbBcondInst},/* B<cond> <label> */
+ { 0xF000, 0xF000, thumbBlInst}, /* BL,BLX(1)(ARM5T) */
+ { 0xFF80, 0x4780, thumbBxInst}, /* BLX(2)(ARM5T) */
+ { 0xFF00, 0x4700, thumbBxInst}, /* BX */
+#if 0
+ { 0xFC00, 0x1800, noBranch}, /* OP(1)ADD|SUB Rd,Rn,Rm */
+ { 0xFC00, 0x1C00, noBranch}, /* OP(2)ADD|SUB Rd,Rn,#imm3 */
+ { 0xE000, 0x2000, noBranch}, /* OP(3)<OP> Rd/Rn,#imm8 */
+ { 0xE000, 0x0000, noBranch}, /* OP(4)LSL|LSR|ASR Rd, Rn, Rn,#shift */
+ { 0xFC00, 0x4000, noBranch}, /* OP(5)<OP> Rd/Rn,Rm/Rs */
+#endif
+ { 0xFC00, 0x4400, thumbOp6Inst}, /* OP(6)ADD|CMP|MOV Rd/Rn,Rm */
+#if 0
+ { 0xF000, 0xA000, noBranch}, /* OP(7)ADD Rd,SP|PC,#imm8 */
+ { 0xFF00, 0xB000, noBranch}, /* OP(8)ADD|SUB SP,SP,#imm7 */
+ { 0xE000, 0x6000, noBranch}, /* LS(1)LDR|STR(B) Rd,[Rn,#off5] */
+ { 0xF000, 0x8000, noBranch}, /* LS(2)LDRH|STRH Rd,[Rn,#off5] */
+ { 0xF000, 0x5000, noBranch}, /* LS(3)LDR|STR(S){H|B} Rd,[Rn,Rm] */
+ { 0xF800, 0x4800, noBranch}, /* LS(4)LDR Rd,[PC,#off8] */
+ { 0xF000, 0x9000, noBranch}, /* LS(5)LDR|STR Rd,[SP,#off8] */
+ { 0xF000, 0xC000, noBranch}, /* LDMIA|STMIA Rn!,{<reg list>} */
+#endif
+ { 0xFD00, 0xBD00, thumbPopInst}, /* POP {<reg list,PC}>} */
{ 0 }
};
/*
@@ -459,29 +463,29 @@ EXPORT W getStepAddr(UW pc, UW cpsr, W mode, UW* npc, UW *rep)
UW inst;
INST_T *tab;
- // set mode
+ /* set mode */
len = (cpsr & PSR_T) ? tINSTSZ : aINSTSZ;
- curCPSR = cpsr; // cpsr
- repReg = 0; // register to replace
- repInst = 0; // instruction to replace
- nextPC = pc + len; // the next PC value for non-branching instruction
- nextLen = len; // size of the next instruction
- trcNext = mode; // NEXT trace
-
- // extract op code
+ curCPSR = cpsr; /* cpsr */
+ repReg = 0; /* register to replace */
+ repInst = 0; /* instruction to replace */
+ nextPC = pc + len; /* the next PC value for non-branching instruction */
+ nextLen = len; /* size of the next instruction */
+ trcNext = mode; /* NEXT trace */
+
+ /* extract op code */
if (readMem(pc, &inst, len, 2) != len) goto EXIT;
- repInst = inst; // instruction to replace
+ repInst = inst; /* instruction to replace */
- if (len == 4) { // ARM instruction
- // check the conditional execution
+ if (len == 4) { /* ARM instruction */
+ /* check the conditional execution */
if (!checkCond(getInstField(0xF0000000, 28))) goto EXIT;
tab = (INST_T*)instArm;
- } else { // THUMB instruction
+ } else { /* THUMB instruction */
tab = (INST_T*)instThumb;
inst &= 0xFFFF;
}
- // search instruction and calculate next PC
+ /* search instruction and calculate next PC */
for ( ; tab->mask != 0; tab++) {
if ((inst & tab->mask) == tab->code) {
(*(tab->calcNextPC))(inst);
diff --git a/tkernel_source/monitor/cmdsvc/src/command.c b/tkernel_source/monitor/cmdsvc/src/command.c
index f91bfd8..f8b2ffa 100644
--- a/tkernel_source/monitor/cmdsvc/src/command.c
+++ b/tkernel_source/monitor/cmdsvc/src/command.c
@@ -23,59 +23,59 @@
#include "help.h"
#include <tk/dbgspt.h>
-#define DEF_MEM_SIZE 64 // default memory dump size
-#define DEF_DA_STEP 16 // default disassbmle size
-#define MAX_DSP_CNT 64 // maximum cut off count for display
-#define MAX_RANGE 0x1000000 // maximum range (16 MB)
-#define IMPLICIT_SIZE 0x1000 // implicit size specification
-
-EXPORT UB lineBuf[L_LINE]; // line buffer
-EXPORT W killProcReq; // request to forcibly kill a process
-
-#define L_SYMBOL 23 // effective symbol length
-#define SETDT_SZ 128 // data size
-
-#define CMD_FINISH (9999) // command end specification
-
-EXPORT W errinfo; // error information
-LOCAL W errcode; // error code
-
-LOCAL UW dAddr; // D address command
-LOCAL UW mAddr; // M command address
-LOCAL UW daAddr; // DA command address
-LOCAL UW cAddr; // the current start address
-LOCAL W cLen; // the current memory byte length
-
-LOCAL W token; // token type
-LOCAL UW tokenVal; // numeric token / register number
-LOCAL UB *tokenStr; // character string / symbol item pointer
-LOCAL W tokenLen; // character string / symbol item length
-LOCAL UB tokenSym[L_SYMBOL + 1]; // symbol item string(capital letters)
-LOCAL UB symExt[2]; // extended symbol letters
-LOCAL UB *lptr; // line pointer
-
-#define PROMPT "TM> " // prompt
-
-// item type
-#define tEOL 0x00 // line end
-#define tEOC 0x01 // end of command
-#define tDLM 0x02 // delimiter
-#define tSIZ 0x11 // size specification
-#define tOPADD 0x12 // + operator
-#define tOPSUB 0x13 // - operator
-#define tOPMUL 0x14 // * operator
-#define tOPDIV 0x15 // / operator
-#define tOPIND 0x16 // & operator
-#define tEOD 0x17 // end of data
-#define tUP 0x18 // previous data
-#define tSYM 0x20 // symbol
-#define tNUM 0x21 // numeric value
-#define tSTR 0x22 // character string
-#define tERRR 0x100 // error
-#define tERCH 0x100 // error: illegal character
-#define tERNUM 0x101 // error: illegal numeric form
-
-// character classficiation
+#define DEF_MEM_SIZE 64 /* default memory dump size */
+#define DEF_DA_STEP 16 /* default disassbmle size */
+#define MAX_DSP_CNT 64 /* maximum cut off count for display */
+#define MAX_RANGE 0x1000000 /* maximum range (16 MB) */
+#define IMPLICIT_SIZE 0x1000 /* implicit size specification */
+
+EXPORT UB lineBuf[L_LINE]; /* line buffer */
+EXPORT W killProcReq; /* request to forcibly kill a process */
+
+#define L_SYMBOL 23 /* effective symbol length */
+#define SETDT_SZ 128 /* data size */
+
+#define CMD_FINISH (9999) /* command end specification */
+
+EXPORT W errinfo; /* error information */
+LOCAL W errcode; /* error code */
+
+LOCAL UW dAddr; /* D address command */
+LOCAL UW mAddr; /* M command address */
+LOCAL UW daAddr; /* DA command address */
+LOCAL UW cAddr; /* the current start address */
+LOCAL W cLen; /* the current memory byte length */
+
+LOCAL W token; /* token type */
+LOCAL UW tokenVal; /* numeric token / register number */
+LOCAL UB *tokenStr; /* character string / symbol item pointer */
+LOCAL W tokenLen; /* character string / symbol item length */
+LOCAL UB tokenSym[L_SYMBOL + 1]; /* symbol item string(capital letters) */
+LOCAL UB symExt[2]; /* extended symbol letters */
+LOCAL UB *lptr; /* line pointer */
+
+#define PROMPT "TM> " /* prompt */
+
+/* item type */
+#define tEOL 0x00 /* line end */
+#define tEOC 0x01 /* end of command */
+#define tDLM 0x02 /* delimiter */
+#define tSIZ 0x11 /* size specification */
+#define tOPADD 0x12 /* + operator */
+#define tOPSUB 0x13 /* - operator */
+#define tOPMUL 0x14 /* * operator */
+#define tOPDIV 0x15 /* / operator */
+#define tOPIND 0x16 /* & operator */
+#define tEOD 0x17 /* end of data */
+#define tUP 0x18 /* previous data */
+#define tSYM 0x20 /* symbol */
+#define tNUM 0x21 /* numeric value */
+#define tSTR 0x22 /* character string */
+#define tERRR 0x100 /* error */
+#define tERCH 0x100 /* error: illegal character */
+#define tERNUM 0x101 /* error: illegal numeric form */
+
+/* character classficiation */
#define isSpace(c) ((c) && (c) <= ' ')
#define isNum(c) ((c) >= '0' && (c) <= '9')
#define isAlpha(c) ( ((c) >= 'A' && (c) <= 'Z') ||\
@@ -85,11 +85,11 @@ LOCAL UB *lptr; // line pointer
c == '?' || c == '@')
#define isExtSym(c) ((c) && ((c) == symExt[0] || (c) == symExt[1]))
-// alignment adjustment
+/* alignment adjustment */
#define ALIGN_L(v, unit) ((v) & ~((unit) - 1))
#define ALIGN_U(v, unit) (((v) + (unit) - 1) & ~((unit) - 1))
-// error return
+/* error return */
#define return_er(er) return (errcode = er)
#define er_return(er) {errcode = er; return;}
#define oer_return(er) {if ((er) == E_NOEXS)\
@@ -97,7 +97,7 @@ LOCAL UB *lptr; // line pointer
else errcode = er;\
return;}
-#define DB16 0x00000 // default base number
+#define DB16 0x00000 /* default base number */
#define DB10 0x10000
/*
@@ -107,7 +107,7 @@ LOCAL void dspError(void)
{
UB *mp = NULL;
- if (token >= tERRR) { // priortize the item error
+ if (token >= tERRR) { /* priortize the item error */
switch(token) {
case tERCH: mp = "Illegal Character"; break;
case tERNUM: mp = "Illegal Number Format"; break;
@@ -168,9 +168,9 @@ LOCAL void dspError(void)
*/
LOCAL W getLine(UB *msg)
{
- if (msg) DSP_S(msg); // display prompt
- memset(lineBuf, 0, sizeof(lineBuf)); // clear buffer
- return getString(lptr = lineBuf); // input a line and initialize the line pointer
+ if (msg) DSP_S(msg); /* display prompt */
+ memset(lineBuf, 0, sizeof(lineBuf)); /* clear buffer */
+ return getString(lptr = lineBuf); /* input a line and initialize the line pointer */
}
/*
skip spaces
@@ -191,7 +191,7 @@ LOCAL W getHexVal(UB **ptr)
p = *ptr;
for (v = 0; ((c = *p) >= '0' && c <= '9') ||
(c >= 'A' && c <= 'F') || (c >= 'a' && c <= 'f'); p++) {
- if (v >= 0x10000000) break; // overflow
+ if (v >= 0x10000000) break; /* overflow */
v <<= 4;
v += (c >= 'a' ? (c - 'a' + 10) :
(c >= 'A' ? (c - 'A' + 10) : ( c - '0')));
@@ -240,7 +240,7 @@ LOCAL W getToken(W defbase)
if (c == '/') {i = tOPDIV; goto EXIT;}
if (c == '&') {i = tOPIND; goto EXIT;}
- if (c == '"') { // character string
+ if (c == '"') { /* character string */
for (tokenStr = lptr; (c = *lptr) && c != '"'; lptr++);
tokenLen = lptr - tokenStr;
if (c) lptr++;
@@ -248,7 +248,7 @@ LOCAL W getToken(W defbase)
goto EXIT;
}
- if (*lptr == '\'') { // number with prefix
+ if (*lptr == '\'') { /* number with prefix */
if (c == 'Q' || c == 'q') {base = 8; goto NUMVAL;}
if (c == 'B' || c == 'b') {base = 2; goto NUMVAL;}
if (c == 'D' || c == 'd') {base = 10;
@@ -260,7 +260,7 @@ NUMVAL:
if (c == 'H' || c == 'h') goto HEXVAL;
}
- if (isNum(c)) { // simple number
+ if (isNum(c)) { /* simple number */
if (c != '0' || (*lptr != 'x' && *lptr != 'X')) {
lptr -= 2;
if (defbase == DB10) {base = 10; goto NUMVAL;}
@@ -268,35 +268,35 @@ NUMVAL:
goto HEXVAL;
}
- if (c == '\'') { // hexadecimal number
+ if (c == '\'') { /* hexadecimal number */
lptr--;
HEXVAL:
lptr++;
tokenVal = getHexVal(&lptr);
c = *lptr;
NUMEXIT:
- // if the end of the numeric value is alphanumeric letter, then it is regarded as illegal numeric format.
+ /* if the end of the numeric value is alphanumeric letter, then it is regarded as illegal numeric format. */
i = (isSym(c) || isNum(c)) ? tERNUM : tNUM;
goto EXIT;
}
- if (isSym(c)) { // symbol
+ if (isSym(c)) { /* symbol */
tokenStr = --lptr;
for (i = 0; isSym(c) || isNum(c) || isExtSym(c); c = *++lptr) {
- // set to tokenSym[] in capital letters
+ /* set to tokenSym[] in capital letters */
if (i < L_SYMBOL) {
if (c >= 'a' && c <= 'z') c -= 'a' - 'A';
tokenSym[i++] = c;
}
}
- // Fill the rest of tokenSym[] with space
+ /* Fill the rest of tokenSym[] with space */
while (i < L_SYMBOL) tokenSym[i++] = ' ';
tokenLen = lptr - tokenStr;
i = tSYM;
goto EXIT;
}
- // other: illegal character error
+ /* other: illegal character error */
i = tERCH;
EXIT:
return token = i;
@@ -335,37 +335,37 @@ LOCAL W getNumber(W defbase, W *val)
W op, v;
UB *p;
- // process leading + and -
+ /* process leading + and - */
if ((op = token) == tOPADD || op == tOPSUB) getToken(defbase);
for (*val = 0; ;) {
- if (token == tSYM) { // register name
+ if (token == tSYM) { /* register name */
if ((v = searchRegister(tokenSym, 0)) >= 0) {
tokenVal = getRegister(v);
- } else { // hexadecimal value
+ } else { /* hexadecimal value */
if (tokenSym[L_SYMBOL - 1] != ' ') break;
p = tokenSym;
tokenVal = getHexVal(&p);
if (*p != ' ') break;
}
} else if (token != tNUM) {
- return_er(E_LESS); // non-numeric value
+ return_er(E_LESS); /* non-numeric value */
}
- // Performing + - * / operations
+ /* Performing + - * / operations */
if (op == tOPADD) *val += tokenVal;
else if (op == tOPSUB) *val -= tokenVal;
else if (op == tOPMUL) *val *= tokenVal;
else if (op == tOPDIV) *val /= tokenVal;
else *val = tokenVal;
- // & operation
+ /* & operation */
while (getToken(defbase) == tOPIND) {
if (readMem(*val, &v, 4, 4) != 4) return_er(E_MACV);
*val = v;
}
- // extract the next item: if the next item is among "+ - * /" then continue processing
+ /* extract the next item: if the next item is among "+ - * /" then continue processing */
if (token < tOPADD || token > tOPDIV) break;
op = token;
getToken(defbase);
@@ -387,17 +387,17 @@ LOCAL W getAddrRange(W unit, W flg, W defsz)
{
W sizeflg;
- // start address
+ /* start address */
if (token > tDLM) {
if (getNumber(0, &cAddr)) return E_LESS;
} else {
- if (flg & 0x01) return_er(E_LESS); // cannot be omitted
+ if (flg & 0x01) return_er(E_LESS); /* cannot be omitted */
}
- // align start address
+ /* align start address */
cAddr = ALIGN_L(cAddr, unit);
- // end address
+ /* end address */
cLen = defsz;
if (token == tDLM) {
sizeflg = 0;
@@ -406,17 +406,17 @@ LOCAL W getAddrRange(W unit, W flg, W defsz)
sizeflg++;
}
if (getNumber(0, (UW*)&cLen)) return E_LESS;
- if (sizeflg == 0) { // end address: up to "+ size"
+ if (sizeflg == 0) { /* end address: up to "+ size" */
if ((UW)cLen >= cAddr || (UW)cLen >= IMPLICIT_SIZE)
- // truncate (using the size as unit)
+ /* truncate (using the size as unit) */
cLen = ((W)((UW)cLen - cAddr) + unit) / unit;
}
cLen *= unit;
} else {
- if (flg & 0x02) return_er(E_LESS); // cannot be omitted
+ if (flg & 0x02) return_er(E_LESS); /* cannot be omitted */
}
- // validate address range
+ /* validate address range */
if (cLen <= 0 || cLen > MAX_RANGE) return_er(E_RANGE);
if (((cLen + cAddr - 1) ^ cAddr) & 0x80000000) {
cLen = (0x80000000 - (cAddr & 0x7fffffff)) / unit;
@@ -435,10 +435,10 @@ LOCAL W getSetData(UB *buf, W unit)
UW num;
for (n = 0; ;) {
- if (token == tSTR) { // character string
+ if (token == tSTR) { /* character string */
if (tokenLen == 0) return_er(E_EMPTY);
- // Fill with 0 using 'unit' as data unit.
+ /* Fill with 0 using 'unit' as data unit. */
k = ALIGN_U(tokenLen, unit);
if (n + k > SETDT_SZ) return_er(E_LIMIT);
memcpy(&buf[n], tokenStr, tokenLen);
@@ -446,7 +446,7 @@ LOCAL W getSetData(UB *buf, W unit)
if ((k -= tokenLen) > 0) memset(&buf[n], 0, k);
n += k;
getToken(0);
- } else { // numeric parameter
+ } else { /* numeric parameter */
if (n + unit > SETDT_SZ) return_er(E_LIMIT);
if (getNumber(0, &num)) return E_LESS;
switch (unit) {
@@ -460,7 +460,7 @@ LOCAL W getSetData(UB *buf, W unit)
if (isnotDLM()) return E_LESS;
}
if (n == 0) return_er(E_EMPTY);
- return n; // data length
+ return n; /* data length */
}
/*
memory read (with error message)
@@ -508,17 +508,17 @@ LOCAL void cmdDump(W unit)
W i, n, k;
UB *cp, *ep;
- // extract address range
+ /* extract address range */
cAddr = dAddr;
if (getAddrRange(unit, 0x00, DEF_MEM_SIZE) || isnotEOC()) return;
- // dump memory content
+ /* dump memory content */
ep = cp = wrkBuf;
for (dAddr = cAddr, i = 0; i < cLen;) {
- // display address
+ /* display address */
if ((i % 16) == 0) DSP_F2(08X,dAddr, S,": ");
- // obtain memory content
+ /* obtain memory content */
if (cp >= ep) {
if ((n = cLen - i) > WRKBUF_SZ) n = WRKBUF_SZ;
k = readMem(dAddr, cp = wrkBuf, n, unit);
@@ -528,17 +528,17 @@ LOCAL void cmdDump(W unit)
}
ep = cp + k;
}
- // display memory content
+ /* display memory content */
if (i < cLen) {
dspMemory(cp, unit);
cp += unit;
dAddr += unit;
i += unit;
}
- // display character
+ /* display character */
if ((n = i % 16) == 0 || i >= cLen) {
k = 16 - n;
- if (n) { // move forward to where we start character dump
+ if (n) { /* move forward to where we start character dump */
n = k / unit * (unit * 2 + 1);
while (n-- > 0) DSP_CH(' ');
}
@@ -568,41 +568,41 @@ LOCAL void cmdModify(W unit)
UB *svlptr, svtoken;
UB dt[SETDT_SZ];
- // start address
+ /* start address */
cAddr = mAddr;
if (token > tDLM && getNumber(0, &cAddr)) return;
- // align address
+ /* align address */
cAddr = ALIGN_L(cAddr, unit);
- if (token <= tEOC) { // interactive processing
- // save command line
+ if (token <= tEOC) { /* interactive processing */
+ /* save command line */
memcpy(svbuf, lineBuf, L_LINE);
svlptr = lptr;
svtoken = token;
for (;;) {
- DSP_F2(08X,cAddr, S,": "); // display address
+ DSP_F2(08X,cAddr, S,": "); /* display address */
if (reaMemory(cAddr, buf, unit, unit)) break;
- dspMemory(buf, unit); // display data
+ dspMemory(buf, unit); /* display data */
- if (getLine("-> ") < 0) break; // input set data
- if (getToken(0) == tEOD) break; // end of data
- if (token <= tEOC) cAddr += unit; // skip
- else if (token == tUP) cAddr -= unit; // previous
+ if (getLine("-> ") < 0) break; /* input set data */
+ if (getToken(0) == tEOD) break; /* end of data */
+ if (token <= tEOC) cAddr += unit; /* skip */
+ else if (token == tUP) cAddr -= unit; /* previous */
else if ((n = getSetData(dt, unit)) < 0) break;
else {
if (wriMemory(cAddr, dt, n, unit)) break;
cAddr += n;
}
}
- // restore command line
+ /* restore command line */
memcpy(lineBuf, svbuf, L_LINE);
lptr = svlptr;
token = svtoken;
if (errcode == E_LESS) errcode = E_PAR;
- } else if (! isnotDLM()) { // set data processing
+ } else if (! isnotDLM()) { /* set data processing */
if ((n = getSetData(dt, unit)) > 0) {
if (wriMemory(cAddr, dt, n, unit) == 0) cAddr += n;
}
@@ -622,22 +622,22 @@ LOCAL void cmdFill(W unit)
W n;
UB dt[SETDT_SZ];
- // extract address range
+ /* extract address range */
if (getAddrRange(unit, 0x03, DEF_MEM_SIZE)) return;
- // extract set data
+ /* extract set data */
if (token <= tEOC) {
- memset(dt, 0, sizeof(UW)); // 0 by default
+ memset(dt, 0, sizeof(UW)); /* 0 by default */
n = unit;
} else {
if (isnotDLM()) return;
if ((n = getSetData(dt, unit)) < 0) return;
}
- // embed set data into memory
- if (n == unit) { // fast processing
+ /* embed set data into memory */
+ if (n == unit) { /* fast processing */
wriMemory(cAddr, dt, cLen, unit | 0x10);
- } else { // ordinary mode
+ } else { /* ordinary mode */
for (; cLen > 0; cLen -= n, cAddr += n) {
if (n > cLen) n = cLen;
if (wriMemory(cAddr, dt, n, unit)) break;
@@ -658,31 +658,31 @@ LOCAL void cmdSearch(W unit)
UB *cp, *ep;
UB dt[SETDT_SZ];
- // extract address range
+ /* extract address range */
if (getAddrRange(unit, 0x01, DEF_MEM_SIZE) || isnotDLM()) return;
- // extract search data
+ /* extract search data */
if ((len = getSetData(dt, unit)) < 0) return;
ep = cp = wrkBuf;
for (ofs = cnt = 0; ; ) {
- // obtain memory content
+ /* obtain memory content */
if (cp >= ep) {
if ((n = WRKBUF_SZ - ofs) > cLen) n = cLen;
- if (ofs + n < len) break; // end
+ if (ofs + n < len) break; /* end */
if (reaMemory(cAddr, &wrkBuf[ofs], n, unit)) break;
cAddr += n;
cLen -= n;
ep = (cp = wrkBuf) + ofs + n;
}
- // check if the leading byte matches
+ /* check if the leading byte matches */
for ( ; cp < ep && *cp != dt[0]; cp += unit);
if ((ofs = ep - cp) < len) {
- // if enough data is not there, move to the beginning of buffer.
+ /* if enough data is not there, move to the beginning of buffer. */
if (ofs > 0) memcpy(wrkBuf, ep = cp, ofs);
continue;
}
- // check for the matching of whole data
+ /* check for the matching of whole data */
if (memcmp(cp, dt, len) == 0) {
if (++cnt > MAX_DSP_CNT) {
DSP_S("..More..\n");
@@ -690,7 +690,7 @@ LOCAL void cmdSearch(W unit)
}
DSP_F2(08X,(cAddr - (ep - cp)), S,":\n");
}
- // next
+ /* next */
cp += unit;
ofs = 0;
if (checkAbort()) break;
@@ -708,13 +708,13 @@ LOCAL void cmdCmpMov(W mov)
W i, n, cnt;
#define BFSZ (WRKBUF_SZ / 2)
- // extract address range
+ /* extract address range */
if (getAddrRange(1, 0x01, DEF_MEM_SIZE) || isnotDLM()) return;
- // transfer / compare target
+ /* transfer / compare target */
if (getNumber(0, &dst) || isnotEOC()) return;
- if (mov) { // memory transfer
+ if (mov) { /* memory transfer */
for (; (n = cLen) > 0 && checkAbort() == 0;
cAddr += n, dst += n, cLen -= n) {
if (n > WRKBUF_SZ) n = WRKBUF_SZ;
@@ -722,7 +722,7 @@ LOCAL void cmdCmpMov(W mov)
if (wriMemory(dst, wrkBuf, n, 1)) break;
}
- } else { // memory comparison
+ } else { /* memory comparison */
for (cnt = 0; (n = cLen) > 0 && checkAbort() == 0;
cAddr += n, dst += n, cLen -= n) {
if (n > BFSZ) n = BFSZ;
@@ -733,7 +733,7 @@ LOCAL void cmdCmpMov(W mov)
if (wrkBuf[i] == wrkBuf[BFSZ + i]) continue;
if (++cnt > MAX_DSP_CNT) {
DSP_S("..More..\n");
- cLen = 0; // terminate
+ cLen = 0; /* terminate */
break;
}
DSP_F4(08X,(cAddr + i), S,": ",
@@ -755,20 +755,20 @@ LOCAL void cmdIO(W unit)
UW port, data;
UB *dir;
- // extract port number
+ /* extract port number */
if (getNumber(0, &port)) return;
- if (unit & 0x10) { // output command
+ if (unit & 0x10) { /* output command */
if (!isDLM()) er_return(E_LESS);
if (getNumber(0, &data) || isnotEOC()) return;
if (writeIO(port, data, unit &= 0x0f) == 0) er_return(E_MACV);
dir = "<--";
- } else { // input command
+ } else { /* input command */
if (isnotEOC()) return;
if (readIO(port, &data, unit) == 0) er_return(E_MACV);
dir = "-->";
}
- // display result
+ /* display result */
DSP_F2(S,"Port ", 08X,port);
switch (unit) {
case 4: DSP_F5(S,":W ", S,dir, CH,' ', 08X,(UW)data, CH,'\n');
@@ -798,17 +798,17 @@ LOCAL void cmdRegister(void)
W rno;
UW num;
- if (token <= tEOC) { // ordinary register dump
+ if (token <= tEOC) { /* ordinary register dump */
dispRegister(-1);
- } else { // extract register name
+ } else { /* extract register name */
if (token != tSYM || (rno = searchRegister(tokenSym, 1)) < 0)
er_return(E_ILREG);
- if (getToken(0) <= tEOC) { // display register
+ if (getToken(0) <= tEOC) { /* display register */
dispRegister(rno);
- } else if (!isnotDLM() && !getNumber(0, &num)) { // set register
+ } else if (!isnotDLM() && !getNumber(0, &num)) { /* set register */
if (!isnotEOC())
er_return(setRegister(rno, num));
}
@@ -826,12 +826,12 @@ LOCAL void cmdGoTrace(W trace)
{
UW pc, par;
- // extract execution address
+ /* extract execution address */
pc = getCurPC();
if (token > tDLM && getNumber(0, &pc)) return;
if (invalidPC(pc)) er_return(E_PC);
- // extract end address or number of steps
+ /* extract end address or number of steps */
par = 0;
if (isDLM()) {
if (getNumber(0, &par)) return;
@@ -839,11 +839,11 @@ LOCAL void cmdGoTrace(W trace)
}
if (isnotEOC()) return;
- if (trace && par <= 0) par = 1; // number of steps
+ if (trace && par <= 0) par = 1; /* number of steps */
- //execute program
+ /*execute program */
errcode = goTrace(trace, pc, par);
- if (errcode >= E_OK) errcode = CMD_FINISH; //command process termination
+ if (errcode >= E_OK) errcode = CMD_FINISH; /*command process termination */
}
/*
display / set breakpoint command processing
@@ -856,19 +856,19 @@ LOCAL void cmdBreak( void )
W atr, cmdlen;
UB *cmd;
- if (token <= tEOC) { // display breakpoint
+ if (token <= tEOC) { /* display breakpoint */
dspBreak();
return;
}
- // extract breakpoint address
+ /* extract breakpoint address */
if (getNumber(0, &addr)) return;
- // extract break attribute and command
+ /* extract break attribute and command */
atr = cmdlen = 0;
cmd = NULL;
while (token == tDLM) {
- // "+:" are handled as symbols
+ /* "+:" are handled as symbols */
symExt[0] = '+'; symExt[1] = ':';
getToken(0);
symExt[0] = symExt[1] = '\0';
@@ -884,7 +884,7 @@ LOCAL void cmdBreak( void )
getToken(0);
}
- //set breakpoint
+ /*set breakpoint */
if (! isnotEOC()) {
if ((atr = setBreak(addr, atr, cmd, cmdlen))) er_return(atr);
}
@@ -899,9 +899,9 @@ LOCAL void cmdBrkClr(void)
UW addr;
if (token <= tEOC) {
- clearBreak(0); // clear all
+ clearBreak(0); /* clear all */
} else {
- do { // clear individual breakpoint
+ do { /* clear individual breakpoint */
if (getNumber(0, &addr)) return;
if (clearBreak(addr) < 0) er_return(E_BPUDF);
} while (isDLM());
@@ -927,7 +927,7 @@ LOCAL const struct {
{" ", 0x00}
};
- // extract protocol
+ /* extract protocol */
if (token != tSYM) er_return(E_LESS);
par = 0;
@@ -941,7 +941,7 @@ LOCAL const struct {
}
if (par == 0) er_return(E_PROTO);
- // extract start address
+ /* extract start address */
getToken(0);
if (isDLM()) {
if (getNumber(0, &addr)) return;
@@ -951,7 +951,7 @@ LOCAL const struct {
}
if (isnotEOC()) return;
- // execute loading
+ /* execute loading */
errcode = doLoading(par, addr, NULL);
}
/*
@@ -977,13 +977,13 @@ LOCAL void cmdDisk(W kind)
UW par[3], blksz, nblks;
UB c, devnm[L_DEVNM + 1];
- // extract device name
+ /* extract device name */
if (token <= tEOC) {
if (kind != 3) er_return(E_LESS);
devnm[0] = '\0';
} else {
if (token != tSYM || tokenLen > L_DEVNM) er_return(E_LESS);
- // device names are to be given in lower case letters
+ /* device names are to be given in lower case letters */
for (i = 0; i < tokenLen; i++) {
c = tokenSym[i];
if (c >= 'A' && c <= 'Z') c += 'a' - 'A';
@@ -993,7 +993,7 @@ LOCAL void cmdDisk(W kind)
getToken(0);
}
- // extract parameters
+ /* extract parameters */
if (kind <= 1) {
for (i = 0; i < 3; i++) {
if (isnotDLM()) return;
@@ -1003,11 +1003,11 @@ LOCAL void cmdDisk(W kind)
if (isnotEOC()) return;
switch(kind) {
- case 0: // ReadDisk
- case 1: // WriteDisk
+ case 0: /* ReadDisk */
+ case 1: /* WriteDisk */
errcode = rwDisk(devnm, par[0], par[1], (void*)par[2], kind);
break;
- case 2: // InfoDisk
+ case 2: /* InfoDisk */
errcode = infoDisk(devnm, &blksz, &nblks);
if (errcode >= E_OK) {
DSP_S(devnm);
@@ -1015,9 +1015,9 @@ LOCAL void cmdDisk(W kind)
S," Total blocks: ", D,nblks, CH,'\n');
}
break;
- case 3: // BootDisk
+ case 3: /* BootDisk */
errcode = bootDisk(( devnm[0] == '\0' )? NULL: devnm);
- if (errcode >= E_OK) errcode = CMD_FINISH; // Fin
+ if (errcode >= E_OK) errcode = CMD_FINISH; /* Fin */
break;
}
}
@@ -1030,14 +1030,14 @@ LOCAL void cmdExit(void)
{
W par;
- // extract parameters
+ /* extract parameters */
if (token <= tDLM) par = 0;
else if (getNumber(0, &par)) return;
DSP_S((par < 0) ? "** System Reset\n" : "** System Power Off\n");
waitMsec(100); /* give extra time for draining the remaining output */
- sysExit(par); // system reset or power off (never returnes)
+ sysExit(par); /* system reset or power off (never returnes) */
}
/*
forcible kill process command processing
@@ -1062,7 +1062,7 @@ LOCAL void cmdWrom(void)
UW addr, data;
W nsec;
- // extract parameters
+ /* extract parameters */
if (getNumber(0, &addr)) return;
if (isnotDLM() || getNumber(0, &data)) return;
if (isnotDLM() || getNumber(0, &nsec)) return;
@@ -1082,7 +1082,7 @@ LOCAL void cmdFlashLoad(void)
proto = P_TEXT | P_SFORM;
mode = 0;
- // extract attributes
+ /* extract attributes */
if (token > tEOC) {
if (token != tSYM) er_return(E_PAR);
for (i = 0; i < L_SYMBOL; i++) {
@@ -1097,7 +1097,7 @@ LOCAL void cmdFlashLoad(void)
if (isnotEOC()) return;
}
- // execute loading
+ /* execute loading */
setupFlashLoad(0, addr);
i = addr[1] - addr[0] + 1;
if (mode) {
@@ -1111,7 +1111,7 @@ LOCAL void cmdFlashLoad(void)
errcode = doLoading(proto, 0, addr);
if (errcode < 0) return;
- // FLASH ROM write
+ /* FLASH ROM write */
setupFlashLoad(-1, addr);
DSP_F5(S,"Writing Flash ROM at ", 08X,addr[0],
S," [", D,addr[2], S," blks] ... wait\n");
@@ -1121,11 +1121,11 @@ LOCAL void cmdFlashLoad(void)
command table
*/
typedef struct {
- UB fnm[12]; // full command name
- UB snm[4]; // abbreviated command name
- FP func; // processing function
- W para; // parameter information and other
- const HELP *help; // help message
+ UB fnm[12]; /* full command name */
+ UB snm[4]; /* abbreviated command name */
+ FP func; /* processing function */
+ W para; /* parameter information and other */
+ const HELP *help; /* help message */
} CMDTAB;
#define IGN_TRACE 0x1000
@@ -1218,7 +1218,7 @@ EXPORT void procCommand(UB *cmd, W fin)
{
W i, par;
- // initialize command input
+ /* initialize command input */
if (cmd) {
strcpy(lptr = lineBuf, cmd);
token = tEOC;
@@ -1227,29 +1227,29 @@ EXPORT void procCommand(UB *cmd, W fin)
fin = 0;
}
- // set DA address to PC
+ /* set DA address to PC */
daAddr = getCurPC();
for (;;) {
- // skip the remainder of the previous command
+ /* skip the remainder of the previous command */
while (token > tEOC) getToken(0);
- // input a command line
+ /* input a command line */
if (token == tEOL) {
- if (fin) break; // end
+ if (fin) break; /* end */
if (getLine(PROMPT) <= 0) continue;
}
- // skip comment
+ /* skip comment */
skipSpace();
if (*lptr == '*') {
getToken(0);
continue;
}
- // extract command
- if (getToken(0) <= tEOC) continue; // skip empty line
+ /* extract command */
+ if (getToken(0) <= tEOC) continue; /* skip empty line */
- // searching command
+ /* searching command */
errcode = errinfo = 0;
if ((i = searchCommand()) < 0) {
errcode = E_CMD;
@@ -1257,18 +1257,18 @@ EXPORT void procCommand(UB *cmd, W fin)
if (checkAbort()) continue;
par = cmdTab[i].para;
- // if there is an initial command, the execution command is ignored
+ /* if there is an initial command, the execution command is ignored */
if (fin < 0 && (par & IGN_TRACE)) continue;
- // read-ahead of parameters
+ /* read-ahead of parameters */
getToken(0);
- // command execution
+ /* command execution */
(*(cmdTab[i].func))(par & 0xff);
}
- if (errcode == CMD_FINISH) break; // finish
+ if (errcode == CMD_FINISH) break; /* finish */
- // display error
+ /* display error */
if (errcode < 0) dspError();
}
}
diff --git a/tkernel_source/monitor/cmdsvc/src/console.c b/tkernel_source/monitor/cmdsvc/src/console.c
index 7042d4a..ea95744 100644
--- a/tkernel_source/monitor/cmdsvc/src/console.c
+++ b/tkernel_source/monitor/cmdsvc/src/console.c
@@ -20,7 +20,7 @@
#include "cmdsvc.h"
-// control characters
+/* control characters */
#define BS ('H'-'@')
#define CAN ('X'-'@')
#define CTLC ('C'-'@')
@@ -33,16 +33,16 @@
#define CAN2 ('U'-'@')
#define TAB ('I'-'@')
#define ESC ('['-'@')
-#define CUR_UP ('P'-'@') // or ESC [ A
-#define CUR_DWN ('N'-'@') // or ESC [ B
-#define CUR_FWD ('F'-'@') // or ESC [ C
-#define CUR_BWD ('B'-'@') // or ESC [ D
+#define CUR_UP ('P'-'@') /* or ESC [ A */
+#define CUR_DWN ('N'-'@') /* or ESC [ B */
+#define CUR_FWD ('F'-'@') /* or ESC [ C */
+#define CUR_BWD ('B'-'@') /* or ESC [ D */
-#define HISTBUF_SZ 1024 // history buffer size
+#define HISTBUF_SZ 1024 /* history buffer size */
-LOCAL UB hist[HISTBUF_SZ]; // history buffer
-LOCAL W CTRL_C_IN; // CTRL-C input flag
-LOCAL W XOFF_IN; // XOFF input flag
+LOCAL UB hist[HISTBUF_SZ]; /* history buffer */
+LOCAL W CTRL_C_IN; /* CTRL-C input flag */
+LOCAL W XOFF_IN; /* XOFF input flag */
LOCAL const UB Digit[] = "0123456789ABCDEF";
/*
@@ -136,7 +136,7 @@ EXPORT W putHex8( UW val )
EXPORT W putDec( UW val )
{
W i;
- UB d[11]; // required columns for displaying 32-bit maximum cardinal(4,294,967,295) +1
+ UB d[11]; /* required columns for displaying 32-bit maximum cardinal(4,294,967,295) +1 */
for (i = 0; i < sizeof(d); i++) {
d[i] = Digit[val % 10];
@@ -188,7 +188,7 @@ EXPORT W getString( UB *str )
while (ep < L_LINE - 2) {
if ((c = getSIO(0)) <= 0) continue;
len = 1;
- if (c & 0x80) { // EUC 2 bytes characters
+ if (c & 0x80) { /* EUC 2 bytes characters */
if (c1 == 0) {c1 = c; continue;}
c |= c1 << 8;
c1 = 0;
@@ -196,7 +196,7 @@ EXPORT W getString( UB *str )
}
if (c == ESC) {esc = 1; continue;}
- if (esc) { // ESC sequence
+ if (esc) { /* ESC sequence */
if (esc == 1) {
esc = (c == '[') ? 2 : 0;
continue;
@@ -222,7 +222,7 @@ EXPORT W getString( UB *str )
}
continue;
}
- if (c == CUR_UP || c == CUR_DWN) { // history is recalled
+ if (c == CUR_UP || c == CUR_DWN) { /* history is recalled */
if (c == CUR_DWN) {
if (hp <= 0) continue;
for (hp--; (--hp) > 0 && hist[hp];);
@@ -277,12 +277,12 @@ EXPORT W getString( UB *str )
for (ep += len, i = cp; i < ep; i++) putSIO(str[i]);
for (cp += len; i > cp; i--) putSIO(BS);
}
- putSIO(CR); // echo back
+ putSIO(CR); /* echo back */
putSIO(LF);
str[ep] = '\0';
if (c == CTLC) return -1;
- if (ep) { // add to history buffer
+ if (ep) { /* add to history buffer */
i = ep + 1;
memmove(&hist[i], hist, HISTBUF_SZ - i);
memcpy(hist, str, i);
diff --git a/tkernel_source/monitor/cmdsvc/src/load.c b/tkernel_source/monitor/cmdsvc/src/load.c
index 6f14011..292a47c 100644
--- a/tkernel_source/monitor/cmdsvc/src/load.c
+++ b/tkernel_source/monitor/cmdsvc/src/load.c
@@ -20,24 +20,24 @@
#include "cmdsvc.h"
-LOCAL UW s_addr; // start address
-LOCAL UW e_addr; // end address + 1
-LOCAL UW offset; // address offset
-LOCAL UW loaddr; // address lower limit
-LOCAL UW hiaddr; // address upper limit
-LOCAL W blkno; // block number
-LOCAL W blkptr; // read pointer
-#define XBLK_SZ 1024 // XMODEM block size (extended)
-#define BLK_SZ 128 // XMODEM block size
-#define blkbuf wrkBuf // block buffer
-LOCAL W blksz; // block size
-
-LOCAL FUNCP readFn; // read function
-
-#define inputByte(tmo) getSIO(tmo) // input one byte
-#define outputByte(c) putSIO(c) // output one byte
-
-// XMODEM control codes
+LOCAL UW s_addr; /* start address */
+LOCAL UW e_addr; /* end address + 1 */
+LOCAL UW offset; /* address offset */
+LOCAL UW loaddr; /* address lower limit */
+LOCAL UW hiaddr; /* address upper limit */
+LOCAL W blkno; /* block number */
+LOCAL W blkptr; /* read pointer */
+#define XBLK_SZ 1024 /* XMODEM block size (extended) */
+#define BLK_SZ 128 /* XMODEM block size */
+#define blkbuf wrkBuf /* block buffer */
+LOCAL W blksz; /* block size */
+
+LOCAL FUNCP readFn; /* read function */
+
+#define inputByte(tmo) getSIO(tmo) /* input one byte */
+#define outputByte(c) putSIO(c) /* output one byte */
+
+/* XMODEM control codes */
#define SOH (0x01)
#define STX (0x02)
#define EOT (0x04)
@@ -56,11 +56,11 @@ LOCAL FUNCP readFn; // read function
* Since the timeout value for SOH is 10 seconds, the initial transfer always seem to wait for 10 seconds.
* The initial timeout for SOH is set to 3 seconds (only for the very first transfer.)
*/
-#define IDLE_TMO ( 1 * 1000) // idle wait(milliseconds)
-#define RECV_TMO ( 1 * 1000) // timeout for data input (milliseconds)
-#define SOH_TMO (10 * 1000) // timeout for SOH input (milliseconds)
-#define SOH1_TMO ( 3 * 1000) // timeout for the initial SOH input (milliseconds)
-#define MAX_RETRY 10 // maximum number of retries
+#define IDLE_TMO ( 1 * 1000) /* idle wait(milliseconds) */
+#define RECV_TMO ( 1 * 1000) /* timeout for data input (milliseconds) */
+#define SOH_TMO (10 * 1000) /* timeout for SOH input (milliseconds) */
+#define SOH1_TMO ( 3 * 1000) /* timeout for the initial SOH input (milliseconds) */
+#define MAX_RETRY 10 /* maximum number of retries */
/*
skip until there is no more input
@@ -99,50 +99,50 @@ LOCAL W xmodemRead(void)
}
for (;;) {
- // receiving block
+ /* receiving block */
for (i = 0;;) {
if (ctlch >= 0) {
- // ack/beginning character is transmitted
+ /* ack/beginning character is transmitted */
outputByte(ctlch);
- // leading letter in the ack is extracted
+ /* leading letter in the ack is extracted */
c = inputByte(SOH_TMO);
}
ctlch = NAK;
if (c == SOH) {blksz = BLK_SZ; break;}
if (c == STX) {blksz = XBLK_SZ; break;}
- if (c == CAN || c == CTLC) { // cancel transfer
- // Is CAN followed by another CAN?
+ if (c == CAN || c == CTLC) { /* cancel transfer */
+ /* Is CAN followed by another CAN? */
c = inputByte(IDLE_TMO);
if (c < 0 || c == CAN || c == CTLC)
return E_CANCEL;
- } else if (c == EOT) { // end of transmission
+ } else if (c == EOT) { /* end of transmission */
outputByte(ACK);
return E_END;
}
- purgeInput(); // skip data
+ purgeInput(); /* skip data */
if (++i >= MAX_RETRY) return E_XMODEM;
}
- // read a block number & check
+ /* read a block number & check */
if ((i = inputByte(RECV_TMO)) < 0) continue;
if ((c = inputByte(RECV_TMO)) < 0) continue;
if (i + c != 0xff) continue;
if (i != (blkno & 0xff)) {
if (i != ((blkno - 1) & 0xff)) return E_XMODEM;
- // skip if the previous block is read
+ /* skip if the previous block is read */
ctlch = ACK;
}
- // read the block itself
+ /* read the block itself */
for (cksum = 0, i = 0; i < blksz; i++) {
if ((c = inputByte(RECV_TMO)) < 0) break;
cksum += (blkbuf[i] = c);
}
if (c < 0) continue;
- // validate checksum
+ /* validate checksum */
if (inputByte(RECV_TMO) == cksum && ctlch != ACK) break;
}
blkptr = 0;
@@ -153,12 +153,12 @@ LOCAL W xmodemRead(void)
*/
LOCAL void xmodemEnd(W er)
{
- // finish XMODEM protocol
+ /* finish XMODEM protocol */
while (er >= 0) er = xmodemRead();
if (er != E_END && er != E_CANCEL) {
- purgeInput(); // wait until there is no more data
- outputByte(CAN); // transmite two (or more) consecutive CANs
+ purgeInput(); /* wait until there is no more data */
+ outputByte(CAN); /* transmite two (or more) consecutive CANs */
outputByte(CAN);
outputByte(CAN);
}
@@ -206,29 +206,29 @@ LOCAL W loadSform(void)
UW addr, a_addr;
UB cksum, buf[512];
- a_addr = s_addr; // real address
- s_addr = 0xffffffff; // highest load address
- e_addr = 0; // lowest load address
+ a_addr = s_addr; /* real address */
+ s_addr = 0xffffffff; /* highest load address */
+ e_addr = 0; /* lowest load address */
for (;;) {
if ((c = (*readFn)()) < 0) return c;
if (c != 'S') {
- if (c == CTLZ) break; // end
+ if (c == CTLZ) break; /* end */
continue;
}
if ((c = (*readFn)()) < 0) return c;
switch(c) {
- case '0': // header
+ case '0': /* header */
rtype = 0; break;
- case '1': // 2 byte address data
- case '2': // 3 byte address data
- case '3': // 4 byte address data
+ case '1': /* 2 byte address data */
+ case '2': /* 3 byte address data */
+ case '3': /* 4 byte address data */
rtype = c - '0' + 2; break;
- case '7': // 4 byte address termination
- case '8': // 3 byte address termination
- case '9': // 2 byte address termination
+ case '7': /* 4 byte address termination */
+ case '8': /* 3 byte address termination */
+ case '9': /* 2 byte address termination */
rtype = -1; break;
default: return E_LOADFMT;
}
@@ -238,26 +238,26 @@ LOCAL W loadSform(void)
if ((v = readHex()) < 0) return v;
cksum += (v += (v1 << 4));
- if (i == 0) { // byte counts
+ if (i == 0) { /* byte counts */
if ((bcnt = v - 1) < 0) return E_LOAD;
addr = 0;
continue;
}
- if (i > bcnt) { // checksum
+ if (i > bcnt) { /* checksum */
if (cksum != 0xff) return E_LOAD;
break;
}
if (rtype <= 0) continue;
- if (i < rtype) { // load address
+ if (i < rtype) { /* load address */
addr = (addr << 8) + v;
- } else { // data
+ } else { /* data */
buf[dcnt++] = (UB)v;
}
}
if (dcnt > 0) {
- // if we have address specification, then the first address
- // to be used as the designated address after suitable adjustment.
+ /* if we have address specification, then the first address */
+ /* to be used as the designated address after suitable adjustment. */
if (a_addr != 0) {
offset = a_addr - addr;
a_addr = 0;
@@ -270,7 +270,7 @@ LOCAL W loadSform(void)
if (addr < s_addr) s_addr = addr;
if ((addr += dcnt) > e_addr) e_addr = addr;
}
- if (rtype < 0) break; // end
+ if (rtype < 0) break; /* end */
}
return E_OK;
}
@@ -281,36 +281,36 @@ EXPORT ER doLoading(W proto, UW addr, UW *range)
{
ER er;
- e_addr = s_addr = addr; // load address
+ e_addr = s_addr = addr; /* load address */
- if (range) { // range specification
- loaddr = range[0]; // address lower limit
- hiaddr = range[1]; // address upper limit
- offset = range[2]; // address offset
+ if (range) { /* range specification */
+ loaddr = range[0]; /* address lower limit */
+ hiaddr = range[1]; /* address upper limit */
+ offset = range[2]; /* address offset */
} else {
- loaddr = 0; // address lower limit
- hiaddr = 0xFFFFFFFF; // address upper limit
- offset = 0; // address offset
+ loaddr = 0; /* address lower limit */
+ hiaddr = 0xFFFFFFFF; /* address upper limit */
+ offset = 0; /* address offset */
}
- if (proto & P_XMODEM) { // XMODEM
+ if (proto & P_XMODEM) { /* XMODEM */
readFn = (FUNCP)xmodemRead;
blkptr = blkno = blksz = 0;
- } else { // no protocol
+ } else { /* no protocol */
readFn = (FUNCP)textRead;
}
- if (proto & P_SFORM) { // S format
+ if (proto & P_SFORM) { /* S format */
er = loadSform();
if (er == E_END) er = E_LOAD;
- } else { // memory image
+ } else { /* memory image */
er = loadImage();
}
- // read termination processing
+ /* read termination processing */
if (proto & P_XMODEM) xmodemEnd(er);
- // wait until there is no more data
+ /* wait until there is no more data */
purgeInput();
if (er == E_END) er = E_OK;
@@ -318,7 +318,7 @@ EXPORT ER doLoading(W proto, UW addr, UW *range)
if (er == E_OK) {
e_addr--;
if (range) {
- range[0] = s_addr; // load address
+ range[0] = s_addr; /* load address */
range[1] = e_addr;
s_addr -= offset;
e_addr -= offset;
diff --git a/tkernel_source/monitor/cmdsvc/src/memory.c b/tkernel_source/monitor/cmdsvc/src/memory.c
index 15de498..f95a8bf 100644
--- a/tkernel_source/monitor/cmdsvc/src/memory.c
+++ b/tkernel_source/monitor/cmdsvc/src/memory.c
@@ -36,15 +36,15 @@ EXPORT W readMem(UW addr, void *buf, W len, W unit)
W i, n, alen;
MP pa, bp;
- // address misalignment is reported as error
+ /* address misalignment is reported as error */
if (addr & (unit - 1)) return 0;
bp.w = buf;
for (alen = 0; alen < len; alen += i) {
- // memory address check & conversion to physical address
+ /* memory address check & conversion to physical address */
n = chkMemAddr(addr + alen, &pa.a, len - alen, 0);
- if (n < unit) break; // illegal address
+ if (n < unit) break; /* illegal address */
i = 0;
switch(unit) {
@@ -69,16 +69,16 @@ EXPORT W writeMem(UW addr, void *buf, W len, W unit)
W i, n, sz, alen;
MP pa, bp;
- // address misalignment is reported as error
+ /* address misalignment is reported as error */
sz = unit & 0x0f;
if (addr & (sz - 1)) return 0;
bp.w = buf;
for (alen = 0; alen < len; alen += i) {
- // memory address check & conversion to physical address
+ /* memory address check & conversion to physical address */
n = chkMemAddr(addr + alen, &pa.a, len - alen, 1);
- if (n < sz) break; // illegal address
+ if (n < sz) break; /* illegal address */
i = 0;
switch(sz) {
@@ -115,9 +115,9 @@ EXPORT W readMemStr(UW addr, void *buf, W len)
UW pa;
for (alen = 0; alen < len; alen += i) {
- // memory address check & conversion to physical address
+ /* memory address check & conversion to physical address */
n = chkMemAddr(addr + alen, &pa, len - alen, 0);
- if (n == 0) break; // illegal address
+ if (n == 0) break; /* illegal address */
for (i = 0; i < n; i++, buf++, pa++) {
if ((*(UB*)buf = rd_b((UB*)pa)) == 0) return alen + i;
}
@@ -132,10 +132,10 @@ EXPORT W readIO(UW addr, UW *data, W unit)
W n;
UW pa;
- // address misalignment is reported as error
+ /* address misalignment is reported as error */
if (addr & (unit - 1)) return 0;
- // I/O address check & conversion to physical address
+ /* I/O address check & conversion to physical address */
n = chkIOAddr(addr, &pa, unit);
if (n < unit) return 0;
@@ -154,10 +154,10 @@ EXPORT W writeIO(UW addr, UW data, W unit)
W n;
UW pa;
- // address misalignment is reported as error
+ /* address misalignment is reported as error */
if (addr & (unit - 1)) return 0;
- // I/O address check & conversion to physical address
+ /* I/O address check & conversion to physical address */
n = chkIOAddr(addr, &pa, unit);
if (n < unit) return 0;
diff --git a/tkernel_source/monitor/driver/flash/src/cfi_16x1.c b/tkernel_source/monitor/driver/flash/src/cfi_16x1.c
index 7082700..a89cff3 100644
--- a/tkernel_source/monitor/driver/flash/src/cfi_16x1.c
+++ b/tkernel_source/monitor/driver/flash/src/cfi_16x1.c
@@ -21,21 +21,21 @@
#include "flash.h"
#ifndef SECSZ
-#define SECSZ 0x20000 // sector size 128kB x 1
+#define SECSZ 0x20000 /* sector size 128kB x 1 */
#endif
#ifndef BSECSZ
-#define BSECSZ 0x02000 // boot sector size 8KB x 1
+#define BSECSZ 0x02000 /* boot sector size 8KB x 1 */
#endif
-#define SECMSK (SECSZ - 1) // sector mask
+#define SECMSK (SECSZ - 1) /* sector mask */
-#define MAX_RETRY (3) // maximum number of retries
-#define WAIT_CNT 0x10000000 // wait count (enough time)
+#define MAX_RETRY (3) /* maximum number of retries */
+#define WAIT_CNT 0x10000000 /* wait count (enough time) */
-#define WBSZ (16) // write buffer size (H unit)
+#define WBSZ (16) /* write buffer size (H unit) */
-EXPORT const UW FROM_SECSZ = SECSZ; // sector size
+EXPORT const UW FROM_SECSZ = SECSZ; /* sector size */
/*
* check Flash ROM
@@ -48,8 +48,8 @@ LOCAL const JEDEC_SPEC *checkFlashROM(_UH *rom)
/* read Signature */
rom[0] = 0x0090;
- man = rom[0] & 0x00ff; // ignore upper 8 bits
- dev = rom[1] & 0x00ff; // ignore upper 8 bits
+ man = rom[0] & 0x00ff; /* ignore upper 8 bits */
+ dev = rom[1] & 0x00ff; /* ignore upper 8 bits */
/* obtain Flash ROM specification */
for (i = 0; i < N_JedecSpec; ++i) {
@@ -59,7 +59,7 @@ LOCAL const JEDEC_SPEC *checkFlashROM(_UH *rom)
return spec;
}
- return NULL; // unsupported target
+ return NULL; /* unsupported target */
}
/*
@@ -109,12 +109,12 @@ LOCAL ER writesec(_UH *rom, UH *data, const JEDEC_SPEC *spec)
/* wait for completion of erasure */
for (i = WAIT_CNT; --i >= 0 && ((d = *rp) & 0x0080) == 0; );
if (i < 0 || (d & 0x003A) != 0) {
- *rp = 0x0050; // clear error
+ *rp = 0x0050; /* clear error */
return E_IO;
}
}
- if (data == NULL) return E_OK; // erase only
+ if (data == NULL) return E_OK; /* erase only */
/* write (using a buffer) */
rp = rom;
@@ -123,7 +123,7 @@ LOCAL ER writesec(_UH *rom, UH *data, const JEDEC_SPEC *spec)
xp = rp;
for (i = WAIT_CNT; --i >= 0; ) {
*rp = 0x00E8;
- if (*xp & 0x0080) break; // XSR check
+ if (*xp & 0x0080) break; /* XSR check */
}
if (i < 0) goto abort;
@@ -132,10 +132,10 @@ LOCAL ER writesec(_UH *rom, UH *data, const JEDEC_SPEC *spec)
*xp = 0x00D0;
/* wait for completion of write */
- // *xp = 0x0070;
+ /* *xp = 0x0070; */
for (i = WAIT_CNT; --i >= 0 && ((d = *xp) & 0x0080) == 0; );
if (i < 0 || (d & 0x001A) != 0) {
- *xp = 0x0050; // clear error
+ *xp = 0x0050; /* clear error */
goto abort;
}
}
@@ -193,7 +193,7 @@ EXPORT ER flashwr(UW addr, void *data, W nsec, BOOL reset)
data = (B *)data + SECSZ;
}
- if (reset) flashwr_reset(); // do not return
+ if (reset) flashwr_reset(); /* do not return */
return E_OK;
}
diff --git a/tkernel_source/monitor/driver/flash/src/reset-em1d.c b/tkernel_source/monitor/driver/flash/src/reset-em1d.c
index e7f317e..c8618b9 100644
--- a/tkernel_source/monitor/driver/flash/src/reset-em1d.c
+++ b/tkernel_source/monitor/driver/flash/src/reset-em1d.c
@@ -33,10 +33,10 @@ EXPORT void flashwr_reset( void )
void (* volatile reset_p)( void ) = 0;
/* Remap the NOR FlashROM area to its original space, and jump */
- *PAGETBL_BASE = 0x9402; // Strongly-order, Kernel/RO
+ *PAGETBL_BASE = 0x9402; /* Strongly-order, Kernel/RO */
DSB();
- Asm("mcr p15, 0, %0, cr8, cr7, 0":: "r"(0)); // I/D TLB invalidate
- Asm("mcr p15, 0, %0, cr7, cr5, 6":: "r"(0)); // invalidate BTC
+ Asm("mcr p15, 0, %0, cr8, cr7, 0":: "r"(0)); /* I/D TLB invalidate */
+ Asm("mcr p15, 0, %0, cr7, cr5, 6":: "r"(0)); /* invalidate BTC */
DSB();
ISB();
(*reset_p)(); /* call reset entry (does not return) */
diff --git a/tkernel_source/monitor/driver/sio/src/ns16550.c b/tkernel_source/monitor/driver/sio/src/ns16550.c
index c020da2..12c16b0 100644
--- a/tkernel_source/monitor/driver/sio/src/ns16550.c
+++ b/tkernel_source/monitor/driver/sio/src/ns16550.c
@@ -43,10 +43,10 @@ typedef struct {
# define IOSTEP 4
# define CLOCK 229376000
-// Unlike ordinary 16550, all registers exist and are independently accessed.
-// (No overlaid meaning/behavior per read or write, or switching of register sets is necessary.
-// also, 16-bits read/write to data register while FIFO is enabled causes two character input/output.)
-//
+/* Unlike ordinary 16550, all registers exist and are independently accessed.
+ * (No overlaid meaning/behavior per read or write, or switching of register sets is necessary.
+ * also, 16-bits read/write to data register while FIFO is enabled causes two character input/output.) */
+
#define UART(n) ( IOB + (n) * IOSTEP )
#define regDATA UART(0) /* data register (RW) */
#define regINTE UART(1) /* interrupt enable register (RW) */
diff --git a/tkernel_source/monitor/hwdepend/tef_em1d/src/config.c b/tkernel_source/monitor/hwdepend/tef_em1d/src/config.c
index 33e33d8..d6fda24 100644
--- a/tkernel_source/monitor/hwdepend/tef_em1d/src/config.c
+++ b/tkernel_source/monitor/hwdepend/tef_em1d/src/config.c
@@ -30,19 +30,19 @@ IMPORT ER initMemDisk(DISKCB *, const CFGDISK *);
/* memory region definition */
EXPORT MEMSEG MemSeg[] = {
- // Bank1/2/3
+ /* Bank1/2/3 */
{0x10000000, 0x30000000, MSA_IO, PGA_RW|PGA_D |PGA_S|PGA_XN},
- // DDR2 SDRAM, 64Mbyte
+ /* DDR2 SDRAM, 64Mbyte */
{0x30000000, 0x40000000, MSA_RAM, PGA_RW|PGA_C},
- // EM1 internal device (1)
+ /* EM1 internal device (1) */
{0x40000000, 0x70000000, MSA_IO, PGA_RW|PGA_D |PGA_S|PGA_XN},
- // Bank0
+ /* Bank0 */
{0x70000000, 0x72000000, MSA_FROM, PGA_RO|PGA_C |0x90000000},
- // EM1 internal SRAM
+ /* EM1 internal SRAM */
{0xa0000000, 0xb0000000, MSA_SRAM, PGA_RW|PGA_NC},
- // EM1 internal device (2)
+ /* EM1 internal device (2) */
{0xb0000000, 0xd0000000, MSA_IO, PGA_RW|PGA_D |PGA_S|PGA_XN},
- // EM1 internal Boot ROM
+ /* EM1 internal Boot ROM */
{0xf0000000, 0xffffffff, MSA_ROM, PGA_RO|PGA_NC},
{0x70000000, 0x70020000, MSA_MON, 0},
@@ -77,14 +77,14 @@ EXPORT const W N_ConfigSIO = sizeof(ConfigSIO) / sizeof(CFGSIO);
* list in the order of port number
*/
EXPORT const CFGDISK ConfigDisk[] = {
- {"rda", DA_RONLY, initMemDisk, 0}, // FlashROM
+ {"rda", DA_RONLY, initMemDisk, 0}, /* FlashROM */
};
EXPORT const W N_ConfigDisk = sizeof(ConfigDisk) / sizeof(CFGDISK);
/* boot information */
-EXPORT const UH BootSignature = 0xe382; // signature
-EXPORT UB * const PBootAddr = (UB *)0x30200000; // primary boot loader address
+EXPORT const UH BootSignature = 0xe382; /* signature */
+EXPORT UB * const PBootAddr = (UB *)0x30200000; /* primary boot loader address */
/* ------------------------------------------------------------------------ */
@@ -110,7 +110,7 @@ EXPORT UB * const PBootAddr = (UB *)0x30200000; // primary boot loader address
#define IIC_TOPDATA (1 << 11)
#define IIC_LASTDATA (1 << 10)
-#define TIMEOUT 1000000 // microsec
+#define TIMEOUT 1000000 /* microsec */
#define IIC2_IRQ 39
#define IRQbit(x) (1 << ((x) % 32))
@@ -131,7 +131,7 @@ LOCAL ER wait_state(UW addr, UW mask, UW value)
/* interrupt Raw status / clear */
LOCAL void clear_int(void)
{
- out_w(IT0_IIR, IRQbit(IIC2_IRQ)); // IRQ39 clear
+ out_w(IT0_IIR, IRQbit(IIC2_IRQ)); /* IRQ39 clear */
return;
}
@@ -259,10 +259,10 @@ LOCAL ER iic_start(void)
ER er;
/* initialization default */
- out_w(IIC_IICC(IIC2), 0); // stop completely
- out_w(IIC_IICCL(IIC2), IICCL_SMC | IICCL_DFC); // fast mode + filter
- out_w(IIC_IICF(IIC2), IICF_STCEN | IICF_IICRSV);// forcibly start transmission
- out_w(IIC_IICC(IIC2), IICC_IICE | IICC_WTIM); // IIC mode, 9bit mode
+ out_w(IIC_IICC(IIC2), 0); /* stop completely */
+ out_w(IIC_IICCL(IIC2), IICCL_SMC | IICCL_DFC); /* fast mode + filter */
+ out_w(IIC_IICF(IIC2), IICF_STCEN | IICF_IICRSV);/* forcibly start transmission */
+ out_w(IIC_IICC(IIC2), IICC_IICE | IICC_WTIM); /* IIC mode, 9bit mode */
clear_int();
/* wait for bus to become available (since there is only one master, the bus is supposed to be unoccupied) */
@@ -274,7 +274,7 @@ LOCAL ER iic_start(void)
/* stop IIC send/receive */
LOCAL void iic_finish(void)
{
- out_w(IIC_IICC(IIC2), 0); // stop completely
+ out_w(IIC_IICC(IIC2), 0); /* stop completely */
return;
}
@@ -316,9 +316,9 @@ LOCAL void IICGPIOWrite(W addr, W dat)
IMPORT W pmicRead(W reg);
IMPORT W pmicWrite(W reg, W dat);
-#define pmicDelay(x) waitUsec(4) // about 16msec
-#define USBPowerOn 0xe0 // GPIO13(OD), High * power is supplied to A connector only
-#define USBPowerOff 0xe0 // GPIO13(OD), High
+#define pmicDelay(x) waitUsec(4) /* about 16msec */
+#define USBPowerOn 0xe0 /* GPIO13(OD), High * power is supplied to A connector only */
+#define USBPowerOff 0xe0 /* GPIO13(OD), High */
/* obtain DipSw status */
EXPORT UW DipSwStatus(void)
@@ -350,14 +350,14 @@ EXPORT void powerOff(void)
{
W i;
- for (i = 10; i < 14; i++) pmicWrite(i, 0xff); // IRQ_MASK_A-D (mask)
+ for (i = 10; i < 14; i++) pmicWrite(i, 0xff); /* IRQ_MASK_A-D (mask) */
pmicDelay();
- for (i = 5 ; i < 9; i++) pmicWrite(i, 0xff); // EVENT_A-D (clear)
+ for (i = 5 ; i < 9; i++) pmicWrite(i, 0xff); /* EVENT_A-D (clear) */
pmicDelay();
while (1) {
- pmicWrite(15, 0x60); // DEEP_SLEEP
+ pmicWrite(15, 0x60); /* DEEP_SLEEP */
pmicDelay();
}
}
@@ -367,7 +367,7 @@ EXPORT void resetStart(void)
{
while (1) {
/* reset */
- pmicWrite(15, 0xac); // SHUTDOWN
+ pmicWrite(15, 0xac); /* SHUTDOWN */
pmicDelay();
}
}
@@ -376,7 +376,7 @@ EXPORT void resetStart(void)
EXPORT void initHardware(void)
{
/* enable abort switch interrupt */
- out_w(GIO_IDT1(GIO_L), 0x00000008); // asynchronous leading-edge high interrupt
+ out_w(GIO_IDT1(GIO_L), 0x00000008); /* asynchronous leading-edge high interrupt */
out_w(GIO_IIR(GIO_L), 0x00000100);
out_w(GIO_IIA(GIO_L), 0x00000100);
out_w(GIO_IEN(GIO_L), 0x00000100);
@@ -389,10 +389,10 @@ EXPORT void cpuLED(UW v)
{
UB m, d, r, c;
- m = ~((v >> 16) | 0xf0); // mask (0:unmodified 1:modify)
- d = ~((v >> 0) | 0xf0); // set value (0:on 1:off)
+ m = ~((v >> 16) | 0xf0); /* mask (0:unmodified 1:modify) */
+ d = ~((v >> 0) | 0xf0); /* set value (0:on 1:off) */
r = IICGPIORead(0xb9);
- c = (r ^ d) & m; // modify flag (0:unmodified 1:modify)
+ c = (r ^ d) & m; /* modify flag (0:unmodified 1:modify) */
IICGPIOWrite(0xb8, r ^ c);
}
@@ -558,28 +558,28 @@ EXPORT W procHwInt(UW vec)
*/
EXPORT const UW GPIOConfig[] __attribute__((section(".startup"))) = {
CHG_PINSEL_G(0),
- 0x55400C00, // AB0_CLK,AB0_AD3-0,CAM_SCLK
+ 0x55400C00, /* AB0_CLK,AB0_AD3-0,CAM_SCLK */
CHG_PINSEL_G(16),
- 0x55555555, // AB0_AD15-4,AB0_A20-17
+ 0x55555555, /* AB0_AD15-4,AB0_A20-17 */
CHG_PINSEL_G(32),
- 0x54555055, // AB0_BEN1-0,AB0_CSB3,AB0_CSB1-0,
- // AB0_WAIT,AB0_WRB,AB0_RDB,AB0_ADV,
- // AB0_A24-21
+ 0x54555055, /* AB0_BEN1-0,AB0_CSB3,AB0_CSB1-0, */
+ /* AB0_WAIT,AB0_WRB,AB0_RDB,AB0_ADV, */
+ /* AB0_A24-21 */
- CHG_CTRL_AB0_BOOT, // AB0(AsyncBus0) pin:
- 0x00000001, // configured by PINSEL
+ CHG_CTRL_AB0_BOOT, /* AB0(AsyncBus0) pin: */
+ 0x00000001, /* configured by PINSEL */
CHG_PINSEL_G(48),
- 0x55555555, // LCD,SP0_CS2-1
+ 0x55555555, /* LCD,SP0_CS2-1 */
CHG_PINSEL_G(64),
- 0xffc05555, // CAM_YUV4-0,LCD
+ 0xffc05555, /* CAM_YUV4-0,LCD */
CHG_PINSEL_G(80),
- 0x06556940, // SD2_CKI,CAM_CLKI,SD0_CKI,SD0_DATA3-1,
- // PM0,URT1,IIC
+ 0x06556940, /* SD2_CKI,CAM_CLKI,SD0_CKI,SD0_DATA3-1, */
+ /* PM0,URT1,IIC */
CHG_PINSEL_G(96),
- 0x55555555, // URT2,USB
+ 0x55555555, /* URT2,USB */
CHG_PINSEL_G(112),
- 0x00000555, // SD2
+ 0x00000555, /* SD2 */
CHG_PINSEL_SP0,
0x00000000,
CHG_PINSEL_DTV,
@@ -591,79 +591,79 @@ EXPORT const UW GPIOConfig[] __attribute__((section(".startup"))) = {
CHG_PINSEL_IIC2,
0x00000000,
CHG_PULL_G(0),
- 0x55055005, // P7,P6,P4,P3,P0: IN, pull-up/down dis
+ 0x55055005, /* P7,P6,P4,P3,P0: IN, pull-up/down dis */
CHG_PULL_G(8),
- 0x00000005, // P8: IN, pull-up/down dis
+ 0x00000005, /* P8: IN, pull-up/down dis */
CHG_PULL_G(16),
- 0x00000000, // (default)
+ 0x00000000, /* (default) */
CHG_PULL_G(24),
- 0x00000000, // (default)
+ 0x00000000, /* (default) */
CHG_PULL_G(32),
- 0x00550000, // P37,36: IN, pull-up/down dis
+ 0x00550000, /* P37,36: IN, pull-up/down dis */
CHG_PULL_G(40),
- 0x00050000, // P44: IN, pull-up/down dis
+ 0x00050000, /* P44: IN, pull-up/down dis */
CHG_PULL_G(48),
- 0x11111111, // (default)
+ 0x11111111, /* (default) */
CHG_PULL_G(56),
- 0x11111111, // (default)
+ 0x11111111, /* (default) */
CHG_PULL_G(64),
- 0x11111111, // (default)
+ 0x11111111, /* (default) */
CHG_PULL_G(72),
- 0x00000005, // P72: IN, pull-up/down dis
+ 0x00000005, /* P72: IN, pull-up/down dis */
CHG_PULL_G(80),
- 0x00400050, // P81: IN, pull-up/down dis
- // URT1_SRIN: IN, pull-down
+ 0x00400050, /* P81: IN, pull-up/down dis */
+ /* URT1_SRIN: IN, pull-down */
CHG_PULL_G(88),
- 0x55000444, // P95,94: IN, pull-up/down dis
- // SD0_DATA3-1: IN, pull-down
+ 0x55000444, /* P95,94: IN, pull-up/down dis */
+ /* SD0_DATA3-1: IN, pull-down */
CHG_PULL_G(96),
- 0x44444444, // USB signals: IN, pull-down
+ 0x44444444, /* USB signals: IN, pull-down */
CHG_PULL_G(104),
- 0x04044444, // USB signals: IN, pull-down
- // URT2_CTSB,URT2_SRIN: IN, pull-down
+ 0x04044444, /* USB signals: IN, pull-down */
+ /* URT2_CTSB,URT2_SRIN: IN, pull-down */
CHG_PULL_G(112),
- 0x00000000, // (default)
+ 0x00000000, /* (default) */
CHG_PULL_G(120),
- 0x00000000, // (default)
+ 0x00000000, /* (default) */
CHG_PULL(0),
- 0x50000004, // URT0_SRIN: IN, pull-up/down dis
- // DEBUG_EN: IN, pull-down
+ 0x50000004, /* URT0_SRIN: IN, pull-up/down dis */
+ /* DEBUG_EN: IN, pull-down */
CHG_PULL(1),
- 0x15110600, // SP0_SO: OUT, pull-up/down dis
- // SP0_SI: IN, pull-up/down dis
- // SP0_CS: OUT, pull-up/down dis
- // SP0_CK: OUT, pull-up/down dis
- // JT0C: IN, pull-up
- // JT0B: OUT, pull-down
- // JT0A: OUT, pull-down
+ 0x15110600, /* SP0_SO: OUT, pull-up/down dis */
+ /* SP0_SI: IN, pull-up/down dis */
+ /* SP0_CS: OUT, pull-up/down dis */
+ /* SP0_CK: OUT, pull-up/down dis */
+ /* JT0C: IN, pull-up */
+ /* JT0B: OUT, pull-down */
+ /* JT0A: OUT, pull-down */
CHG_PULL(2),
- 0x60000661, // PM0_SEN: IN, pull-up
- // SD0_DAT: IN, pull-up
- // SD1_CMD: IN, pull-up
- // SD0_CLK: OUT, pull-up/down dis
+ 0x60000661, /* PM0_SEN: IN, pull-up */
+ /* SD0_DAT: IN, pull-up */
+ /* SD1_CMD: IN, pull-up */
+ /* SD0_CLK: OUT, pull-up/down dis */
CHG_PULL(3),
- 0x00000000, // (default)
+ 0x00000000, /* (default) */
GIO_E0(GIO_L),
- 0x000001d9, // P8,P7,P6,P4,P3,P0: IN
+ 0x000001d9, /* P8,P7,P6,P4,P3,P0: IN */
GIO_E1(GIO_L),
- 0x00000604, // P10,P9,P2: OUT
+ 0x00000604, /* P10,P9,P2: OUT */
GIO_E0(GIO_H),
- 0x00001030, // P44,P37,P36: IN
+ 0x00001030, /* P44,P37,P36: IN */
GIO_E1(GIO_H),
- 0x00000000, // (default)
+ 0x00000000, /* (default) */
GIO_E0(GIO_HH),
- 0xc0020100, // P95,P94,P81,P72:IN
+ 0xc0020100, /* P95,P94,P81,P72:IN */
GIO_E1(GIO_HH),
- 0x00040200, // P82,P73: OUT
+ 0x00040200, /* P82,P73: OUT */
GIO_OL(GIO_L),
- 0x06040000, // P10,P9,P2=0
+ 0x06040000, /* P10,P9,P2=0 */
GIO_OL(GIO_HH),
- 0x02000000, // P73=0
+ 0x02000000, /* P73=0 */
GIO_OH(GIO_HH),
- 0x00040000, // P82=0
+ 0x00040000, /* P82=0 */
- 0x00000000, // (terminate)
+ 0x00000000, /* (terminate) */
0x00000000,
};
diff --git a/tkernel_source/monitor/hwdepend/tef_em1d/src/cpuctrl.c b/tkernel_source/monitor/hwdepend/tef_em1d/src/cpuctrl.c
index 0278d6e..2580cef 100644
--- a/tkernel_source/monitor/hwdepend/tef_em1d/src/cpuctrl.c
+++ b/tkernel_source/monitor/hwdepend/tef_em1d/src/cpuctrl.c
@@ -44,7 +44,7 @@ EXPORT void EnableCache( void )
*/
EXPORT void DisableCache( void )
{
- // MMU can NOT be turned off with this CPU.
+ /* MMU can NOT be turned off with this CPU. */
setCacheMMU(DIS_CACHEONLY);
}
diff --git a/tkernel_source/monitor/hwdepend/tef_em1d/src/setup_em1d512.h b/tkernel_source/monitor/hwdepend/tef_em1d/src/setup_em1d512.h
index ec96721..e733589 100644
--- a/tkernel_source/monitor/hwdepend/tef_em1d/src/setup_em1d512.h
+++ b/tkernel_source/monitor/hwdepend/tef_em1d/src/setup_em1d512.h
@@ -20,15 +20,15 @@
* this file included from assembly source files, too.
*/
-#define EITENT_BASE 0x70000000 // address for exception branch processing
-#define PAGETBL_BASE 0x30000000 // address of the first level table page.
+#define EITENT_BASE 0x70000000 /* address for exception branch processing */
+#define PAGETBL_BASE 0x30000000 /* address of the first level table page. */
/*
* clock value
*/
-#define PLL1_CLK 499712 // 499.712MHz
-#define PLL2_CLK 401418 // 401.408MHz
-#define PLL3_CLK 229376 // 229.376MHz
+#define PLL1_CLK 499712 /* 499.712MHz */
+#define PLL2_CLK 401418 /* 401.408MHz */
+#define PLL3_CLK 229376 /* 229.376MHz */
#define ACPU_CLK (PLL1_CLK / 1)
#define Txx_CLK (PLL3_CLK / 8)
@@ -36,12 +36,12 @@
/*
* assignment to DipSw (switches)
*/
-#define SW_ABT 0x0100 // Abort SW
-#define SW_MON 0x0020 // Monitor Boot
-#define SW_BHI 0x0000 // fix HI_BAUD_RATE
+#define SW_ABT 0x0100 /* Abort SW */
+#define SW_MON 0x0020 /* Monitor Boot */
+#define SW_BHI 0x0000 /* fix HI_BAUD_RATE */
/*
* LED display (two bits, 2 bits)
*/
-#define LED_POWERUP 0x01 // Power-on
-#define LED_MEMCLR 0xff // Memory clear
+#define LED_POWERUP 0x01 /* Power-on */
+#define LED_MEMCLR 0xff /* Memory clear */
diff --git a/tkernel_source/monitor/hwdepend/tef_em1d/src/system.c b/tkernel_source/monitor/hwdepend/tef_em1d/src/system.c
index e07039f..fb541a0 100644
--- a/tkernel_source/monitor/hwdepend/tef_em1d/src/system.c
+++ b/tkernel_source/monitor/hwdepend/tef_em1d/src/system.c
@@ -64,14 +64,14 @@ IMPORT W N_NoMemSeg;
/* initialize SPI for PMIC communication */
LOCAL void pmicInit(void)
{
- out_w(SPn_MODE(SP0), 0x2700); // 8bit, CS0, Master, CPU mode
- out_w(SPn_TIECS(SP0), 0x000f); // CS0: follow the specification by SPn_POL
+ out_w(SPn_MODE(SP0), 0x2700); /* 8bit, CS0, Master, CPU mode */
+ out_w(SPn_TIECS(SP0), 0x000f); /* CS0: follow the specification by SPn_POL */
out_w(SPn_POL(SP0), SPIPol);
- out_w(SPn_ENCLR(SP0), ~0); // interrupt disable
+ out_w(SPn_ENCLR(SP0), ~0); /* interrupt disable */
- out_w(SPn_CONTROL(SP0), 0x0100); // start reset
+ out_w(SPn_CONTROL(SP0), 0x0100); /* start reset */
waitUsec(10);
- out_w(SPn_CONTROL(SP0), 0x0000); // release reset
+ out_w(SPn_CONTROL(SP0), 0x0000); /* release reset */
out_w(SPn_CONTROL2(SP0), 0x0000);
return;
@@ -106,19 +106,19 @@ EXPORT W pmicRead(W reg)
{
W dat;
- pmicCSassert(TRUE); // CS assert
+ pmicCSassert(TRUE); /* CS assert */
- out_w(SPn_FFCLR(SP0), ~0); // status flag is cleared
- out_w(SPn_TX_DATA(SP0), (reg << 1) | 1); // send register number
- out_w(SPn_CONTROL(SP0), 0x0009); // send start
+ out_w(SPn_FFCLR(SP0), ~0); /* status flag is cleared */
+ out_w(SPn_TX_DATA(SP0), (reg << 1) | 1); /* send register number */
+ out_w(SPn_CONTROL(SP0), 0x0009); /* send start */
pmicWait();
- out_w(SPn_FFCLR(SP0), ~0); // status flag is cleared
- out_w(SPn_CONTROL(SP0), 0x0005); // start receive
+ out_w(SPn_FFCLR(SP0), ~0); /* status flag is cleared */
+ out_w(SPn_CONTROL(SP0), 0x0005); /* start receive */
pmicWait();
- dat = in_w(SPn_RX_DATA(SP0)); // data received
+ dat = in_w(SPn_RX_DATA(SP0)); /* data received */
- pmicCSassert(FALSE); // CS de-assert
+ pmicCSassert(FALSE); /* CS de-assert */
return dat;
}
@@ -126,19 +126,19 @@ EXPORT W pmicRead(W reg)
/* write PMIC register */
EXPORT void pmicWrite(W reg, W dat)
{
- pmicCSassert(TRUE); // CS assert
+ pmicCSassert(TRUE); /* CS assert */
- out_w(SPn_FFCLR(SP0), ~0); // status flag is cleared
- out_w(SPn_TX_DATA(SP0), reg << 1); // send register number
- out_w(SPn_CONTROL(SP0), 0x0009); // send start
+ out_w(SPn_FFCLR(SP0), ~0); /* status flag is cleared */
+ out_w(SPn_TX_DATA(SP0), reg << 1); /* send register number */
+ out_w(SPn_CONTROL(SP0), 0x0009); /* send start */
pmicWait();
- out_w(SPn_FFCLR(SP0), ~0); // status flag is cleared
- out_w(SPn_TX_DATA(SP0), dat); // send data
- out_w(SPn_CONTROL(SP0), 0x0009); // send start
+ out_w(SPn_FFCLR(SP0), ~0); /* status flag is cleared */
+ out_w(SPn_TX_DATA(SP0), dat); /* send data */
+ out_w(SPn_CONTROL(SP0), 0x0009); /* send start */
pmicWait();
- pmicCSassert(FALSE); // CS de-assert
+ pmicCSassert(FALSE); /* CS de-assert */
return;
}
@@ -157,30 +157,30 @@ EXPORT void resetSystem(W boot)
DisCacheMMU();
/* set up interrupt controller */
- out_w(IT0_IDS0, ~0); // CPU: all interrupts disabled
+ out_w(IT0_IDS0, ~0); /* CPU: all interrupts disabled */
out_w(IT0_IDS1, ~0);
out_w(IT0_IDS2, ~0);
out_w(IT0_IIR, ~0);
out_w(IT3_IPI0_CLR, 0x0000003f);
- out_w(IT3_IDS0, ~0); // DSP: all interrupts disabled
+ out_w(IT3_IDS0, ~0); /* DSP: all interrupts disabled */
out_w(IT3_IDS1, ~0);
out_w(IT3_IDS2, ~0);
out_w(IT3_IIR, ~0);
out_w(IT0_IPI3_CLR, 0x0000003f);
- out_w(IT0_FID, 0x00000001); // CPU: FIQ disabled
- out_w(GIO_IIA(GIO_L), 0); // GPIO: interrupt disabled
+ out_w(IT0_FID, 0x00000001); /* CPU: FIQ disabled */
+ out_w(GIO_IIA(GIO_L), 0); /* GPIO: interrupt disabled */
out_w(GIO_IIA(GIO_H), 0);
out_w(GIO_IIA(GIO_HH), 0);
out_w(GIO_IIA(GIO_HHH), 0);
- out_w(GIO_GSW(GIO_L), 0); // GPIO: FIQ interrupt disabled
+ out_w(GIO_GSW(GIO_L), 0); /* GPIO: FIQ interrupt disabled */
out_w(GIO_GSW(GIO_H), 0);
out_w(GIO_GSW(GIO_HH), 0);
out_w(GIO_GSW(GIO_HHH), 0);
- out_w(IT0_LIIR, 0x0000000f); // internal interrupt disabled
- out_w(IT_PINV_CLR0, ~0); // inhibit interrupt polarity inversion
+ out_w(IT0_LIIR, 0x0000000f); /* internal interrupt disabled */
+ out_w(IT_PINV_CLR0, ~0); /* inhibit interrupt polarity inversion */
out_w(IT_PINV_CLR1, ~0);
out_w(IT_PINV_CLR2, ~0);
- out_w(IT0_IEN0, 0x0c000000); // CPU: GPIO interrupt enabled
+ out_w(IT0_IEN0, 0x0c000000); /* CPU: GPIO interrupt enabled */
out_w(IT0_IEN1, 0x003c0000);
out_w(IT0_IEN2, 0x00018000);
@@ -209,11 +209,11 @@ EXPORT void resetSystem(W boot)
SCInfo.ramend = (void*)va;
/* set up EIT vectors */
- // we do not need _defaultHdr absolutely, but just in case set it up
- SCArea->intvec[EIT_DEFAULT] = _defaultHdr; // default handler
- SCArea->intvec[EIT_UNDEF] = _defaultHdr; // undefined instruction
- SCArea->intvec[SWI_MONITOR] = _defaultHdr; // SWI - monitor SVC
- SCArea->intvec[EIT_IRQ(26)] = _gio6Hdr; // GPIO branch
+ /* we do not need _defaultHdr absolutely, but just in case set it up */
+ SCArea->intvec[EIT_DEFAULT] = _defaultHdr; /* default handler */
+ SCArea->intvec[EIT_UNDEF] = _defaultHdr; /* undefined instruction */
+ SCArea->intvec[SWI_MONITOR] = _defaultHdr; /* SWI - monitor SVC */
+ SCArea->intvec[EIT_IRQ(26)] = _gio6Hdr; /* GPIO branch */
SCArea->intvec[EIT_IRQ(27)] = _gio7Hdr;
SCArea->intvec[EIT_IRQ(50)] = _gio0Hdr;
SCArea->intvec[EIT_IRQ(51)] = _gio1Hdr;
@@ -221,7 +221,7 @@ EXPORT void resetSystem(W boot)
SCArea->intvec[EIT_IRQ(53)] = _gio3Hdr;
SCArea->intvec[EIT_IRQ(79)] = _gio4Hdr;
SCArea->intvec[EIT_IRQ(80)] = _gio5Hdr;
- SCArea->intvec[EIT_GPIO(8)] = _defaultHdr; // abort switch
+ SCArea->intvec[EIT_GPIO(8)] = _defaultHdr; /* abort switch */
/* set up initial page table */
for (i = 0; i < N_MemSeg; ++i) {
@@ -253,8 +253,8 @@ EXPORT void resetSystem(W boot)
}
DSB();
- Asm("mcr p15, 0, %0, cr8, c7, 0":: "r"(0)); // I/D TLB invalidate
- Asm("mcr p15, 0, %0, cr7, c5, 6":: "r"(0)); // invalidate BTC
+ Asm("mcr p15, 0, %0, cr8, c7, 0":: "r"(0)); /* I/D TLB invalidate */
+ Asm("mcr p15, 0, %0, cr7, c5, 6":: "r"(0)); /* invalidate BTC */
DSB();
ISB();
@@ -275,22 +275,22 @@ EXPORT void sysExit(W reset)
{
DisCacheMMU();
- // after this point, delay such as waitUsec() spends more time than the number indicates //
+ /* after this point, delay such as waitUsec() spends more time than the number indicates // */
/* LED off */
cpuLED(0x00);
/* all interrupts disabled */
- out_w(IT0_IDS0, ~0); // CPU: all interrupts disabled
+ out_w(IT0_IDS0, ~0); /* CPU: all interrupts disabled */
out_w(IT0_IDS1, ~0);
out_w(IT0_IDS2, ~0);
out_w(IT3_IPI0_CLR, 0x0000003f);
- out_w(IT3_IDS0, ~0); // DSP: all interrupts disabled
+ out_w(IT3_IDS0, ~0); /* DSP: all interrupts disabled */
out_w(IT3_IDS1, ~0);
out_w(IT3_IDS2, ~0);
out_w(IT0_IPI3_CLR, 0x0000003f);
- out_w(IT0_FID, 0x00000001); // FIQ disabled
- out_w(IT0_LIIR, 0x0000000f); // internal interrupt disabled
+ out_w(IT0_FID, 0x00000001); /* FIQ disabled */
+ out_w(IT0_LIIR, 0x0000000f); /* internal interrupt disabled */
/* power on controller initialization */
pmicInit();
diff --git a/tkernel_source/monitor/hwdepend/tef_em1d/src/waitusec.c b/tkernel_source/monitor/hwdepend/tef_em1d/src/waitusec.c
index 959bd39..8ffac07 100644
--- a/tkernel_source/monitor/hwdepend/tef_em1d/src/waitusec.c
+++ b/tkernel_source/monitor/hwdepend/tef_em1d/src/waitusec.c
@@ -21,7 +21,7 @@
#include "sysdepend.h"
#include <arm/em1d512.h>
-LOCAL UW delay64us; // wait for 64 microsec
+LOCAL UW delay64us; /* wait for 64 microsec */
/*
* wait for nanoseconds
@@ -62,18 +62,18 @@ EXPORT void setupWaitUsec(void)
{
UW t0, t1, t2;
-#define MAX_CNT (ACPU_CLK * 64 / 10) // 1 Clock
-#define MIN_CNT (ACPU_CLK * 64 / 1280) // 128 Clock
+#define MAX_CNT (ACPU_CLK * 64 / 10) /* 1 Clock */
+#define MIN_CNT (ACPU_CLK * 64 / 1280) /* 128 Clock */
/* use TI0 timer, and assume clock is PLL3 / 8 */
- out_w(Txx_OP(TI0), 0); // Timer stop, count clear
+ out_w(Txx_OP(TI0), 0); /* Timer stop, count clear */
while (in_w(Txx_RCR(TI0)));
- out_w(Txx_SET(TI0), 0xffffffff); // maximum count
- out_w(Txx_OP(TI0), 0x00000003); // Timer start
+ out_w(Txx_SET(TI0), 0xffffffff); /* maximum count */
+ out_w(Txx_OP(TI0), 0x00000003); /* Timer start */
delay64us = 64;
- waitUsec(1000); // wait for a while until things settle down
+ waitUsec(1000); /* wait for a while until things settle down */
t0 = in_w(Txx_RCR(TI0));
waitUsec(1000);
@@ -81,12 +81,12 @@ EXPORT void setupWaitUsec(void)
waitUsec(3000);
t2 = in_w(Txx_RCR(TI0));
- out_w(Txx_OP(TI0),0); // Timer stop, count clear
+ out_w(Txx_OP(TI0),0); /* Timer stop, count clear */
while (in_w(Txx_RCR(TI0)));
- t2 -= t1; // count for 3000 times
- t1 -= t0; // count for 1000 times
- t2 -= t1; // count for 2000 times
+ t2 -= t1; /* count for 3000 times */
+ t1 -= t0; /* count for 1000 times */
+ t2 -= t1; /* count for 2000 times */
/*
* calculate the count for 64 microsec
--
1.9.1
References
