tiomap-dev team mailing list archive

[David Long <873453@xxxxxxxxxxxxxxxxxx>]

If you do an:

echo 350000 > /sys/devices/system/cpu/cpu0/cpufreq/scaling_max_freq

you can lock the cpu at the lowest supported frequency.  I verified this
with a printk in:

arch/arm/mach-omap2/omap2plus-cpufreq.c.

using tilit-3.1 and tilit-tracking.  However, the 4460 continues to
display jitter in the timing info (with some short intervals), so I
don't see how this can be related to frequency scaling. It feels more
like it's delaying processing of the wall clock update (from
timer_tick).  It's not obvious to me why this would be 4460-specific
though.  Removing NO_HZ from the config might reduce the frequency of
occurrence, but clearly does not fix the problem.

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https://bugs.launchpad.net/bugs/873453

Title:
  odd timing behaviour on panda

Status in Linaro Texas Instruments Landing Team:
  Confirmed
Status in Linaro Ubuntu Evaluation Builds:
  Confirmed

Bug description:
  I've got a set of benchmarks that use clock_gettime like:

      clock_gettime(CLOCK_REALTIME, &tbefore);

      for(l=0;l<numloops;l++) {
         dostuff
      }

      clock_gettime(CLOCK_REALTIME, &tafter);

      nsdiff=(double)(tafter.tv_nsec - tbefore.tv_nsec);
      nsdiff+=1000000000.0 *(tafter.tv_sec - tbefore.tv_sec);

  
  and I've just reinstalled our local panda to using Linaro 11.09 (kernel 3.0.0-1404-linaro-lt-omap)
  and it's starting to get weird timing artifacts.

  For example:

  smarter_strlen_ldrd: ,102400, loops of ,62, bytes=6.054688 MB, transferred in ,3936768.000000 ns, giving, 1537.984331 MB/s
  smarter_strlen_ldrd: ,102400, loops of ,32, bytes=3.125000 MB, transferred in ,0.000000 ns, giving, inf MB/s
  smarter_strlen_ldrd: ,102400, loops of ,16, bytes=1.562500 MB, transferred in ,4180909.000000 ns, giving, 373.722557 MB/s

  Now there is no way that loop took 0.000000 ns!  Running the same
  binary on an older installation runs fine.

  Dave

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