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For vector memory operations, GCC generates less efficient code for
little endian POWER than for big endian POWER.  This is because the VSX
vector loads and stores (lxvd2x, stxvd2x, lxvw4x, stxvw4x) assume a
vector register element ordering where the lowest-numbered element
resides in the most significant portion of the register.  That is, they
operate according to a big-endian element ordering no matter what endian
mode the machine is running in.  To generate correct code regardless of
this, GCC will generate a lxvd2x/xxswapd pair of instructions for each
load, and an xxswapd/stxvd2x pair of instructions for each store.  The
extra xxswapd instructions force the vector elements into the proper
lanes, but at a cost in performance.

In August 2014, I added a pass to GCC that removes the extra swap
operations when they are not necessary for correctness.  This greatly
improves vector performance for ppc64el.  This optimization can be done
for computations where all of the vector operations are "lane-
insenstive"; that is, they don't care which lanes the computations are
performed in, so long as values are stored back to memory in the correct
order.

To take advantage of this improved performance, I've backported the swap
optimization pass to GCC 4.8 in revision r221713.  I would like to see
this included in the next service release of 14.04 LTS.  I believe this
is the only Ubuntu release using GCC 4.8.  A separate feature request
has been opened for GCC 4.9.

** Affects: gcc-4.8 (Ubuntu)
     Importance: Undecided
         Status: New


** Tags: architecture-ppc64le bot-comment bugnameltc-123278 severity-medium targetmilestone-inin14043
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[Ubuntu 14.04] gcc 4.8: Improve vector performance by removing unnecessary swap optimizations
https://bugs.launchpad.net/bugs/1449117
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