kicad-developers team mailing list archive

[Dick Hollenbeck <dick@...>]

jean-pierre charras wrote:
> Some interesting things in freePCB (only for windows)
> In sources (written in C++) I found some algos about polygons.

Jean-Pierre,


Yes I'll have to look at that.


As part of the zone re-design, we should also "abstract out" the track 
to track "electrical continuity testing". For the time being this can 
be as simply as putting the existing end point match testing, which is 
done with == tests, into member functions. And for the time being 
those member functions can still use end point == testing, but can later 
be enhanced to test for any kind of physical overlap / electrical 
continuity.



For example: 

bool TRACK::ConnectsTo( const TRACK& track ) const

bool TRACK::ConnectsTo( const ZONE& zone ) const

bool TRACK::ConectsTo( const SEGVIA& via ) const

bool TRACK::ConnectsTo( const D_PAD& pad ) const

bool SEGVIA::ConnectsTo( const ZONE& zone ) const
{
// bi-directional should be equivalently valid:
return zone->ConnectsTo(this);
}


bool ZONE::ContectsTo( const SEGVIA& via ) const

bool ZONE::ConectsTo( const TRACK& track ) const


With these black box functions, you could conceptualize a top-down 
design and defer implementation of all of these until you know exactly 
what is needed above, and worth investing in time-wise.


The top-down design is largely done by identifying member function 
stubs, identifying their arguments and return values.


The UI editing of zone perimeters and ratsnest functions are the bulk of 
the work up near the top of the design.


Dick Hollenbeck
SoftPLC Corporation
http://softplc.com