kicad-developers team mailing list archive

["Lorenzo" <lomarcan@...>]

> Maybe it depends on how someone works... I personally place components using a 0.5 mm grid and route with a 20mil grid, switching to 5mil for tight spots (like passing between the legs of a SOT). I heard around of an 'unified grid' but I know nothing of it. Anyway when you have metric sized packages with imperial pitch you WILL have the problem (i.e. all the SOICs and more). I'm resigned to let the last segment of a track wander off grid to join the pins...


OK, found it: the IPC unified grid is 0.05mm; it's described here\

http://www.pcbmatrix.com/downloads/files/GenDocs/The%20Universal%20PCB%20Design%20Grid%20System.pdf