kicad-developers team mailing list archive

[Lorenzo Marcantonio <l.marcantonio@xxxxxxxxxxxx>]

On Tue, 26 Jul 2011, jean-pierre charras wrote:

> Also, NPTH "through pads" are not easy to handle, from the point of view of 
> connectivity calculation,
> unless there is not connection allowed to these NPTH pads (but this is 
> restrictive)

Well, by definition a pad which is not on a copper layer CAN'T be in
a netlist since has no electrical properties...

I'd propose to implement the thing only for 'fixturing holes' i.e.
nonconnected pads i.e. simply drilled holes:D in the pad dialog there is
already some remains/preliminary work for them in
dialog_pad_properties.cpp (look for the PAD_HOLE_NOT_PLATED enum which
is dead code)

NPTH conductive pads are not useful IMHO. A full padstack implementation
(different shapes for internal layer) would be more useful (even if not
essential for non-HDI work). Also a NPTH pad has a lot less mechanical
strength (it peels easily) and in fact it's used only in single layer
boards...

I'd change the contraint from 'no hole without copper' to 'no hole
without copper unless the pad has no name'. So it can't enter in
a netlist and we only need to make sure the DRC checks the hole-track
clearance. It should be a minor modification (ATM I simply hacked away
the check and it works :P:P)

Other things for the wishlist, more or less related (this project I'm
working on generated some minor issues):

- When filling zones the choices for pad connection are: no connection,
  solid and thermal vias; I'd add the 'thermal for THT and solid for
  SMD' which is the optimal way for 'most' work (reason: THT could be
  hand soldered with a solder pencil so it needs the thermal resistance;
  SMD OTOH is often reworked with hot air and or infrared so thermals
  are less useful). Could be implemented with the 'via with thermals'
  feature required by the people hand manufacturing vias with rivets.

- Some way to define tented/untented vias instead of a global setting;
  we use tented vias for clearance but thermal vias need to be untented
  (in this board I need to cool a 10A SMD regulator... it's like swiss
  cheese :D). I worked around the issue using tented vias during plot
  and adding via-sized pads to the regulator instance (bonus: you don't
  need to connect them like vias since a zone fill mark them as
  connected); the zone fill need to be 'solid' of course...

- Thermal spokes automatically computed using the IPC formula... not
  really important but useful when you need to solder *big* terminal
  blocks like Phoenix's MKDSP10 or even worse MKDSP25 (they pull
  respectively 76A and 125A *for each contact*). Too small and the track
  overheats, too big and you can't desolder them (and anyway it's
  difficult even with 120W of soldering iron)

- A new kind of object, I'd call it 'breadcrumb' for planning track
  layout (since we have no push/shove it's easy to forget where we
  wanted to make the track pass). I'm using small alignment targets for
  this but it's a PITA to delete them afterwards... instead these
  objects would have a 'sweep all crumbs away' command after the track
  is done.

--
Lorenzo Marcantonio
Logos Srl