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Re: Padstacks, layernames, process files


On 11/14/2012 07:54 AM, Dick Hollenbeck wrote:
> On 11/14/2012 03:19 AM, Rick Walker wrote:
>> Hi Dick,
>>> In this thread, mostly we are trimming pad descriptions down with
>>> this, since we do not have padstack support.  
>> For what it's worth, I just fabbed a kicad board that uses the bitfield
>> mask to control the inner annular rings for a BGA footprint.  I had to
>> write a custom script to build my BGA footprints from a textual
>> description file.  By leaving the annular rings off of selected layers
>> of the outer pads it made it possible to route out all the traces from
>> the inner pads. 
>> I'd hate to see kicad lose it's current ability to fully control all the
>> annular rings in a padstack independently through the textual
>> description file. 
> I will attempt to answer your concern by assuming you were using a mixture of through hole
> pads interspersed in an among the the BGA SMD pads.
> The strategy should still be possible with changes I committed last night.
>   (pad 2 thru_hole circle (at 1.27 0) (size 1.651 1.651) (drill 0.8128)
>     (layers *.Cu *.Mask F.SilkS)
>   )
> becomes something like:
>   (pad 2 thru_hole circle (at 1.27 0) (size 1.651 1.651) (drill 0.8128)
>     (layers F.Cu Inner3.Cu *.Mask F.SilkS)
>   )

If you are doing the thru hole tampering in the BOARD file, rather than in a footprint in
a library, then uou can use your BOARD specific cu layer names in lieu of the above raw names.
Either type of name should work in a *.kicad_pcb file: raw or custom cu layer name.

If in a library, then you would have to use the raw names, nothing is known about your
BOARD specific cu layer names there.

I suspect my example is off, since you probably don't have *.Mask and don't need F.SilkS
either.  Removing *.Mask creates what, a tricked out net specific via from a through hole
pad?, amazing....