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Message #10099
Re: layer based constraints
Hi Jean-Pierre,
see my responses below.
-----Ursprüngliche Nachricht-----
From: jp charras
Sent: Saturday, April 27, 2013 10:49 AM
To: kicad-developers@xxxxxxxxxxxxxxxxxxx
Subject: Re: [Kicad-developers] layer based constraints
Therefore, "response-to-response-to-response" is not surprising.
Which could be surprising is a lack of response-to-response-to-response!
Actually, I was just wundering why I canNOT see more than
"response-to-respone-to-response" This is the deepest level my browser shows
me. This has nothing to do with the topic, but with the way, the messages
show up - at least on my browser (chrome).
In this case, having layers constraints is not bad.
But remember your issue come from SeedStudio, and my board house do not
have these constraints.
right. -But - don't get me wrong, i consider Kicad a tool that can easily
compete with professional tools - but it is used by many hobbyists. An
without wanting to do some advertising, seeedstudio (among with another
supplyer having exactly the same constraints - actually the same fabs, I
suppose) is by far the cheapest provider of prototype PCBs I know.
The first question I am thinking is:
Why a by layer constraints.
Why do not have only 2 min clearance values: one for outer layers, one for
inner layers.
I also thought about that. Would also be good, yes.
The answer (remember : having both power and easy to use features is not
easy: you often should choose between them) is very important:
In Design Rules we have already one constraint. Just a second constraint
will fix your issue.
yup.
Remember we have constraints for minimal values for:
clearances, tracks, vias, microvias, and should have also minimal annular
ring for pads and vias.
Having values for each layer in a 16 layer board is a serious constraint...
for users.
agree. In most cases, you just repeat numbers. Max flexibility, at a price.
I know you said: leave these values to 0 when not used.
Yes, but I am not convinced: For the user, they are in a major dialog, For
the user, the Design rule dialog have already these constraints.
when these values are not to 0, which value is used ?
well, here a disagree. For me it's clear that it must be the one that is
more restrictive. And a very short "pop up explainer" (don't know the term)
could tell you this.
Remember also the calculation time is a major constraint in DRC.
I know. That's why I wanted to keep it simple.
By the way I had a look to your patch, and i believe the minimal track
width defined in layers silently overrides the track width set in net
classes.
Very well possible. As I said, it's just something to get the "look and
feel" for it. Not tested, hacked somwhere between midnight and morning...
:-)
This is not good. You can just set a DRC error.
yup. I'd say, it's even very bad! :-)
In some cases (namely for tracks having a specific impedance) you should
have to use the defined width.
Yes. But in these cases, the constraints for these must be greater than the
layer constraint. Why? Because the layer constraint is intended to represent
a manufacturing limint. So, I can not place a 0.05mm track on a PCB with
width constraint of 0.15mm just because it has to match the impedance.
That's why I keep stressing that I stongly believe that always the most
restrictive constraint should be taken.
Actually, no need to say thank you for working on Kicad! I honestly did this
thing for myself. And I can use it very well. It's me who must not only say
thank you for providing kicad, but to enable me as user to enhance it for my
(special) needs by providing it open source!
I agree with you that it's not a good idea to just pack anything on the
release branch without discussing about alternatives.
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