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Re: Experiments and considerations for more layer


On Mon, 9/2/13, Brian Sidebotham <brian.sidebotham@xxxxxxxxx> wrote:

 Subject: Re: [Kicad-developers] Experiments and considerations for more layer
 To: "Kicad Developers" <kicad-developers@xxxxxxxxxxxxxxxxxxx>
 Date: Monday, September 2, 2013, 5:30 PM
 On 2 September 2013 10:02,
 Lorenzo Marcantonio <l.marcantonio@xxxxxxxxxxxx>
 last I tried to broke the 32 layer barrier in pcbnew. Needed
 assembly and courtyard on both sides, so the ECO are not
 enough. Also
 they need to be flippable, too.
 Result: succesful, learnt things that could be useful
 Lorenzo Marcantonio
 Logos Srl
 Hi Lorenzo,
 I could really do with more layers too. Although
 when I say *more*  layers, I mean that I could really do
 with dedicated assembly and courtyard layers. The assembly
 layer needs the reference field on, as you say, at the
 insertion point of the component as well as a physical
 bounding box; This should flip when the component is
 Thanks for spending the time investigating it,
 because I'll sure be glad of any work that goes into
 supporting these layers.
 Best Regards,

While we're on the topic of layers, is anyone interested in IDF3.0 import/export? I was thinking of implementing it since I'll have a little free time in the next few months. If I implement it I'd like to draw regions on a top and bottom 'mechanical keepout' layer. Alternatively I guess I could create a hatched region or some such on the silk layers but I'd rather not pollute the silks. The IDF specification allows TOP, BOTTOM, or BOTH specifications for the keepout; there is also a height (0 = absolutely nothing can go there, >0 means max. height of components) but I don't see how height restrictions can be supported in KiCAD nor is it the responsibility of the ECAD to handle this. I see the mech. keepout as merely a reminder to the layout designer that there are mechanical restrictions within certain regions; it is the responsibility of the mechanical drafter to provide all relevant information in other documents.

Using IDF also gives us another method of specifying the board outline, but to be honest the specification has severe defects; for example, arcs are not correctly constrained so for any arc specified in IDF there are 4 different ways to draw the arc if we assume a circular arc; for elliptical arcs there are an infinite number of ways to draw the arc and every single one will conform to the standard as written.

Nice work Lorenzo. As for how many layers we can ultimately use, I imagine at least twice as many as the copper layers in a pathological case thanks to things like 'no route' areas underneath ICs. But with 64 layers total I think we'll be safe for a long time.

- Cirilo

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