kicad-developers team mailing list archive

[Lorenzo Marcantonio <l.marcantonio@xxxxxxxxxxxx>]

On Wed, Jun 04, 2014 at 10:53:26AM -0400, Jean-Paul Louis wrote:

> The courtyard layer would be a nice to have during the placement phase of the design, especially if you do a grid-less placement (is it possible in KiCad?).

Well, yes, just set the minimum grid (which is way smaller than any
placement tolerances:P)

> Do not worry too much about an Assembly layer and a panel drawing. In term of cost, it is a lot less expensive to have it created by the Manufacturing Engineering team (CAM) than by the Physical Design team and it is a NRE (Non Recurring Engineering) cost.

That's what I said, panelization is for the CAM people. However they
want the original assembly drawing too, to cross-check the placement.
More than the cost (we call it 'tooling') the problem is that you
usually don't know the target panel size and the capabilities/quirks of
the assembly chain. 

> The relocation of the RefDes, and the panel drawing are tasks that do not need the skills of the Layout Engineer, but more an understanding of the manufacturing and inspection processes.

Refdes relocation is done here during layout. Maybe it's only a workflow
issue. Also, especially for 'end user' refdes (connectors), the original
designer often knows better.

> And also a provision to rename the PCB layers (language related) would be nice as a global setting. Top/Bottom vs. Front/Back vs. Dessus/Dessous vs. Composant/Trace, Silk Screen vs. Serigraphie, etc..
> Solder paste screen and Glue (Adhesive) layers are part of the Assembly layers.

Solder paste is very layout dependant (especially for power components),
but then the assembler enlarge/shrink it depending on the stencil
material/cutting method. In the same way solder mask enlargement is
mostly done by the PCB fabricator since it knows better its registration
capabilities (often they also do mask ganging for small pitches).

However the mask/paste enlargement in pcbnew is provided as
a convenience for people which need to do it in house (many low cost
fabricators demand camera-ready gerbers). In the same way some people
would desire to do panelization in pcbnew (except the trivial cases it's
a complex thing, it's not just a step-and-repeat thing).

> I have seen mentioned a limit of 32 for the number of layers, What is the reason for this limit? 255 or 256 would be a more natural limit (Byte)

32 bits in a (long) int. I extended it to 64 (a bigger int), a bitarray
object would remove the limit (to a plausible value...)

-- 
Lorenzo Marcantonio
Logos Srl