kicad-developers team mailing list archive

[Andrew Zonenberg <azonenberg@xxxxxxxxxxxxxxx>]

I'll look at the code tomorrow and see if there's any easy way to move
stuff around and fix the soldermask. If there's no ordering in the
rendering then alpha blending isn't gonna work well. (The bad holes are
a lower priority for me, but being able to see traces is kind of
important.)

The board is a 10-port USB hub (tree of three 4-port hub ICs) with
indicator LEDs and a CPLD that provides a SPI interface for switching
power to single ports under control of an external board.

It's designed to slide into a 3U Eurocard chassis, although it's not
full depth, so as soon as I route another 14 signals I'll be playing
with export to mechanical CAD for front panel design :)

The PCB is at:
http://redmine.drawersteak.com/projects/achd-soc/repository/changes/trunk/boards/usb-hub-eurocard/usb-hub-eurocard.kicad_pcb

The port model is at:
http://colossus.cs.rpi.edu/~azonenberg/downloads/737250110blf.wrl

Note that the port model was converted from FCI's published STEP model
using FreeCAD and/or Blender and is not my original work.

On Sun, 2014-08-17 at 07:44 +0000, Mário Luzeiro wrote:
> Hi Andrew,
> Thank you for your quick tests.
> 
> I didn't change any thing related with very old nature of rendering, a part of the color and appearance all should be (with the same issues) as before.
> 
> The bottom-side traces it is true. I wasn't able to figure out why and get it better.
> There are some ideas and things to try.. but I didn't have time for that at moment to improve it.
> 
> Nice PCB by the way.. whatever it is doing ;)
> 
> Mario Luzeiro
> 
> ________________________________________
> From: Andrew Zonenberg [azonenberg@xxxxxxxxxxxxxxx]
> Sent: 17 August 2014 04:50
> To: Mário Luzeiro
> Cc: kicad-developers@xxxxxxxxxxxxxxxxxxx
> Subject: Re: [Kicad-developers] New 3D Viewer options patch
> 
> Testing your patch against latest BZR kicad with latest wx from SVN on
> Debian 7 amd64, GTX 460m with binary nvidia drivers. Board is 4 layers.
> 
> The board looks fine as seen from the top
> (http://i.imgur.com/jv4Rfvg.png). Purple color is intentional, I was
> trying to make it look like the OSHpark standard process.
> 
> On the bottom (http://i.imgur.com/HrKT2Em.png long shot,
> http://i.imgur.com/9CMyI4X.png closeup) there are a few issues:
> 
> 1) The vias under the QFN should go all the way through the board but
> they appear "plugged" by copper in the underside view.
> 
> 2) Bottom-side traces have very low contrast and are nearly invisible.
> Top-side traces look fine.
> 
> I also have intermittent issues with what seems to be bad normals
> calculated for some 3D models. Not sure if this is a bug in my
> parallelization of normal calculation or in your original code but it's
> worth investigating; I haven't had time to poke around with it too much.

-- 
Andrew Zonenberg
PhD student, security group
Computer Science Department
Rensselaer Polytechnic Institute
http://colossus.cs.rpi.edu/~azonenberg/

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