kicad-developers team mailing list archive

[Lorenzo Marcantonio <l.marcantonio@xxxxxxxxxxxx>]

On Mon, Sep 22, 2014 at 01:40:31PM -0400, Andrew Zonenberg wrote:
> After a discussion with Nick Oestergard on IRC, I've come to the
> conclusion that we really need to sit back and think about how design
> rules for vias and stackups are handled.
> 
> As of right now, we have three kinds of vias:
> 1) Through-board via. These penetrate the entire board and can connect
> any layers in between.
> 2) Microvia. These can only go from an outer layer to the adjacent
> internal layer.

Don't fully agree.

Microvias can go from one side of a core to the other one and have
specific rule limitations since are typically done with lasers... I've
seen 0.2mm hole diameter as a 'nominal' microvia. Where the
core is depends on the manufacturing stackup. You can do a 4 layer in at
least two ways:

Stackup A:

Copper  Top
Prepreg
Copper  Inner 1
Core
Copper  Inner 2
Prepreg
Copper  Bottom

*or*

Stackup B:

Copper  Top
Core
Copper  Inner 1
Prepreg
Copper  Inner 2
Core
Copper  Bottom

In stackup A you can have µvias only between Inner 1 and Inner 2; in
stackup B you can have µvias between Top-Inner 1 and Inner 2-Bottom.

I could be wrong since it's a lot of time I did the technology course,
however. Some people here with more HDI experience could clarify.

> 3) Blind/buried via. These go from any layer to any other layer, and can
> connect anything in between.

Substantially, depending on the manufacturing press sequence and how
much you want to pay :D With stackup A you could do a blind Top-Inner
2 or Bottom-Inner 1 but not both. With a Inner 1-Inner 2 buried (like
the µvia but done with mechanical drilling) In stackup B the blinds are
the same of the µvias.

That is, unless they have found a way to drill blinds without touching
already laminated layers reliably (as usual cost would change:P).

> We currently have two sets of design rules:
> 1) Drilled vias. There is a global minimum, netclass default size, and a
> list of custom sizes. This applies to both through and blind/buried
> vias.
> 2) Microvias. There is a global minimum, netclass default size, but no
> support for custom sizes.
> 
> Unfortunately, this doesn't accurately reflect the realities of PCB
> manufacture. Mechanical drills can be done through the entire stack at
> any point during manufacture (including before all layers have been
> laminated), and laser drills can be done from any layer to the next one
> down (including before all layers have been laminated). Furthermore,
> minimum diameters of drills are typically limited by aspect ratio
> concerns. In other words, the less depth a drill has to penetrate, the
> smaller the hole can be.
> 
> To illustrate my point, I've attached a cross section of a typical
> 6-layer HDI stackup (similar, but not identical, to one that I used on a
> project for work recently). There are quite a few different kinds of
> vias:

More complex than my example, but clears many points. Also I forgot the
aspect ratio constraint :D Your board doesn't seem cheap, either...

I'd say a more "useful" constraint table would be like this:

- For µvias: layer n to n+1: size d (I think that µvias are always
  drilled of the same size on a pass)

- For blind/buried/thru (thru vias are simply top to bottom): layer n to
  m, size d to D

The user would then fill the constraints for his process/budget and
everything should work fine. The 'layer selection' dialog for routing
should only allow layer pairs in the table obviously (with DRC active).

Of course a full layer stackup editor (with prepreg and core
thickness/dielectric k values) would give the nifty impedance tricks as
suggested. Also it's a lot of work :P

-- 
Lorenzo Marcantonio
Logos Srl