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Re: pcbnew feature: Vias on Solder Mask Layers

 

I'm not terribly thrilled about adding this to the print dialog.
Plotting is definitely more accurate than printing although I wont
completely rule it out.  I make a lot of prototype boards and I've found
through trial and error the plotting is the way to go.  Adding a
redundant print feature that is less accurate than the plot version
doesn't make a lot of sense to me.  Remember, our target audience is not
hobbyists.  That is not to say that a novel feature aimed at hobbyists
wouldn't be included in KiCad, it's just that this is not novel feature.

On 6/12/2016 11:34 AM, Chris Pavlina wrote:
> This is already available in the Plot dialog: "Do not tent vias". Other devs,
> what do you think about adding it to Print as well?
> 
> On Sun, Jun 12, 2016 at 05:25:21PM +0200, Cheng Sheng wrote:
>> Hi KiCad Developers,
>>
>> I made a feature for my own hobbyist use (to etch my own PCB boards). I
>> don't know how much the community welcomes such hobbyist-oriented features.
>> So I'd like to ask the mail-list before I send out a pull request. Guess
>> the answer leans positive because I already saw some hobbyist-friendly
>> features inside the "File->Print" dialog of pcbnew (eg., small drill).
>>
>> The use-case: vias of hobby-etched PCBs are usually hand-soldered with a
>> wire (I suppose most hobbyists don't eletroplate their through-holes), thus
>> needs to be exposed on the solder mask layers. Currently, the printed
>> images don't have vias on the solder mask layers.
>>
>> (It is still doable on the current version to produce a desired F.Mask or
>> B.Mask image by hacking the Gerber files, by overlaying a hacked drill file
>> on a mask Gerber file, and exporting in the Gerber viewer. But this is too
>> many steps to do.)
>>
>> Happily finding how easy it is to compile KiCad source code, I decide to
>> add the required functionality myself. Here it is:
>> http://bazaar.launchpad.net/~jeru-sheng/kicad/kicad-feature/revision/6924
>>
>> What it does is: If a via appears on F.Cu layer, print it also on F.Mask
>> layer; same for B.Cu layer via on B.Mask layer.
>>
>> The new functionality is controllable in "File->Print" menu as a check box:
>> [image: Inline image 1]
>>
>> Given the following pcb traces:
>> [image: Inline image 4]
>>
>> When the check box is off:
>> [image: Inline image 2]
>>
>> When it is on:
>> [image: Inline image 3]
>> (so it seems the vias are on all copper layers, even if the traces it is
>> connected to are not on all layers).
>>
>> And this does not affect Gerber plot even when the check box is on:
>> [image: Inline image 5]
>>
>> Look forward to hearing back.
>>
>> Regards,
>> Cheng Sheng
> 
> 
> 
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