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Handling of clearance on board

 

Hi!

I have been using Kicad for a while and was thinking of adding support for
clearance which depends not only on nets individually but being different
for different pairs of nets.

One use case might be where a large clearance is required between the
primary side and secondary side of a power supply circuit, but it still is
desirable to allow a small clearance between nets on the same side of the
isolation barrier.

I have been studying the code base to try to understand how it currently
works, hunting down a bug in the progress.

On one hand, the new router code has a nice design where clearance handling
is centralized to the RULE_RESOLVER object, so this part seems doable as
queries are always done on objects pairwise.

I did however run across some unused code (with comments saying "ugly
hack") in the PNS_PCBNEW_RULE_RESOLVER which one might want to remove. I
tried to submit a patch for this earlier, but it seemed to get lost in the
noise.

There is also an issue, causing large clearance to be ignored by the PNS
router sometimes, detailed in the following bug report:

https://bugs.launchpad.net/kicad/+bug/1558858

It seems to be related to the handling of the NODE::m_maxClearance field.

On the other hand, in the "old" code, like DRC, a hierarchy of overriden
virtual functions makes the logic a little hard to follow and clearance
queries are sometimes done for a single object instead of pairwise, which
makes implementing the feature I want a little more difficult.

I'm currently thinking about what to do next, but I think looking at fixing
bug 1558858 and removing the dead code would be a good start.

Best regards,
Joakim