Hello developers.
I found that netlist generation has changed last year or so. My two years old
project got connection errors after re-generating and re-loading netlist. This
project was successfully (without any errors) created and routed two years ago.
The problem is in multi-gate components, which has some pins common to two or
more gates. It can be two buffers with common Enable pin, four diodes with
common anode pin or (in my case) MCU with all GPIOs shown in one gate while same
pins acting as USART I/Os shown in another.
Two years ago all wires connected to those common pins in different gates had
the same net name e.g. was connected together as it takes place on PCB - all
routes to same pin had same net name. I suppose this behaviour was correct one.
Today's kicad netlist generator assigns separate net to every pin occurrence in
gates. And at netlist loading phase only first pin occurrence is taken into
account while all other connections to same pin in other gates _silently_
ignored, e.g. pin connection depends on gate numbering in package or even gates
location on schematics sheet and it's edit order in time. I think this behavour
is not the correct one. Any complaints?
I'll try to show it using four Zenner diodes in sot23-5 package (ESDA6v1-SC5)
has common anode on pin 2 and cathodes on pins 1,3,4,5. Here is component
description from netlist:
(libpart (lib discrete) (part ESDAxx-SC5-V)
(fields
(field (name Reference) VD)
(field (name Value) ESDAxx-SC5-V)
(field (name Footprint) TSOP-5))
(pins
(pin (num 1) (name K) (type passive))
(pin (num 2) (name A) (type passive))
(pin (num 3) (name K) (type passive))
(pin (num 4) (name K) (type passive))
(pin (num 5) (name K) (type passive)))))
Here is netlist generated from simple schematics (four zenner gates with GND
power component connected to pin 2 on gate C, see attachment sch1):
(nets
(net (code 1) (name GND)
(node (ref VD1) (pin 2)))
(net (code 2) (name "Net-(VD1-Pad1)")
(node (ref VD1) (pin 1)))
(net (code 3) (name "Net-(VD1-Pad2)")
(node (ref VD1) (pin 2)))
(net (code 4) (name "Net-(VD1-Pad3)")
(node (ref VD1) (pin 3)))
(net (code 5) (name "Net-(VD1-Pad2)")
(node (ref VD1) (pin 2)))
(net (code 6) (name "Net-(VD1-Pad4)")
(node (ref VD1) (pin 4)))
(net (code 7) (name "Net-(VD1-Pad2)")
(node (ref VD1) (pin 2)))
(net (code 8) (name "Net-(VD1-Pad5)")
(node (ref VD1) (pin 5)))))
As you can see, there is four nets (code 1, 3, 5, 7) belongs to VD1 pin 2. After
this netlist loading into PCB pin 2 will be connected to GND net.
Here is netlist generated from previous schematics with pin 2 on gates A and B
connected together (attachment sch2):
(nets
(net (code 1) (name "Net-(VD1-Pad2)")
(node (ref VD1) (pin 2))
(node (ref VD1) (pin 2)))
(net (code 2) (name "Net-(VD1-Pad1)")
(node (ref VD1) (pin 1)))
(net (code 3) (name "Net-(VD1-Pad3)")
(node (ref VD1) (pin 3)))
(net (code 4) (name GND)
(node (ref VD1) (pin 2)))
(net (code 5) (name "Net-(VD1-Pad4)")
(node (ref VD1) (pin 4)))
(net (code 6) (name "Net-(VD1-Pad2)")
(node (ref VD1) (pin 2)))
(net (code 7) (name "Net-(VD1-Pad5)")
(node (ref VD1) (pin 5)))))
As you can see, there is three nets (code 1, 4, 6) belongs to VD1 pin 2 and
after this netlist loading into PCB pin 2 will be connected to net
"Net-(VD1-Pad2)" and connection to GND will be dropped silently.
Which one behaviour is correct from developers point of view? Should I fill bug
report to revert netlist generation to old behaviour or should I fill feature
request to generate error message (and rise DRC error) if two unnamed nets
connected to same pin in different gates and one of the connection will be
dropped at netlist loading?
